/** * intel_fbc_init_pipe_state - initialize FBC's CRTC visibility tracking * @dev_priv: i915 device instance * * The FBC code needs to track CRTC visibility since the older platforms can't * have FBC enabled while multiple pipes are used. This function does the * initial setup at driver load to make sure FBC is matching the real hardware. */ void intel_fbc_init_pipe_state(struct drm_i915_private *dev_priv) { struct intel_crtc *crtc; /* Don't even bother tracking anything if we don't need. */ if (!no_fbc_on_multiple_pipes(dev_priv)) return; for_each_intel_crtc(dev_priv->dev, crtc) if (intel_crtc_active(&crtc->base) && to_intel_plane_state(crtc->base.primary->state)->visible) dev_priv->fbc.visible_pipes_mask |= (1 << crtc->pipe); }
static struct drm_crtc *intel_fbc_find_crtc(struct drm_i915_private *dev_priv) { struct drm_crtc *crtc = NULL, *tmp_crtc; enum pipe pipe; bool pipe_a_only = false; if (IS_HASWELL(dev_priv) || INTEL_INFO(dev_priv)->gen >= 8) pipe_a_only = true; for_each_pipe(dev_priv, pipe) { tmp_crtc = dev_priv->pipe_to_crtc_mapping[pipe]; if (intel_crtc_active(tmp_crtc) && to_intel_plane_state(tmp_crtc->primary->state)->visible) crtc = tmp_crtc; if (pipe_a_only) break; }