status_t arch_init(vmi_instance_t vmi) {
status_t ret = VMI_FAILURE;
if (vmi->arch_interface != NULL) {
dbprint(VMI_DEBUG_CORE, "Resetting architecture interface");
bzero(vmi->arch_interface, sizeof(struct arch_interface));
}
if(vmi->page_mode == VMI_PM_UNKNOWN) {
if(VMI_FAILURE == find_page_mode_live(vmi)) {
return ret;
}
}
switch(vmi->page_mode) {
case VMI_PM_LEGACY:
case VMI_PM_PAE:
ret = intel_init(vmi);
break;
case VMI_PM_IA32E:
ret = amd64_init(vmi);
break;
default:
break;
}
return ret;
}
static int __init hci_uart_init(void)
{
static struct tty_ldisc_ops hci_uart_ldisc;
int err;
BT_INFO("HCI UART driver ver %s", VERSION);
/* Register the tty discipline */
memset(&hci_uart_ldisc, 0, sizeof(hci_uart_ldisc));
hci_uart_ldisc.magic = TTY_LDISC_MAGIC;
hci_uart_ldisc.name = "n_hci";
hci_uart_ldisc.open = hci_uart_tty_open;
hci_uart_ldisc.close = hci_uart_tty_close;
hci_uart_ldisc.read = hci_uart_tty_read;
hci_uart_ldisc.write = hci_uart_tty_write;
hci_uart_ldisc.ioctl = hci_uart_tty_ioctl;
hci_uart_ldisc.poll = hci_uart_tty_poll;
hci_uart_ldisc.receive_buf = hci_uart_tty_receive;
hci_uart_ldisc.write_wakeup = hci_uart_tty_wakeup;
hci_uart_ldisc.owner = THIS_MODULE;
err = tty_register_ldisc(N_HCI, &hci_uart_ldisc);
if (err) {
BT_ERR("HCI line discipline registration failed. (%d)", err);
return err;
}
#ifdef CONFIG_BT_HCIUART_H4
h4_init();
#endif
#ifdef CONFIG_BT_HCIUART_BCSP
bcsp_init();
#endif
#ifdef CONFIG_BT_HCIUART_LL
ll_init();
#endif
#ifdef CONFIG_BT_HCIUART_ATH3K
ath_init();
#endif
#ifdef CONFIG_BT_HCIUART_3WIRE
h5_init();
#endif
#ifdef CONFIG_BT_HCIUART_INTEL
intel_init();
#endif
#ifdef CONFIG_BT_HCIUART_BCM
bcm_init();
#endif
#ifdef CONFIG_BT_HCIUART_QCA
qca_init();
#endif
#ifdef CONFIG_BT_HCIUART_AG6XX
ag6xx_init();
#endif
return 0;
}
void __init adi_chips_init(void)
{
printk(MOD_NAME "Initializing chip drivers\n");
i8259a_init();
i8254_init();
rtc_init();
intel_init(0);
}
// returns 0 for success or negative for failure
//int kern_pmc_init(struct pmc_info *info)
int kern_pmc_init(void)
{
int status = STATUS_UNKNOWN_CPU_INIT;
struct pmc_info info;
ULONG64 cr4;
if (!cpu_id(&info)) return STATUS_NO_CPUID;
// we need to at least support MSR registers, RDTSC, & RDPMC
if(!(info.features & MSR)) return STATUS_NO_MSR;
if(!(info.features & TSC)) return STATUS_NO_TSC;
if(!(info.features & MMX)) return STATUS_NO_MMX; // assume MMX tracks RDPMC
if (!strncmp(info.vendor, "GenuineIntel", 12)) status = intel_init(info.family,info.stepping,info.model);
else if (!strncmp(info.vendor, "AuthenticAMD", 12)) status = amd_init(info.family);
// we really don't need to claim support for Cyrix, do we?
// else if (!strncmp(info.vendor, "CyrixInstead", 12)) status = cyrix_init(info.family);
if(status == STATUS_SUCCESS) set_cr4_pce();
return status;
}
status_t arch_init(vmi_instance_t vmi) {
status_t ret = VMI_FAILURE;
if (vmi->arch_interface != NULL) {
dbprint(VMI_DEBUG_CORE, "-- Clearing and setting new architecture interface\n");
bzero(vmi->arch_interface, sizeof(struct arch_interface));
}
if(vmi->page_mode == VMI_PM_UNKNOWN) {
if(VMI_FAILURE == find_page_mode_live(vmi)) {
return ret;
}
}
switch(vmi->page_mode) {
case VMI_PM_LEGACY: /* fallthrough */
case VMI_PM_PAE:
ret = intel_init(vmi);
break;
case VMI_PM_IA32E:
ret = amd64_init(vmi);
break;
case VMI_PM_AARCH32:
ret = aarch32_init(vmi);
break;
case VMI_PM_UNKNOWN: /* fallthrough */
default:
ret = VMI_FAILURE;
break;
}
if(VMI_FAILURE == ret) {
vmi->page_mode = VMI_PM_UNKNOWN;
}
return ret;
}
