void
systick_init(void)
{
int i_state = interrupts_get_and_disable();
aic_mask_off(LOW_PRIORITY_IRQ);
aic_set_vector(LOW_PRIORITY_IRQ, (1 << 5) /* positive internal edge */ |
AIC_INT_LEVEL_LOW, (U32) tpl_primary_irq_handler);// (U32) systick_low_priority_entry);
aic_mask_on(LOW_PRIORITY_IRQ);
aic_mask_off(AT91C_PERIPHERAL_ID_SYSIRQ);
aic_set_vector(AT91C_PERIPHERAL_ID_SYSIRQ, (1 << 5) /* positive internal edge */ |
AIC_INT_LEVEL_NORMAL, (U32) tpl_primary_irq_handler);//(U32) systick_isr_entry);
aic_mask_on(AT91C_PERIPHERAL_ID_SYSIRQ);
*AT91C_PITC_PIMR = ((CLOCK_FREQUENCY / 16 / PIT_FREQ) - 1) | 0x03000000; /* Enable, enable interrupts */
if (i_state)
interrupts_enable();
}
int
uart_put_byte(U32 u, U8 b)
{
int ret_val;
int i_state;
struct soft_uart *p;
volatile struct _AT91S_USART *up;
if (u >= N_UARTS)
return -1;
p = &uart[u];
up = p->uart;
i_state = interrupts_get_and_disable();
#ifndef UART_POLLED
ret_val = byte_fifo_put(&p->tx, 0, b);
/* Enable transmitting and the transmit interrupt.
* This will allow the UART tx chain to wake up and
* pick up the next byte for tx, if it was stopped.
*/
p->transmitting = 1;
up->US_IER = 0x02;
#else
# warning Polled UART not supported!
#endif
if (i_state)
interrupts_enable();
return ret_val;
}
int
uart_get_byte(U32 u, U8 *b)
{
int ret_val;
int i_state;
struct soft_uart *p;
volatile struct _AT91S_USART *up;
if (u >= N_UARTS)
return -1;
p = &uart[u];
up = p->uart;
i_state = interrupts_get_and_disable();
#ifndef UART_POLLED
ret_val = byte_fifo_get(&p->rx, b);
#else
#endif
if (i_state)
interrupts_enable();
return ret_val;
}
void
nxt_spi_init(void)
{
int i_state = interrupts_get_and_disable();
#define SPI_BITRATE 2000000
*AT91C_PMC_PCER = (1L << AT91C_ID_SPI); /* Enable MCK clock */
*AT91C_PIOA_PER = AT91C_PIO_PA12;/*EnableA0onPA12*/
*AT91C_PIOA_OER = AT91C_PIO_PA12;
*AT91C_PIOA_CODR = AT91C_PIO_PA12;
*AT91C_PIOA_PDR = AT91C_PA14_SPCK;/*EnableSPCKonPA14*/
*AT91C_PIOA_ASR = AT91C_PA14_SPCK;
*AT91C_PIOA_ODR = AT91C_PA14_SPCK;
*AT91C_PIOA_OWER = AT91C_PA14_SPCK;
*AT91C_PIOA_MDDR = AT91C_PA14_SPCK;
*AT91C_PIOA_PPUDR = AT91C_PA14_SPCK;
*AT91C_PIOA_IFDR = AT91C_PA14_SPCK;
*AT91C_PIOA_CODR = AT91C_PA14_SPCK;
*AT91C_PIOA_IDR = AT91C_PA14_SPCK;
*AT91C_PIOA_PDR = AT91C_PA13_MOSI;/*EnablemosionPA13*/
*AT91C_PIOA_ASR = AT91C_PA13_MOSI;
*AT91C_PIOA_ODR = AT91C_PA13_MOSI;
*AT91C_PIOA_OWER = AT91C_PA13_MOSI;
*AT91C_PIOA_MDDR = AT91C_PA13_MOSI;
*AT91C_PIOA_PPUDR = AT91C_PA13_MOSI;
*AT91C_PIOA_IFDR = AT91C_PA13_MOSI;
*AT91C_PIOA_CODR = AT91C_PA13_MOSI;
*AT91C_PIOA_IDR = AT91C_PA13_MOSI;
*AT91C_PIOA_PDR = AT91C_PA10_NPCS2;/*Enablenpcs0onPA10*/
*AT91C_PIOA_BSR = AT91C_PA10_NPCS2;
*AT91C_PIOA_ODR = AT91C_PA10_NPCS2;
*AT91C_PIOA_OWER = AT91C_PA10_NPCS2;
*AT91C_PIOA_MDDR = AT91C_PA10_NPCS2;
*AT91C_PIOA_PPUDR = AT91C_PA10_NPCS2;
*AT91C_PIOA_IFDR = AT91C_PA10_NPCS2;
*AT91C_PIOA_CODR = AT91C_PA10_NPCS2;
*AT91C_PIOA_IDR = AT91C_PA10_NPCS2;
*AT91C_SPI_CR = AT91C_SPI_SWRST;/*Softreset*/
*AT91C_SPI_CR = AT91C_SPI_SPIEN;/*Enablespi*/
*AT91C_SPI_MR = AT91C_SPI_MSTR|AT91C_SPI_MODFDIS | (0xB<<16);
AT91C_SPI_CSR[2] = ((CLOCK_FREQUENCY/SPI_BITRATE)<<8) | AT91C_SPI_CPOL;
/* Set mode to unknown */
mode = 0xff;
/* Set up safe dma refresh state */
data = display = (U8 *) 0;
dirty = 0;
page = 0;
/* Install the interrupt handler */
aic_mask_off(AT91C_ID_SPI);
aic_set_vector(AT91C_ID_SPI, AIC_INT_LEVEL_NORMAL, spi_isr_entry);
aic_mask_on(AT91C_ID_SPI);
*AT91C_SPI_PTCR = AT91C_PDC_TXTEN;
if (i_state)
interrupts_enable();
}
// Initialise the module
void
i2c_init(void)
{
int i;
int istate;
U32 dummy;
for (i = 0; i < I2C_N_PORTS; i++) {
i2c_ports[i] = NULL;
}
istate = interrupts_get_and_disable();
/* Set up Timer Counter 0 */
*AT91C_PMC_PCER = (1 << AT91C_ID_TC0); /* Power enable */
*AT91C_TC0_CCR = AT91C_TC_CLKDIS; /* Disable */
*AT91C_TC0_IDR = ~0;
dummy = *AT91C_TC0_SR;
*AT91C_TC0_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK|AT91C_TC_CPCTRG; /* MCLK/2, RC compare trigger */
*AT91C_TC0_RC = (CLOCK_FREQUENCY/2)/(2 * I2C_CLOCK);
*AT91C_TC0_IER = AT91C_TC_CPCS;
aic_mask_off(AT91C_ID_TC0);
aic_set_vector(AT91C_ID_TC0, AIC_INT_LEVEL_NORMAL, (int)i2c_timer_isr_entry);
aic_mask_on(AT91C_ID_TC0);
if(istate)
interrupts_enable();
}
void
flash_erase_range(U32 addr, U32 nBytes)
{
int i = 0;
int istate = interrupts_get_and_disable();
while (nBytes--) {
i++;
}
if (istate)
interrupts_enable();
}
void
flash_write(U32 addr, void *buffer, U32 nBytes)
{
int i = 0;
int istate = interrupts_get_and_disable();
while (nBytes--) {
i++;
}
if (istate)
interrupts_enable();
}
/**
* Write a page from the supplied flash buffer to flash memory
* The flash buffer must have been obtained through a call to
* flash_get_page_buffer, before making this call
* returns > 0 number of bytes written < 0 error
* Error returns:
* -1 Timeout waiting for TWI to complete
* -2 Timeout waiting for flash write to complete
* -3 Bad page number
* -4 bad flash buffer
*/
int
flash_write_page_buffer(FOURBYTES *page, int page_num)
{
/* Write page to flash memory.
* This function must run out of ram and while it executes no other code
* (especially any flash resident) code must run. This is becuase the
* flash memory is only a single plane and can not be accessed for both read
* and write at the same time.
*/
int istate;
int status;
if (page_num + flash_start_page >= FLASH_MAX_PAGES) return -3;
if (VINTPTR(page) != &(FLASH_BASE[page_num*FLASH_PAGE_SIZE])) return -4;
/* We must disbale interrupts. However we need to try and ensure that all
* current interrupt activity is complete before we do that. We talk to
* the avr every 1ms and this uses interrupt driven I/O so we try to make
* sure this is complete.
*/
// Allow any playing sound to complete
sound_wait();
// Turn off timer tick call backs
systick_suspend();
// Wait until next tick
systick_wait_ms(1);
// Force a tick to talk to the avr
nxt_avr_1kHz_update();
// Wait for it to complete
status = wait_twi_complete();
if (status != 0) return -1;
// Now we can turn off all ints
istate = interrupts_get_and_disable();
// Write the buffer to the selected page
status = flash_write(page_num + flash_start_page);
// Turn ints back on
if (istate) interrupts_enable();
// Ensure that we are back in-sync.
systick_wait_ms(1);
// Allow call backs on 1ms tick
systick_resume();
if (!(status & AT91C_MC_FRDY)) return -2;
return FLASH_PAGE_SIZE*sizeof(U32);
}
int
flash_write_page(int start_page, U32 *page, int page_num)
{
int i, istate;
int status;
if (page_num + start_page > 1023) return 0;
systick_suspend();
systick_wait_ms(1);
nxt_avr_1kHz_update();
// modified based on the latest leJOS source (April 16th takashic)
// Wait for it to complete
status = wait_twi_complete();
if (status != 0) return -1;
// Now we can turn off all ints
istate = interrupts_get_and_disable();
for (i = 0; i < 64; i++)
FLASH_BASE[(page_num*64)+i] = page[i];
FLASH_CMD_REG = (0x5A000001 + (((page_num + start_page) & 0x000003FF) << 8));
status = wait_flash_ready();
// modified based on the latest leJOS source (April 16th takashic)
// Turn ints back on
if (istate) interrupts_enable();
// Ensure that we are back in-sync.
systick_wait_ms(1);
// Allow call backs on 1ms tick
systick_resume();
if (!(status & AT91C_MC_FRDY)) return -1;
return 1;
}
void
force_reset()
{
// reset the UDP connection.
int i_state;
// Take the hardware off line
*AT91C_PIOA_PER = (1 << 16);
*AT91C_PIOA_OER = (1 << 16);
*AT91C_PIOA_SODR = (1 << 16);
*AT91C_PMC_SCDR = AT91C_PMC_UDP;
*AT91C_PMC_PCDR = (1 << AT91C_ID_UDP);
systick_wait_ms(2);
// now bring it back online
i_state = interrupts_get_and_disable();
/* Make sure the USB PLL and clock are set up */
*AT91C_CKGR_PLLR |= AT91C_CKGR_USBDIV_1;
*AT91C_PMC_SCER = AT91C_PMC_UDP;
*AT91C_PMC_PCER = (1 << AT91C_ID_UDP);
*AT91C_UDP_FADDR = 0;
*AT91C_UDP_GLBSTATE = 0;
/* Enable the UDP pull up by outputting a zero on PA.16 */
*AT91C_PIOA_PER = (1 << 16);
*AT91C_PIOA_OER = (1 << 16);
*AT91C_PIOA_CODR = (1 << 16);
*AT91C_UDP_IDR = ~0;
/* Set up default state */
reset();
*AT91C_UDP_IER = (AT91C_UDP_EPINT0 | AT91C_UDP_RXSUSP | AT91C_UDP_RXRSM);
if (i_state)
interrupts_enable();
}
int uart_us0_init_irq(void)
{
int i_state;
U32 isr;
isr = (U32) uart_isr_entry_0;
i_state = interrupts_get_and_disable();
*AT91C_US0_IDR = 0xFFFFFFFF;
// Set up UART(0) interrupt
aic_mask_off(AT91C_PERIPHERAL_ID_US0);
aic_set_vector(AT91C_PERIPHERAL_ID_US0, AIC_INT_LEVEL_NORMAL, isr);
aic_mask_on(AT91C_PERIPHERAL_ID_US0);
//*AT91C_US0_IER = 1; // Enable rx and tx interrupts. This should cause a bogus tx int
//if (i_state)
// interrupts_enable();
return i_state;
}
SINT main(void)
{
#ifdef NO_RUN_ENTER_STOP_EXIT
init_OS_flag(); /* this should be called before device init */
nxt_device_init();
ecrobot_initDeviceStatus(); // added 10/28/2010 to fix a bug by tchikama
ecrobot_init_nxtstate();
if (execution_mode() == EXECUTED_FROM_FLASH)
{
/*
* Call buttons_get() because ecrobot_get_button_state() has button bouncer.
* The button bouncer requires multiple periodical calls to make it work, but
* in this case, only single call (no while loop), so buttons_get is called.
*/
if ((buttons_get() & 0x0F) == (ENTER_PRESSED | STOP_PRESSED))
{
/* set flash request and shut down the NXT
* at the next start, NXT BIOS will be executed.
*/
display_clear(0);
display_goto_xy(0, 0);
display_string("PWR ON: NXT BIOS");
display_update();
systick_wait_ms(1000);
set_flash_request();
display_clear(1);
systick_wait_ms(10);
nxt_lcd_power_down(); /* reset LCD hardware */
systick_wait_ms(10);
while(1)
{
nxt_avr_power_down();
}
}
}
/* device init should be called prior to running the application */
ecrobot_device_initialize();
ecrobot_setDeviceInitialized();
nxt_motor_set_count(NXT_PORT_A, 0);
nxt_motor_set_count(NXT_PORT_B, 0);
nxt_motor_set_count(NXT_PORT_C, 0);
cpp_constructor();
display_clear(1);
systick_wait_ms(10);
#ifdef NXT_JSP
interrupts_get_and_disable();
#else
disable_int(); /* set_OS_flag and Start OS have to be atomic */
#endif
set_OS_flag(); /* this shoud be called before starting OS */
#ifdef NXT_JSP
lejos_osek_run(); /* start TOPPERS JSP */
#else
StartOS(1); /* start TOPPERS OSEK */
#endif
/* never reached here */
#else
/*
* Default start up sequence
*/
U32 st;
U32 last_act_time = 0;
U32 flash_req_cnt = 0;
init_OS_flag(); /* this should be called before device init */
nxt_device_init();
ecrobot_initDeviceStatus(); // added 10/28/2010 to fix a bug by tchikama
ecrobot_init_nxtstate();
show_splash_screen();
show_main_screen();
display_status_bar(1); /* clear status bar */
add_status_info(execution_mode());
display_status_bar(0); /* update status bar */
while(1)
{
/* device init should be called prior to running the application */
ecrobot_device_initialize();
ecrobot_setDeviceInitialized();
/* check the buttons every 10msec */
st = systick_get_ms();
if (st >= last_act_time + 10)
{
last_act_time = st;
ecrobot_poll_nxtstate();
display_status_bar(0);
/*
* executed in FLASH: setup for the application flash
* executed in SRAM: no effect
*/
if ((ecrobot_get_button_state() == (ENTER_PRESSED | STOP_PRESSED)) &&
(execution_mode() == EXECUTED_FROM_FLASH))
{
flash_req_cnt++;
/* keep pusing ENTER + STOP buttons more than 1000msec */
if (flash_req_cnt >= 100)
{
/* set flash request and shut down the NXT
* at the next start, NXT BIOS will be executed.
*/
ecrobot_device_terminate();
set_flash_request();
display_clear(1);
systick_wait_ms(10);
nxt_lcd_power_down(); /* reset LCD hardware */
systick_wait_ms(10);
while(1)
{
nxt_avr_power_down();
}
}
}
else
{
flash_req_cnt = 0;
if ((ecrobot_get_button_state() == EXIT_PRESSED) || (systick_get_ms() > SLEEP_TIME))
{
/* shut down the NXT */
ecrobot_device_terminate();
display_clear(1);
systick_wait_ms(10);
nxt_lcd_power_down(); /* reset LCD hardware */
systick_wait_ms(10);
while(1)
{
nxt_avr_power_down();
}
}
else if (ecrobot_get_button_state() == RUN_PRESSED)
{
nxt_motor_set_count(NXT_PORT_A, 0);
nxt_motor_set_count(NXT_PORT_B, 0);
nxt_motor_set_count(NXT_PORT_C, 0);
cpp_constructor();
display_clear(1);
systick_wait_ms(10);
#ifdef NXT_JSP
interrupts_get_and_disable();
#else
disable_int(); /* set_OS_flag and Start OS have to be atomic */
#endif
set_OS_flag(); /* this shoud be called before starting OS */
#ifdef NXT_JSP
lejos_osek_run(); /* start TOPPERS JSP */
#else
StartOS(1); /* start TOPPERS OSEK */
#endif
/* never reached here */
}
}
}
}
#endif
return 0;
}
int
uart_init(U32 u, U32 baudRate, U32 dataBits, U32 stopBits, char parity)
{
struct soft_uart *p = &uart[u];
volatile struct _AT91S_USART *up;
int i_state;
U32 peripheral_id;
U32 mode;
U8 dummy;
U32 isr;
U32 pinmask = 0;
int error = 0;
if (u >= N_UARTS)
return 0;
p = &uart[u];
/* Initialise the uart structure */
switch (u) {
case 0:
p->uart = AT91C_BASE_US0;
peripheral_id = AT91C_PERIPHERAL_ID_US0;
pinmask = (1 << 5) | (1 << 6);
isr = (U32) uart_isr_entry_0;
break;
case 1:
p->uart = AT91C_BASE_US1;
peripheral_id = AT91C_PERIPHERAL_ID_US1;
pinmask = (1 << 21) | (1 << 22); // todo
isr = (U32) uart_isr_entry_1;
break;
default:
return 0;
}
byte_fifo_init(&p->tx, &tx_buffer[u][0], TX_FIFO_SIZE);
byte_fifo_init(&p->rx, &rx_buffer[u][0], RX_FIFO_SIZE);
p->transmitting = 0;
up = p->uart;
mode = 0;
switch (dataBits) {
case 7:
mode |= 0x80;
break;
case 8:
mode |= 0xc0;
break;
default:
error = 1;
}
switch (stopBits) {
case 1:
mode |= 0x00000000;
break;
case 15:
mode |= 0x00001000;
break;
case 2:
mode |= 0x00002000;
break;
default:
error = 1;
}
switch (parity) {
case 'N':
mode |= 0x00000800;
break;
case 'O':
mode |= 0x00000200;
break;
case 'E':
mode |= 0x00000000;
break;
case 'M':
mode |= 0x00000600;
break;
case 'S':
mode |= 0x00000400;
break;
default:
error = 1;
}
if (error)
return 0;
i_state = interrupts_get_and_disable();
/* Grab the clock we need */
*AT91C_PMC_PCER = (1 << AT91C_PERIPHERAL_ID_PIOA); /* Need PIO too */
*AT91C_PMC_PCER = (1 << peripheral_id);
/* Grab the pins we need */
*AT91C_PIOA_PDR = pinmask;
*AT91C_PIOA_ASR = pinmask;
up->US_CR = 0x5AC; // Disable
up->US_MR = mode;
up->US_IDR = 0xFFFFFFFF;
up->US_BRGR = uart_calc_divisor(baudRate); // rw Baud rate generator
up->US_RTOR = 0; // rw Receiver timeout
up->US_TTGR = 0; // rw Transmitter time guard
up->US_RPR = 0; // rw Receiver pointer
up->US_RCR = 0; // rw Receiver counter
up->US_TPR = 0; // rw Transmitter pointer
up->US_TCR = 0; // rw Transmitter counter
// Set up UART interrupt
aic_mask_off(peripheral_id);
aic_set_vector(peripheral_id, AIC_INT_LEVEL_NORMAL, isr);
aic_mask_on(peripheral_id);
// Finally enable the UART
up->US_CR = 0x50; // enable tx and rx
dummy = up->US_RHR; // dummy read.
up->US_IER = 1; //Enable rx and tx interrupts. This should cause a bogus tx int
if (i_state)
interrupts_enable();
return 1;
}
