Example #1
0
const char *
pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih, char *buf,
    size_t len)
{
	pci_chipset_tag_t ipc;

	for (ipc = pc; ipc != NULL; ipc = ipc->pc_super) {
		if ((ipc->pc_present & PCI_OVERRIDE_INTR_STRING) == 0)
			continue;
		return (*ipc->pc_ov->ov_intr_string)(ipc->pc_ctx, pc, ih,
		    buf, len);
	}

	return intr_string(ih & ~MPSAFE_MASK, buf, len);
}
Example #2
0
const char *
gtpci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t pih)
{
	return intr_string(pih);
}
Example #3
0
void
gtpci_attach(struct device *parent, struct device *self, void *aux)
{
	struct pcibus_attach_args pba;
	struct gt_attach_args * const ga = aux;
	struct gt_softc * const gt = device_private(parent);
	struct gtpci_softc * const gtp = device_private(self);
	struct gtpci_chipset * const gtpc = &gtp->gtpci_gtpc;
	struct pci_chipset * const pc = &gtpc->gtpc_pc;
	const int busno = ga->ga_unit;
	uint32_t data;

	GT_PCIFOUND(gt, ga);

	pc->pc_funcs = &gtpci_functions;
	pc->pc_parent = self;

	gtpc->gtpc_busno = busno;
	gtpc->gtpc_cfgaddr = PCI_CONFIG_ADDR(busno);
	gtpc->gtpc_cfgdata = PCI_CONFIG_DATA(busno);
	gtpc->gtpc_syncreg = PCI_SYNC_REG(busno);
	gtpc->gtpc_gt_memt = ga->ga_memt;
	gtpc->gtpc_gt_memh = ga->ga_memh;

	/*
	 * Let's find out where we are located.
	 */
	data = gtpci_read(gtpc, PCI_P2P_CONFIGURATION(gtpc->gtpc_busno));
	gtpc->gtpc_self = gtpci_make_tag(&gtpc->gtpc_pc,
		PCI_P2PCFG_BusNum_GET(data), PCI_P2PCFG_DevNum_GET(data), 0);


	switch (busno) {
	case 0:
		gtpc->gtpc_io_bs = gt->gt_pci0_iot;
		gtpc->gtpc_mem_bs = gt->gt_pci0_memt;
		gtpc->gtpc_host = gt->gt_pci0_host;
		break;
	case 1:
		gtpc->gtpc_io_bs = gt->gt_pci1_iot;
		gtpc->gtpc_mem_bs = gt->gt_pci1_memt;
		gtpc->gtpc_host = gt->gt_pci1_host;
		break;
	default:
		break;
	}

	/*
	 * If no bus_spaces exist, then it's been disabled.
	 */
	if (gtpc->gtpc_io_bs == NULL && gtpc->gtpc_mem_bs == NULL) {
		aprint_normal(": disabled\n");
		return;
	}

	aprint_normal("\n");

	/*
	 * clear any pre-existing error interrupt(s)
	 * clear latched pci error registers
	 * establish ISRs for PCI errors
	 * enable PCI error interrupts
	 */
	gtpci_write(gtpc, PCI_ERROR_MASK(gtpc->gtpc_busno), 0);
	gtpci_write(gtpc, PCI_ERROR_CAUSE(gtpc->gtpc_busno), 0);
	(void)gtpci_read(gtpc, PCI_ERROR_DATA_LOW(gtpc->gtpc_busno));
	(void)gtpci_read(gtpc, PCI_ERROR_DATA_HIGH(gtpc->gtpc_busno));
	(void)gtpci_read(gtpc, PCI_ERROR_COMMAND(gtpc->gtpc_busno));
	(void)gtpci_read(gtpc, PCI_ERROR_ADDRESS_HIGH(gtpc->gtpc_busno));
	(void)gtpci_read(gtpc, PCI_ERROR_ADDRESS_LOW(gtpc->gtpc_busno));
	if (gtpc->gtpc_host) {
		intr_establish(pci_irqs[gtpc->gtpc_busno][0], IST_LEVEL,
		    IPL_VM, gtpci_error_intr, pc);
		intr_establish(pci_irqs[gtpc->gtpc_busno][1], IST_LEVEL,
		    IPL_VM, gtpci_error_intr, pc);
		intr_establish(pci_irqs[gtpc->gtpc_busno][2], IST_LEVEL,
		    IPL_VM, gtpci_error_intr, pc);
		aprint_normal_dev(pc->pc_parent, "%s%d error interrupts at irqs %s, %s, %s\n",
		    "pci", busno,
		    intr_string(pci_irqs[gtpc->gtpc_busno][0]),
		    intr_string(pci_irqs[gtpc->gtpc_busno][1]),
		    intr_string(pci_irqs[gtpc->gtpc_busno][2]));
		gtpci_write(gtpc, PCI_ERROR_MASK(gtpc->gtpc_busno),
		    PCI_SERRMSK_ALL_ERRS);
	}

	/*
	 * Fill in the pci_bus_attach_args
	 */
	pba.pba_pc = pc;
	pba.pba_bus = 0;
	pba.pba_iot = gtpc->gtpc_io_bs;
	pba.pba_memt = gtpc->gtpc_mem_bs;
	pba.pba_dmat = gt->gt_dmat;
	pba.pba_flags = 0;
	if (pba.pba_iot != NULL)
		pba.pba_flags |= PCI_FLAGS_IO_ENABLED;
	if (pba.pba_memt != NULL)
		pba.pba_flags |= PCI_FLAGS_MEM_ENABLED;

	data = gtpci_read(gtpc, PCI_COMMAND(gtpc->gtpc_busno));
	if (data & PCI_CMD_MRdMul)
		pba.pba_flags |= PCI_FLAGS_MRM_OKAY;
	if (data & PCI_CMD_MRdLine)
		pba.pba_flags |= PCI_FLAGS_MRL_OKAY;
	pba.pba_flags |= PCI_FLAGS_MWI_OKAY;

	gt_watchdog_service();
	/*
	 * Configure the pci bus.
	 */
	config_found_ia(self, "pcibus", &pba, gtpci_cfprint);

	gt_watchdog_service();

}