uint16_t ti89_get_word(uint32_t adr)
{
// RAM access
if(IN_BOUNDS(0x000000, adr, 0x1fffff))
{
return get_w(tihw.ram, adr, RAM_SIZE_TI89 - 1);
}
// FLASH access
else if(IN_BOUNDS(0x200000, adr, 0x5fffff))
{
return get_w(tihw.rom, adr, ROM_SIZE_TI89 - 1) | wsm.ret_or;
}
// memory-mapped I/O
else if(IN_BOUNDS(0x600000, adr, 0x6fffff))
{
return io_get_word(adr);
}
// memory-mapped I/O (hw2)
else if(IN_RANGE(adr, 0x700000, IO2_SIZE_TI89))
{
return io2_get_word(adr);
}
return 0x1414;
}
uint16_t ti89t_get_word(uint32_t adr)
{
// RAM access
if(IN_BOUNDS(0x000000, adr, 0x03ffff) ||
IN_BOUNDS(0x200000, adr, 0x23ffff) ||
IN_BOUNDS(0x400000, adr, 0x43ffff))
{
return get_w(tihw.ram, adr, 0x03ffff);
}
// FLASH access
else if(IN_BOUNDS(0x800000, adr, 0xbfffff))
{
return FlashReadWord(adr);
}
// memory-mapped I/O
else if(IN_BOUNDS(0x600000, adr, 0x6fffff))
{
return io_get_word(adr);
}
// memory-mapped I/O (hw2)
else if(IN_RANGE(adr, 0x700000, IO2_SIZE_TI89T))
{
return io2_get_word(adr);
}
// memory-mapped I/O (hw3)
else if(IN_RANGE(adr, 0x710000, IO3_SIZE_TI89T))
{
return io3_get_word(adr);
}
return 0x1414;
}
uint32_t io2_get_long(uint32_t addr)
{
return (((uint32_t)io2_get_word(addr))<<16) | io2_get_word(addr+2);
}