void psxDma0(u32 adr, u32 bcr, u32 chcr) {
int cmd = mdec.command;
MDEC_LOG("DMA0 %lx %lx %lx", adr, bcr, chcr);
if (chcr != 0x01000201) return;
// bcr LSBs are the blocksize in words
// bcr MSBs are the number of block
int size = (bcr >> 16)*(bcr & 0xffff);
if (size < 0) {
// Need to investigate what happen if the transfer is huge
Console.Error("psxDma0 DMA transfer overflow !");
return;
}
for (int i = 0; i<(size); i++) {
*(u32*)PSXM(((i + 0) * 4)) = iopMemRead32(adr + ((i + 0) * 4));
if (i <20)
MDEC_LOG(" data %08X %08X ", iopMemRead32((adr & 0x00FFFFFF) + (i * 4)), *(u32*)PSXM((i * 4)));
}
if (cmd == 0x40000001) {
u8 *p = (u8*)PSXM(0); //u8 *p = (u8*)PSXM(adr);
iqtab_init(iq_y, p);
iqtab_init(iq_uv, p + 64);
}
else if ((cmd & 0xf5ff0000) == 0x30000000) {
mdec.rl = (u16*)PSXM(0); //mdec.rl = (u16*)PSXM(adr);
}
HW_DMA0_CHCR &= ~0x01000000;
psxDmaInterrupt(0);
}
void psxDma1(u32 adr, u32 bcr, u32 chcr) {
int blk[DCTSIZE2*6];
unsigned short *image;
MDEC_LOG("DMA1 %lx %lx %lx (cmd = %lx)", adr, bcr, chcr, mdec.command);
if (chcr != 0x01000200) return;
// bcr LSBs are the blocksize in words
// bcr MSBs are the number of block
int size = (bcr >> 16)*(bcr & 0xffff);
int size2 = (bcr >> 16)*(bcr & 0xffff);
if (size < 0) {
// Need to investigate what happen if the transfer is huge
Console.Error("psxDma1 DMA transfer overflow !");
return;
}
image = (u16*)mdecArr2;//(u16*)PSXM(0); //image = (u16*)PSXM(adr);
if (mdec.command&0x08000000) {
for (;size>0;size-=(16*16)/2,image+=(16*16)) {
mdec.rl = rl2blk(blk,mdec.rl);
yuv2rgb15(blk,image);
}
} else {
for (;size>0;size-=(24*16)/2,image+=(24*16)) {
mdec.rl = rl2blk(blk,mdec.rl);
yuv2rgb24(blk,(u8 *)image);
}
}
for (int i = 0; i<(size2); i++) {
iopMemWrite32(((adr & 0x00FFFFFF) + (i * 4) + 0), mdecArr2[i]);
if (i <20)
MDEC_LOG(" data %08X %08X ", iopMemRead32((adr & 0x00FFFFFF) + (i * 4)), mdecArr2[i]);
}
HW_DMA1_CHCR &= ~0x01000000;
psxDmaInterrupt(1);
}
u32 R3000DebugInterface::read32(u32 address)
{
if (!isValidAddress(address))
return -1;
return iopMemRead32(address);
}
void _ApplyPatch(IniPatch *p)
{
if (p->enabled == 0) return;
switch (p->cpu)
{
case CPU_EE:
switch (p->type)
{
case BYTE_T:
if (memRead8(p->addr) != (u8)p->data)
memWrite8(p->addr, (u8)p->data);
break;
case SHORT_T:
if (memRead16(p->addr) != (u16)p->data)
memWrite16(p->addr, (u16)p->data);
break;
case WORD_T:
if (memRead32(p->addr) != (u32)p->data)
memWrite32(p->addr, (u32)p->data);
break;
case DOUBLE_T:
u64 mem;
memRead64(p->addr, &mem);
if (mem != p->data)
memWrite64(p->addr, &p->data);
break;
case EXTENDED_T:
handle_extended_t(p);
break;
default:
break;
}
break;
case CPU_IOP:
switch (p->type)
{
case BYTE_T:
if (iopMemRead8(p->addr) != (u8)p->data)
iopMemWrite8(p->addr, (u8)p->data);
break;
case SHORT_T:
if (iopMemRead16(p->addr) != (u16)p->data)
iopMemWrite16(p->addr, (u16)p->data);
break;
case WORD_T:
if (iopMemRead32(p->addr) != (u32)p->data)
iopMemWrite32(p->addr, (u32)p->data);
break;
default:
break;
}
break;
default:
break;
}
}
