/****************************************************************************** * Routine: try_unlock_sram() * Description: If chip is GP/EMU(special) type, unlock the SRAM for * general use. *****************************************************************************/ void try_unlock_memory() { int mode; int in_sdram = is_running_in_sdram(); /* * if GP device unlock device SRAM for general use * secure code breaks for Secure/Emulation device - HS/E/T */ mode = get_device_type(); if (mode == GP_DEVICE) secure_unlock_mem(); /* * If device is EMU and boot is XIP external booting * Unlock firewalls and disable L2 and put chip * out of secure world * * Assuming memories are unlocked by the demon who put us in SDRAM */ if ((mode <= EMU_DEVICE) && (get_boot_type() == 0x1F) && (!in_sdram)) { secure_unlock_mem(); secureworld_exit(); } return; }
/* do some early init */ void s_init(void) { int in_sdram = 0; #ifdef CONFIG_SPL in_sdram = is_running_in_sdram(); #endif watchdog_init(); sw_gpio_init(); clock_init(); gpio_init(); #ifdef CONFIG_SPL if (!in_sdram) sdram_init(); #endif }
/****************************************************************************** * Routine: s_init * Description: Does early system init of muxing and clocks. * - Called path is with SRAM stack. *****************************************************************************/ void s_init(void) { int in_sdram = is_running_in_sdram(); watchdog_init(); try_unlock_memory(); /* * Right now flushing at low MPU speed. * Need to move after clock init */ invalidate_dcache(get_device_type()); #ifdef CONFIG_L2_OFF l2_cache_disable(); #else l2_cache_enable(); #endif /* * Writing to AuxCR in U-boot using SMI for GP DEV * Currently SMI in Kernel on ES2 devices seems to have an issue * Once that is resolved, we can postpone this config to kernel */ if (get_device_type() == GP_DEVICE) setup_auxcr(); set_muxconf_regs(); sdelay(100); prcm_init(); per_clocks_enable(); #ifdef CONFIG_USB_EHCI_OMAP ehci_clocks_enable(); #endif #ifdef CONFIG_SPL_BUILD preloader_console_init(); timer_init(); #endif if (!in_sdram) mem_init(); }
/****************************************************************************** * Routine: s_init * Description: Does early system init of muxing and clocks. * - Called path is with SRAM stack. *****************************************************************************/ void s_init(void) { int in_sdram = is_running_in_sdram(); watchdog_init(); try_unlock_memory(); /* * Right now flushing at low MPU speed. * Need to move after clock init */ v7_flush_dcache_all(get_device_type()); #ifndef CONFIG_ICACHE_OFF icache_enable(); #endif #ifdef CONFIG_L2_OFF l2cache_disable(); #else l2cache_enable(); #endif /* * Writing to AuxCR in U-boot using SMI for GP DEV * Currently SMI in Kernel on ES2 devices seems to have an issue * Once that is resolved, we can postpone this config to kernel */ if (get_device_type() == GP_DEVICE) setup_auxcr(); set_muxconf_regs(); delay(100); prcm_init(); per_clocks_enable(); if (!in_sdram) sdrc_init(); }