/** * @fn ixEthAccSingleEthNpeCheck(IxEthAccPortId portId) * * @brief Check the npe exists for this port * * @param IxEthAccPortId portId[in] port * * @return IxEthAccStatus * * @internal */ IX_ETH_ACC_PUBLIC IxEthAccStatus ixEthAccSingleEthNpeCheck(IxEthAccPortId portId) { /* If not IXP42X A0 stepping, proceed to check for existence of coprocessors */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { if ((IX_ETH_PORT_1 == portId) && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) == IX_FEATURE_CTRL_COMPONENT_ENABLED)) { return IX_ETH_ACC_SUCCESS; } if ((IX_ETH_PORT_2 == portId) && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) == IX_FEATURE_CTRL_COMPONENT_ENABLED)) { return IX_ETH_ACC_SUCCESS; } if ((IX_ETH_PORT_3 == portId) && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA_ETH) == IX_FEATURE_CTRL_COMPONENT_ENABLED)) { return IX_ETH_ACC_SUCCESS; } return IX_ETH_ACC_FAIL; } return IX_ETH_ACC_SUCCESS; }
void ixQMgrDispatcherLoopGet (IxQMgrDispatcherFuncPtr *qDispatcherFuncPtr) { IxFeatureCtrlProductId productId = 0; IxFeatureCtrlDeviceId deviceId = 0; /* Get the device ID for the underlying silicon */ deviceId = ixFeatureCtrlDeviceRead(); /* Get the product ID for the underlying silicon */ productId = ixFeatureCtrlProductIdRead (); /* IF (IXP42X AND A0 silicon) -> use ixQMgrDispatcherLoopRunA0 */ if ((IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X == (IX_FEATURE_CTRL_DEVICE_TYPE_MASK & deviceId)) && (IX_FEATURE_CTRL_SILICON_TYPE_A0 == (IX_FEATURE_CTRL_SILICON_STEPPING_MASK & productId))) { /*For IXP42X A0 silicon */ *qDispatcherFuncPtr = &ixQMgrDispatcherLoopRunA0 ; } else /*For IXP42X B0 or IXP46X silicon*/ { if (IX_FEATURE_CTRL_SWCONFIG_ENABLED == ixQMgrOrigB0Dispatcher) { /* Default for IXP42X B0 and IXP46X silicon */ *qDispatcherFuncPtr = &ixQMgrDispatcherLoopRunB0; } else { /* FeatureCtrl indicated that livelock dispatcher be used */ *qDispatcherFuncPtr = &ixQMgrDispatcherLoopRunB0LLP; } } }
IxEthAccStatus ixEthAccMiiInit() { if(ixOsalMutexInit(&miiAccessLock)!= IX_SUCCESS) { return IX_ETH_ACC_FAIL; } /* Use NPE-B MAC coprocessor for MII since IXP42X and IXP46X product line * only has this MAC coprocessor to communicate with PHY through * MDIO interface. */ if( (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X == ixFeatureCtrlDeviceRead ()) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP46X == ixFeatureCtrlDeviceRead ()) ) { miiBaseAddressVirt = (UINT32) IX_OSAL_MEM_MAP(IX_ETH_ACC_MAC_0_BASE, IX_ETH_ACC_MAC_0_MAP_SIZE); } if( IX_FEATURE_CTRL_DEVICE_TYPE_IXP43X == ixFeatureCtrlDeviceRead () ) { /* Use NPE-C MAC coprocessor for MII since IXP43X product line * only has this MAC coprocessor to communicate with PHY through * MDIO interface. */ miiBaseAddressVirt = (UINT32) IX_OSAL_MEM_MAP(IX_ETH_ACC_MAC_1_BASE, IX_ETH_ACC_MAC_1_MAP_SIZE); } if (miiBaseAddressVirt == 0) { ixOsalLog(IX_OSAL_LOG_LVL_FATAL, IX_OSAL_LOG_DEV_STDOUT, "EthAcc: Could not map MII I/O mapped memory\n", 0, 0, 0, 0, 0, 0); return IX_ETH_ACC_FAIL; } REG_WRITE(miiBaseAddressVirt, IX_ETH_ACC_MAC_CORE_CNTRL, IX_ETH_ACC_CORE_MDC_EN); return IX_ETH_ACC_SUCCESS; }
/** * @ingroup IxTimeSyncAccCodelet * * @fn ixTimeSyncAccCodeletEthInit () * * @brief This function allocates resources and initializes every relevant * component that is needed for PTP message transmission from * each NPE. * * @return void */ PRIVATE IX_STATUS ixTimeSyncAccCodeletEthInit () { UINT32 channel, count; IxEthAccPortId portId; IxFeatureCtrlComponentType npe; IX_OSAL_MBUF *mBufPtr; /* check if the device is IXP46X */ if (IX_FEATURE_CTRL_DEVICE_TYPE_IXP46X != ixFeatureCtrlDeviceRead ()) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: this device is not IXP46X\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } /* check if all NPEs are enabled */ for (channel = 0, npe = IX_FEATURECTRL_NPEA; npe <= IX_FEATURECTRL_NPEC; npe++, channel++) { if (IX_FEATURE_CTRL_COMPONENT_ENABLED != ixFeatureCtrlComponentCheck (npe)) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: %s is not enabled\n", (UINT32) ixTimeSyncAccCodeletTSChannelLabel[channel], 0, 0, 0, 0, 0); return IX_FAIL; } } /* allocate mBufs */ ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_MBUF_ALLOC].initialized = TRUE; for (count = 0; count < IX_TIMESYNCACC_CODELET_MAX_TS_CHANNELS; count++) { mBufPtr = ixTimeSyncAccCodeletMbufAllocate (); if (NULL != mBufPtr) { ixTimeSyncAccCodeletGlobalMBuf[count] = mBufPtr; } else { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to allocate mBufs\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } } /* initialize Q Mgr */ if (IX_SUCCESS != ixQMgrInit ()) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize queue manager\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_Q_MGR].initialized = TRUE; /* start Q Mgr dispatcher */ if (IX_SUCCESS != ixTimeSyncAccCodeletDispatcherStart ()) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to start queue manager dispatch loop\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_DISPATCHER].initialized = TRUE; /* initialize NPE message handler */ if (IX_SUCCESS != ixNpeMhInitialize (IX_NPEMH_NPEINTERRUPTS_YES)) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize NPE Message Handler\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_NPE_MH].initialized = TRUE; /* download NPE A's image with basic Ethernet Rx/Tx and activate NPE A */ if (IX_SUCCESS != ixNpeDlNpeInitAndStart (IX_NPEDL_NPEIMAGE_NPEA_ETH)) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize and start NPE A\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_NPE_A].initialized = TRUE; ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_NPE_DL].initialized = TRUE; /* download NPE B's image with basic Ethernet Rx/Tx and activate NPE B */ if (IX_SUCCESS != ixNpeDlNpeInitAndStart (IX_NPEDL_NPEIMAGE_NPEB_ETH)) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize and start NPE B\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_NPE_B].initialized = TRUE; /* download NPE C's image with basic Ethernet Rx/Tx and activate NPE C */ if (IX_SUCCESS != ixNpeDlNpeInitAndStart (IX_NPEDL_NPEIMAGE_NPEC_ETH)) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize and start NPE C\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_NPE_C].initialized = TRUE; /* initialize Ethernet Access component */ if (IX_ETH_ACC_SUCCESS != ixEthAccInit()) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize Ethernet access driver\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_ETH_ACC].initialized = TRUE; /* initialize all ethernet ports */ for (portId = IX_ETH_PORT_1; portId <= IX_ETH_PORT_3; portId++) { if (IX_ETH_ACC_SUCCESS != ixEthAccPortInit (portId)) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to initialize Ethernet port %d\n", portId, 0, 0, 0, 0, 0); return IX_FAIL; } } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_ETH_PORTS].initialized = TRUE; /* spawn new thread to transmit PTP message from each NPEs */ if (IX_SUCCESS != ixTimeSyncAccCodeletNewThreadCreate ((IxOsalVoidFnPtr)ixTimeSyncAccCodeletPTPMsgTransmit, "Tx Thread")) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "ixTimeSyncAccCodeletEthInit: failed to spawn Tx Thread\n", 0, 0, 0, 0, 0, 0); return IX_FAIL; } ixTimeSyncAccCodeletUninitFuncMap[IX_TIMESYNCACC_CODELET_TX_PTP].initialized = TRUE; return IX_SUCCESS; } /* end of ixTimeSyncAccCodeletEthInit function */
IX_ETH_DB_PUBLIC IxEthDBStatus ixEthDBSingleEthNpeCheck(IxEthDBPortId portID) { UINT8 functionalityId; IxEthNpeNodeId npeId = IX_ETHNPE_PHYSICAL_ID_TO_NODE(portID); if (IX_SUCCESS != ixNpeDlLoadedImageFunctionalityGet(npeId, &functionalityId)) { return IX_ETH_DB_FAIL; } else { /* If not IXP42X A0 stepping, proceed to check for existence of NPEs and ethernet coprocessors */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { switch(npeId) { case IX_NPEDL_NPEID_NPEA: if ((ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == IX_FEATURE_CTRL_COMPONENT_DISABLED) || ((ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA_ETH) == IX_FEATURE_CTRL_COMPONENT_DISABLED) || (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) == IX_FEATURE_CTRL_COMPONENT_DISABLED))) { return IX_ETH_DB_FAIL; } break; case IX_NPEDL_NPEID_NPEB: if ( (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB) == IX_FEATURE_CTRL_COMPONENT_DISABLED) ) { return IX_ETH_DB_FAIL; } if (portID == 0) { if( ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) == IX_FEATURE_CTRL_COMPONENT_DISABLED) { return IX_ETH_DB_FAIL; } } else /* ports 1-3 */ { if( ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB_ETH) == IX_FEATURE_CTRL_COMPONENT_DISABLED) { return IX_ETH_DB_FAIL; } } break; case IX_NPEDL_NPEID_NPEC: if ((ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC) == IX_FEATURE_CTRL_COMPONENT_DISABLED) || ((ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) == IX_FEATURE_CTRL_COMPONENT_DISABLED) || (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) == IX_FEATURE_CTRL_COMPONENT_DISABLED))) { return IX_ETH_DB_FAIL; } break; default: /* invalid NPE */ return IX_ETH_DB_FAIL; } } return IX_ETH_DB_SUCCESS; } }
/* * Function definition: ixNpeDlNpeInitAndStartInternal */ PRIVATE IX_STATUS ixNpeDlNpeInitAndStartInternal (UINT32 *imageLibrary, UINT32 imageId) { UINT32 imageSize; UINT32 *imageCodePtr = NULL; IX_STATUS status; IxNpeDlNpeId npeId = IX_NPEDL_NPEID_FROM_IMAGEID_GET(imageId); IxFeatureCtrlDeviceId deviceId = IX_NPEDL_DEVICEID_FROM_IMAGEID_GET(imageId); IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, "Entering ixNpeDlNpeInitAndStartInternal\n"); ixNpeDlStats.attemptedDownloads++; /* Check input parameter device correctness */ if ((deviceId >= IX_FEATURE_CTRL_DEVICE_TYPE_MAX) || (deviceId < IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X)) { status = IX_NPEDL_PARAM_ERR; IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeInitAndStartInternal - " "invalid parameter\n"); } /* End valid device id checking */ /* Check input parameters */ else if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0)) { status = IX_NPEDL_PARAM_ERR; IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeInitAndStartInternal - " "invalid parameter\n"); } else { /* Ensure initialisation has been completed */ ixNpeDlNpeMgrInit(); /* Checking if image being loaded is meant for device that is running. * Image is forward compatible. i.e Image built for IXP42X should run * on IXP46X but not vice versa.*/ if (deviceId > (ixFeatureCtrlDeviceRead() & IX_FEATURE_CTRL_DEVICE_TYPE_MASK)) { IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeInitAndStartInternal - " "Device type mismatch. NPE Image not " "meant for device in use \n"); return IX_NPEDL_DEVICE_ERR; }/* if statement - matching image device and current device */ /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { if (npeId == IX_NPEDL_NPEID_NPEA) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == IX_FEATURE_CTRL_COMPONENT_DISABLED) { IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does" " not exist\n"); return IX_SUCCESS; } } /* end of if(npeId) */ else if (npeId == IX_NPEDL_NPEID_NPEB) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified" " does not exist\n"); return IX_SUCCESS; } } /* end of elseif(npeId) */ else if (npeId == IX_NPEDL_NPEID_NPEC) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified" " does not exist\n"); return IX_SUCCESS; } } /* end of elseif(npeId) */ } /* end of if not IXP42X-A0 Silicon */ /* stop and reset the NPE */ status = ixNpeDlNpeStopAndReset (npeId); if (IX_SUCCESS != status) { IX_NPEDL_ERROR_REPORT ("Failed to stop and reset NPE\n"); return status; } /* Locate image */ status = ixNpeDlImageMgrImageFind (imageLibrary, imageId, &imageCodePtr, &imageSize); if (IX_SUCCESS == status) { /* * If download was successful, store image Id in list of * currently loaded images. If a critical error occured * during download, record that the NPE has an invalid image */ status = ixNpeDlNpeMgrImageLoad (npeId, imageCodePtr, TRUE); if (IX_SUCCESS == status) { ixNpeDlNpeState[npeId].validImage = TRUE; ixNpeDlStats.successfulDownloads++; status = ixNpeDlNpeExecutionStart (npeId); } else if ((status == IX_NPEDL_CRITICAL_NPE_ERR) || (status == IX_NPEDL_CRITICAL_MICROCODE_ERR)) { ixNpeDlNpeState[npeId].validImage = FALSE; ixNpeDlStats.criticalFailDownloads++; } /* NOTE - The following section of code is here to support * a deprecated function ixNpeDlLoadedImageGet(). When that * function is removed from the API, this code should be revised. */ ixNpeDlNpeState[npeId].imageId.npeId = npeId; ixNpeDlNpeState[npeId].imageId.functionalityId = IX_NPEDL_FUNCTIONID_FROM_IMAGEID_GET(imageId); ixNpeDlNpeState[npeId].imageId.major = IX_NPEDL_MAJOR_FROM_IMAGEID_GET(imageId); ixNpeDlNpeState[npeId].imageId.minor = IX_NPEDL_MINOR_FROM_IMAGEID_GET(imageId); } /* end of if(IX_SUCCESS) */ /* condition: image located successfully in microcode image */ } /* end of if-else(npeId-deviceId) */ /* condition: parameter checks ok */ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, "Exiting ixNpeDlNpeInitAndStartInternal : " "status = %d\n", status); return status; }
/* * Function definition: ixNpeDlNpeExecutionStop */ PUBLIC IX_STATUS ixNpeDlNpeExecutionStop (IxNpeDlNpeId npeId) { IX_STATUS status = IX_SUCCESS; IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, "Entering ixNpeDlNpeExecutionStop\n"); /* Ensure initialisation has been completed */ ixNpeDlNpeMgrInit(); /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { /* * Check whether NPE is present */ if (IX_NPEDL_NPEID_NPEA == npeId) { /* Check whether NPE A is present */ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { /* NPE A does not present */ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStop - Warning:NPEA does not present.\n"); return IX_SUCCESS; } } /* end of if(IX_NPEDL_NPEID_NPEA) */ else if (IX_NPEDL_NPEID_NPEB == npeId) { /* Check whether NPE B is present */ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { /* NPE B does not present */ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStop - Warning:NPEB does not present.\n"); return IX_SUCCESS; } } /* end of elseif(IX_NPEDL_NPEID_NPEB) */ else if (IX_NPEDL_NPEID_NPEC == npeId) { /* Check whether NPE C is present */ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { /* NPE C does not present */ IX_NPEDL_WARNING_REPORT ("ixNpeDlNpeExecutionStop - Warning:NPEC does not present.\n"); return IX_SUCCESS; } } /* end of elseif(IX_NPEDL_NPEID_NPEC) */ else { /* Invalid NPE ID */ IX_NPEDL_ERROR_REPORT ("ixNpeDlNpeExecutionStop - invalid Npe ID\n"); status = IX_NPEDL_PARAM_ERR; } /* end of if-else(IX_NPEDL_NPEID_NPEC) */ } /* end of if not IXP42X-AO Silicon */ if (status == IX_SUCCESS) { /* call NpeMgr function to stop the NPE */ status = ixNpeDlNpeMgrNpeStop (npeId); } IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, "Exiting ixNpeDlNpeExecutionStop : status = %d\n", status); if (IX_SUCCESS == status) { /* Indicate NPE has been stopped */ ixNpeDlNpeStarted[npeId] = FALSE ; } return status; }
/* * Function definition: ixNpeDlLatestImageGet */ PUBLIC IX_STATUS ixNpeDlLatestImageGet ( IxNpeDlNpeId npeId, IxNpeDlFunctionalityId functionalityId, IxNpeDlImageId *imageIdPtr) { IX_STATUS status; IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, "Entering ixNpeDlLatestImageGet\n"); /* Check input parameters */ if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0) || (imageIdPtr == NULL)) { status = IX_NPEDL_PARAM_ERR; IX_NPEDL_ERROR_REPORT ("ixNpeDlLatestImageGet - " "invalid parameter\n"); } /* end of if(npeId) */ else { /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { if (npeId == IX_NPEDL_NPEID_NPEA && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == IX_FEATURE_CTRL_COMPONENT_DISABLED)) { IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does" " not exist\n"); return IX_SUCCESS; } /* end of if(npeId) */ if (npeId == IX_NPEDL_NPEID_NPEB && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB) == IX_FEATURE_CTRL_COMPONENT_DISABLED)) { IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified does" " not exist\n"); return IX_SUCCESS; } /* end of if(npeId) */ if (npeId == IX_NPEDL_NPEID_NPEC && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC) == IX_FEATURE_CTRL_COMPONENT_DISABLED)) { IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified does" " not exist\n"); return IX_SUCCESS; } /* end of if(npeId) */ } /* end of if not IXP42x-A0 silicon */ imageIdPtr->npeId = npeId; imageIdPtr->functionalityId = functionalityId; imageIdPtr->major = IMAGEID_MAJOR_NUMBER_DEFAULT; imageIdPtr->minor = IMAGEID_MINOR_NUMBER_DEFAULT; /* Call ImageMgr to get list of images listed in Image Library Header */ status = ixNpeDlImageMgrLatestImageExtract(imageIdPtr); } /* end of if-else(npeId) */ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, "Exiting ixNpeDlLatestImageGet : status = %d\n", status); return status; }
/* * Function definition: ixNpeDlLoadedImageGet */ PUBLIC IX_STATUS ixNpeDlLoadedImageGet (IxNpeDlNpeId npeId, IxNpeDlImageId *imageIdPtr) { IX_STATUS status = IX_SUCCESS; IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, "Entering ixNpeDlLoadedImageGet\n"); /* Check input parameters */ if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0) || (imageIdPtr == NULL)) { status = IX_NPEDL_PARAM_ERR; IX_NPEDL_ERROR_REPORT ("ixNpeDlLoadedImageGet - invalid parameter\n"); } else { /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { if (npeId == IX_NPEDL_NPEID_NPEA && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == IX_FEATURE_CTRL_COMPONENT_DISABLED)) { IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does" " not exist\n"); return IX_SUCCESS; } /* end of if(npeId) */ if (npeId == IX_NPEDL_NPEID_NPEB && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB) == IX_FEATURE_CTRL_COMPONENT_DISABLED)) { IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified does" " not exist\n"); return IX_SUCCESS; } /* end of if(npeId) */ if (npeId == IX_NPEDL_NPEID_NPEC && (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC) == IX_FEATURE_CTRL_COMPONENT_DISABLED)) { IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified does" " not exist\n"); return IX_SUCCESS; } /* end of if(npeId) */ } /* end of if not IXP42x-A0 silicon */ if (ixNpeDlNpeState[npeId].validImage) { /* use npeId to get imageId from list of currently loaded images */ *imageIdPtr = ixNpeDlNpeState[npeId].imageId; } else { status = IX_FAIL; } /* end of if-else(ixNpeDlNpeState) */ } /* end of if-else(npeId) */ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, "Exiting ixNpeDlLoadedImageGet : status = %d\n", status); return status; }
/* * Function definition: ixNpeDlImageDownload */ PUBLIC IX_STATUS ixNpeDlImageDownload (IxNpeDlImageId *imageIdPtr, BOOL verify) { UINT32 imageSize; UINT32 *imageCodePtr = NULL; IX_STATUS status; IxNpeDlNpeId npeId = imageIdPtr->npeId; IX_NPEDL_TRACE0 (IX_NPEDL_FN_ENTRY_EXIT, "Entering ixNpeDlImageDownload\n"); ixNpeDlStats.attemptedDownloads++; /* Check input parameters */ if ((npeId >= IX_NPEDL_NPEID_MAX) || (npeId < 0)) { status = IX_NPEDL_PARAM_ERR; IX_NPEDL_ERROR_REPORT ("ixNpeDlImageDownload - invalid parameter\n"); } else { /* Ensure initialisation has been completed */ ixNpeDlNpeMgrInit(); /* If not IXP42X A0 stepping, proceed to check for existence of npe's */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { if (npeId == IX_NPEDL_NPEID_NPEA) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEA) == IX_FEATURE_CTRL_COMPONENT_DISABLED) { IX_NPEDL_WARNING_REPORT("Warning: the NPE A component you specified does" " not exist\n"); return IX_SUCCESS; } } /* end of if(npeId) */ else if (npeId == IX_NPEDL_NPEID_NPEB) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEB)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { IX_NPEDL_WARNING_REPORT("Warning: the NPE B component you specified" " does not exist\n"); return IX_SUCCESS; } } /* end of elseif(npeId) */ else if (npeId == IX_NPEDL_NPEID_NPEC) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_NPEC)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { IX_NPEDL_WARNING_REPORT("Warning: the NPE C component you specified" " does not exist\n"); return IX_SUCCESS; } } /* end of elseif(npeId) */ } /* end of if(IX_FEATURE_CTRL_SILICON_TYPE_B0) */ /*End of Silicon Type Check*/ /* stop and reset the NPE */ if (IX_SUCCESS != ixNpeDlNpeStopAndReset (npeId)) { IX_NPEDL_ERROR_REPORT ("Failed to stop and reset NPE\n"); return IX_FAIL; } /* Locate image */ status = ixNpeDlImageMgrImageLocate (imageIdPtr, &imageCodePtr, &imageSize); if (IX_SUCCESS == status) { /* * If download was successful, store image Id in list of * currently loaded images. If a critical error occured * during download, record that the NPE has an invalid image */ status = ixNpeDlNpeMgrImageLoad (npeId, imageCodePtr, verify); if (IX_SUCCESS == status) { ixNpeDlNpeState[npeId].imageId = *imageIdPtr; ixNpeDlNpeState[npeId].validImage = TRUE; ixNpeDlStats.successfulDownloads++; status = ixNpeDlNpeExecutionStart (npeId); } else if ((status == IX_NPEDL_CRITICAL_NPE_ERR) || (status == IX_NPEDL_CRITICAL_MICROCODE_ERR)) { ixNpeDlNpeState[npeId].imageId = *imageIdPtr; ixNpeDlNpeState[npeId].validImage = FALSE; ixNpeDlStats.criticalFailDownloads++; } } /* end of if(IX_SUCCESS) */ /* condition: image located successfully in microcode image */ } /* end of if-else(npeId) */ /* condition: parameter checks ok */ IX_NPEDL_TRACE1 (IX_NPEDL_FN_ENTRY_EXIT, "Exiting ixNpeDlImageDownload : status = %d\n", status); return status; }
/* * Function definitions. */ void ixQMgrDispatcherInit (void) { int i; IxFeatureCtrlProductId productId = 0; IxFeatureCtrlDeviceId deviceId = 0; BOOL stickyIntSilicon = TRUE; /* Set default priorities */ for (i=0; i< IX_QMGR_MAX_NUM_QUEUES; i++) { dispatchQInfo[i].callback = dummyCallback; dispatchQInfo[i].callbackId = 0; dispatchQInfo[i].dummyCallbackCount = 0; dispatchQInfo[i].priority = IX_QMGR_Q_PRIORITY_2; dispatchQInfo[i].statusWordOffset = 0; dispatchQInfo[i].statusCheckValue = 0; dispatchQInfo[i].statusMask = 0; /* * There are two interrupt registers, 32 bits each. One for the lower * queues(0-31) and one for the upper queues(32-63). Therefore need to * mod by 32 i.e the min upper queue identifier. */ dispatchQInfo[i].intRegCheckMask = (1<<(i%(IX_QMGR_MIN_QUEUPP_QID))); /* * Set the Q types - will only be used with livelock */ ixQMgrQTypes[i] = IX_QMGR_TYPE_REALTIME_OTHER; /* Reset queue statistics */ dispatcherStats.queueStats[i].callbackCnt = 0; dispatcherStats.queueStats[i].priorityChangeCnt = 0; dispatcherStats.queueStats[i].intNoCallbackCnt = 0; dispatcherStats.queueStats[i].intLostCallbackCnt = 0; dispatcherStats.queueStats[i].notificationEnabled = FALSE; dispatcherStats.queueStats[i].srcSel = 0; } /* Priority table. Order the table from queue 0 to 63 */ ixQMgrDispatcherReBuildPriorityTable(); /* Reset statistics */ dispatcherStats.loopRunCnt = 0; /* Get the device ID for the underlying silicon */ deviceId = ixFeatureCtrlDeviceRead(); /* Get the product ID for the underlying silicon */ productId = ixFeatureCtrlProductIdRead(); /* * Check featureCtrl to see if Livelock prevention is required */ ixQMgrOrigB0Dispatcher = ixFeatureCtrlSwConfigurationCheck( IX_FEATURECTRL_ORIGB0_DISPATCHER); /* * Check if the silicon supports the sticky interrupt feature. * IF (IXP42X AND A0) -> No sticky interrupt feature supported */ if ((IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X == (IX_FEATURE_CTRL_DEVICE_TYPE_MASK & deviceId)) && (IX_FEATURE_CTRL_SILICON_TYPE_A0 == (IX_FEATURE_CTRL_SILICON_STEPPING_MASK & productId))) { stickyIntSilicon = FALSE; } /* * IF user wants livelock prev option AND silicon supports sticky interrupt * feature -> enable the sticky interrupt bit */ if ((IX_FEATURE_CTRL_SWCONFIG_DISABLED == ixQMgrOrigB0Dispatcher) && stickyIntSilicon) { ixQMgrStickyInterruptRegEnable(); } }
/* * Function definition: ixEthAccCodeletInit() * * See header file for documentation. */ IX_STATUS ixEthAccCodeletInit(IxEthAccCodeletOperation operationType, IxEthAccPortId inPort, IxEthAccPortId outPort) { IxEthAccPortId portId; IxOsalThread statsPollThread; IxOsalThreadAttr threadAttr; threadAttr.name = "Codelet Stats"; threadAttr.stackSize = 32 * 1024; /* 32kbytes */ threadAttr.priority = 128; #ifdef __ixp46X /* Set the expansion bus fuse register to enable MUX for NPEA MII */ { UINT32 expbusCtrlReg; expbusCtrlReg = ixFeatureCtrlRead (); expbusCtrlReg |= ((unsigned long)1<<8); ixFeatureCtrlWrite (expbusCtrlReg); } #endif /* check the component is already initialized */ if(ixEthAccCodeletInitialised) { printf("CodeletMain: Ethernet codelet already initialised\n"); return(IX_SUCCESS); } #ifdef __vxworks /* When the ixe drivers are running, the codelets * cannot run. */ for (portId = 0; portId < IX_ETHACC_CODELET_MAX_PORT; portId++) { if (endFindByName ("ixe", portId) != NULL) { printf("CodeletMain: FAIL: Driver ixe%d detected\n",portId); return IX_FAIL; } } #endif /* Initialize NPE IMAGE ID here again to prevent confusion in multiple * ixEthAccCodeletMain() calls with different operationType. */ ETH_NPEA_IMAGEID = IX_NPEDL_NPEIMAGE_NPEA_ETH_MACFILTERLEARN_HSSCHAN_COEXIST; ETH_NPEB_IMAGEID = IX_NPEDL_NPEIMAGE_NPEB_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB; ETH_NPEC_IMAGEID = IX_NPEDL_NPEIMAGE_NPEC_ETH_LEARN_FILTER_SPAN_MASK_FIREWALL_VLAN_QOS_EXTMIB; /* Create mutexes for thread control */ ixEthAccCodeletStatsPollTaskStop = TRUE; ixOsalMutexInit (&ixEthAccCodeletStatsPollTaskRunning); /* Initialise MBUF pool */ if(ixEthAccCodeletMemPoolInit() != IX_SUCCESS) { printf("CodeletMain: Error initialising mBuf pool\n"); return (IX_FAIL); } /* Check Silicon stepping */ printf("Checking Silicon stepping...\n"); if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X) { if ((ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) == IX_FEATURE_CTRL_SILICON_TYPE_B0) { /* * If it is B0 Silicon, we only enable port when its corresponding * Eth Coprocessor is available. */ if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) == IX_FEATURE_CTRL_COMPONENT_ENABLED) { ixEthAccCodeletHardwareExists[IX_ETH_PORT_1] = TRUE; } if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) == IX_FEATURE_CTRL_COMPONENT_ENABLED) { ixEthAccCodeletHardwareExists[IX_ETH_PORT_2] = TRUE; } } else if ((ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) == IX_FEATURE_CTRL_SILICON_TYPE_A0) { /* * If it is A0 Silicon, we enable both as both Eth Coprocessors * are available. */ ixEthAccCodeletHardwareExists[IX_ETH_PORT_1] = TRUE; ixEthAccCodeletHardwareExists[IX_ETH_PORT_2] = TRUE; } else { printf("CodeletMain: Error. Operation for other silicon stepping is undefined!.\n"); return (IX_FAIL); } } else if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP46X) { ixEthAccCodeletHardwareExists[IX_ETH_PORT_1] = TRUE; ixEthAccCodeletHardwareExists[IX_ETH_PORT_2] = TRUE; #ifdef __ixp46X ixEthAccCodeletHardwareExists[IX_ETH_PORT_3] = TRUE; #endif } /*********************************************************************** * * System initialisation done. Now initialise Access components. * ***********************************************************************/ /* Initialise Queue Manager */ printf("Initialising Queue Manager...\n"); if (ixQMgrInit() != IX_SUCCESS) { printf("CodeletMain: Error initialising queue manager!\n"); return (IX_FAIL); } /* Start the Queue Manager dispatcher */ if(ixEthAccCodeletDispatcherStart(IX_ETH_CODELET_QMGR_DISPATCH_MODE) != IX_SUCCESS) { printf("CodeletMain: Error starting queue manager dispatch loop!\n"); return (IX_FAIL); } /* Initialise NPE Message handler */ printf("\nStarting NPE message handler...\n"); if(ixNpeMhInitialize(IX_NPEMH_NPEINTERRUPTS_YES) != IX_SUCCESS) { printf("CodeletMain: Error initialising NPE Message handler!\n"); return (IX_FAIL); } /* Initialise NPEs firmware */ printf ("Initialising NPEs...\n"); if (ixEthAccCodeletHardwareExists[IX_ETH_PORT_1]) { if ((operationType == IX_ETHACC_CODELET_BRIDGE_WIFI) && (inPort == IX_ETH_PORT_1)) { printf("CodeletMain: the 802.3 <=> 802.11 header conversion image is loaded on NPE B\n"); ETH_NPEB_IMAGEID = IX_NPEDL_NPEIMAGE_NPEB_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB; } if (IX_SUCCESS != ixNpeDlNpeInitAndStart(ETH_NPEB_IMAGEID)) { printf ("CodeletMain: Error initialising and starting NPE B!\n"); return (IX_FAIL); } } if (ixEthAccCodeletHardwareExists[IX_ETH_PORT_2]) { if ((operationType == IX_ETHACC_CODELET_BRIDGE_WIFI) && (inPort == IX_ETH_PORT_2)) { printf("CodeletMain: the 802.3 <=> 802.11 header conversion image is loaded on NPE C\n"); ETH_NPEC_IMAGEID = IX_NPEDL_NPEIMAGE_NPEC_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB; } if (IX_SUCCESS != ixNpeDlNpeInitAndStart(ETH_NPEC_IMAGEID)) { printf ("CodeletMain: Error initialising and starting NPE C!\n"); return (IX_FAIL); } } #ifdef __ixp46X if (ixEthAccCodeletHardwareExists[IX_ETH_PORT_3]) { if ((operationType == IX_ETHACC_CODELET_BRIDGE_WIFI) && (inPort == IX_ETH_PORT_3)) { printf("CodeletMain: the 802.3 <=> 802.11 header conversion image is loaded on NPE A\n"); ETH_NPEA_IMAGEID = IX_NPEDL_NPEIMAGE_NPEA_ETH_SPAN_VLAN_QOS_HDR_CONV_EXTMIB; } if (IX_SUCCESS != ixNpeDlNpeInitAndStart(ETH_NPEA_IMAGEID)) { printf ("CodeletMain: Error initialising and starting NPE A!\n"); return (IX_FAIL); } } #endif printf ("Initialising Access Layers\n"); /* Enable QoS on ethDB. This has to be done before ethAcc initialisation */ if (operationType == IX_ETHACC_CODELET_BRIDGE_QOS) { printf("Enabling QoS\n"); if (IX_ETH_DB_SUCCESS != ixEthDBInit()) { printf ("CodeletMain: Error initialising EthDB\n"); return (IX_FAIL); } (void)ixEthDBPortInit(inPort); if (IX_ETH_DB_SUCCESS != ixEthDBFeatureEnable(inPort, IX_ETH_DB_VLAN_QOS, TRUE)) { printf("CodeletMain: Error enabling QoS on port %d\n",inPort); return (IX_FAIL); } } /* initialise ethAcc : QoS, if needed is already configured */ if (ixEthAccInit() != IX_ETH_ACC_SUCCESS) { printf("CodeletMain: Error initialising Ethernet access driver!\n"); return (IX_FAIL); } /*********************************************************************** * * Access components initialisation done. Now initialize the ports * ***********************************************************************/ /* Configure all available ports */ for (portId = 0; portId < IX_ETHACC_CODELET_MAX_PORT; portId++) { if (ixEthAccCodeletHardwareExists[portId]) { if(ixEthAccCodeletPortInit(portId) != IX_ETH_ACC_SUCCESS) { printf("CodeletMain: Error setup port %u\n", portId); return (IX_FAIL); } } } /* Find and initialise all available PHYs */ printf ("Discover and reset the PHYs...\n"); if(ixEthAccCodeletPhyInit() != IX_SUCCESS) { printf("CodeletMain: Error initialising Ethernet phy(s)!\n"); return (IX_FAIL); } /*********************************************************************** * * PortInitialization done. Now start the codelet features * ***********************************************************************/ /* starts ethDB maintenance running from a different task */ if (ixEthAccCodeletDBMaintenanceStart() != IX_SUCCESS) { printf("CodeletMain: Error spawning DB maintenance task\n"); return (IX_FAIL); } /* Starts the traffic display (in a different task) this is initially * set to FALSE in order to allow the traffic stats to start only * once traffic is started to be received */ ixEthAccCodeletTrafficPollEnabled = FALSE; if (ixOsalThreadCreate(&statsPollThread, &threadAttr, (IxOsalVoidFnVoidPtr) ixEthAccCodeletStatsPollTask, NULL) != IX_SUCCESS) { printf("CodeletMain: Error spawning stats task\n"); return (IX_FAIL); } /* Start the thread */ if (ixOsalThreadStart(&statsPollThread) != IX_SUCCESS) { printf("CodeletMain: Error failed to start the stats thread\n"); return IX_FAIL; } ixEthAccCodeletInitialised = TRUE; return (IX_SUCCESS); }
PUBLIC IX_STATUS ixAtmdAccInit (void) { IX_STATUS returnStatus = IX_SUCCESS; /* test if initialialisation already ran */ if (initDone) { /* protect against multiple initialisations */ returnStatus = IX_FAIL; } if (returnStatus == IX_SUCCESS) { /* utilities */ returnStatus = ixAtmdAccUtilInit (); } if (returnStatus == IX_SUCCESS) { /* QMgr queues */ returnStatus = ixAtmdAccUtilQueuesInit(); } if (returnStatus == IX_SUCCESS) { /* descriptor management */ returnStatus = ixAtmdAccDescMgmtInit (); } if (returnStatus == IX_SUCCESS) { /* port management */ returnStatus = ixAtmdAccPortMgmtInit (); } if (returnStatus == IX_SUCCESS) { /* Rx services */ returnStatus = ixAtmdAccRxCfgIfInit (); } if (returnStatus == IX_SUCCESS) { /* Tx services */ returnStatus = ixAtmdAccTxCfgIfInit (); } if (returnStatus == IX_SUCCESS) { initDone = TRUE; } if (returnStatus == IX_SUCCESS) { /* Do not perform feature checkings only if * IXP42X - A0 silicon. */ if ((IX_FEATURE_CTRL_SILICON_TYPE_A0 != (ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK)) || (IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X != ixFeatureCtrlDeviceRead ())) { if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_UTOPIA)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "Warning: the UTOPIA component you specified does" " not exist\n", 0,0,0,0,0,0); } if (ixFeatureCtrlComponentCheck(IX_FEATURECTRL_AAL)== IX_FEATURE_CTRL_COMPONENT_DISABLED) { ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDERR, "Warning: the AAL component you specified does" " not exist\n", 0,0,0,0,0,0); } } } return returnStatus; }
IX_STATUS ixEthAccCodeletPhyInit(void) { BOOL phyPresent[IXP400_ETH_ACC_MII_MAX_ADDR]; UINT32 phyNo; UINT32 phyNoAddr; UINT32 ixEthAccCodeletMaxPhyNo; unsigned int portId; /* Scan for available Ethernet PHYs on the board */ if(ixEthMiiPhyScan(phyPresent,IX_ETHACC_CODELET_MAX_PORT) == IX_FAIL) { return (IX_FAIL); } else { /* * Mapping from portId to Phy Address is done here. * This is board specific and depends on PHY address * setup (generally done by EEPROM or Jumpers) * * This codelet assumes the PHY with the lowest * address is connected to the NPE B and the PHY with the * highest address is connected to NPE C. */ ixEthAccCodeletMaxPhyNo = 0; for(phyNoAddr=0, phyNo=0; phyNoAddr<IXP400_ETH_ACC_MII_MAX_ADDR; phyNoAddr++) { if(phyPresent[phyNoAddr]) { ixEthAccCodeletPhyAddresses[phyNo++] = phyNoAddr; ixEthAccCodeletMaxPhyNo = phyNo; if(ixEthAccCodeletMaxPhyNo == IX_ETHACC_CODELET_MAX_PORT) { break; } } } } for(phyNo=0; phyNo<ixEthAccCodeletMaxPhyNo; phyNo++) { portId = phyNo; /* Reset each phy */ if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP42X) { if ((ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) == IX_FEATURE_CTRL_SILICON_TYPE_B0) { /*Only when Ethernet is available, then add dynamic entries */ if (((ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH0) == IX_FEATURE_CTRL_COMPONENT_ENABLED) && (0 == portId)) || ((ixFeatureCtrlComponentCheck(IX_FEATURECTRL_ETH1) == IX_FEATURE_CTRL_COMPONENT_ENABLED) && (1 == portId))) { ixEthMiiPhyReset(ixEthAccCodeletPhyAddresses[portId]); /* Set each phy properties */ ixEthMiiPhyConfig(ixEthAccCodeletPhyAddresses[portId], ixEthAccCodeletPhyConf.speed100, ixEthAccCodeletPhyConf.fullDuplex, ixEthAccCodeletPhyConf.autonegotiate); /* wait until the link is up before setting the MAC duplex * mode, the PHY duplex mode may change after autonegotiation */ (void)ixEthAccCodeletLinkUpCheck(portId); (void)ixEthAccCodeletLinkMonitor(portId); printf("\nPHY %d configuration:\n", portId); ixEthMiiPhyShow(ixEthAccCodeletPhyAddresses[portId]); } } else if ((ixFeatureCtrlProductIdRead() & IX_FEATURE_CTRL_SILICON_STEPPING_MASK) == IX_FEATURE_CTRL_SILICON_TYPE_A0) { ixEthMiiPhyReset(ixEthAccCodeletPhyAddresses[portId]); /* Set each phy properties */ ixEthMiiPhyConfig(ixEthAccCodeletPhyAddresses[portId], ixEthAccCodeletPhyConf.speed100, ixEthAccCodeletPhyConf.fullDuplex, ixEthAccCodeletPhyConf.autonegotiate); /* wait until the link is up before setting the MAC duplex * mode, the PHY duplex mode may change after autonegotiation */ (void)ixEthAccCodeletLinkUpCheck(portId); (void)ixEthAccCodeletLinkMonitor(portId); printf("\nPHY %d configuration:\n", portId); ixEthMiiPhyShow(ixEthAccCodeletPhyAddresses[portId]); } else { printf("LinkSetup: Error. Operation for other silicon stepping is undefined!.\n"); return (IX_FAIL); } } else if (ixFeatureCtrlDeviceRead() == IX_FEATURE_CTRL_DEVICE_TYPE_IXP46X) { ixEthMiiPhyReset(ixEthAccCodeletPhyAddresses[portId]); /* Set each phy properties */ ixEthMiiPhyConfig(ixEthAccCodeletPhyAddresses[portId], ixEthAccCodeletPhyConf.speed100, ixEthAccCodeletPhyConf.fullDuplex, ixEthAccCodeletPhyConf.autonegotiate); /* wait until the link is up before setting the MAC duplex * mode, the PHY duplex mode may change after autonegotiation */ (void)ixEthAccCodeletLinkUpCheck(portId); (void)ixEthAccCodeletLinkMonitor(portId); printf("\nPHY %d configuration:\n", portId); ixEthMiiPhyShow(ixEthAccCodeletPhyAddresses[portId]); } } return (IX_SUCCESS); }