void vInitialiseTimerForIntQueueTest( void )
{
/* Timer RT is used for the tick interrupt, timer 3 is used for the high
frequency interrupt test. This file therefore uses timers 0 and 1. */
uint32_t ulPreload = ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / ( unsigned long ) timerINTERRUPT0_FREQUENCY ) );
btmr_sleep_en( BTMR0_ID, 0 );
btmr_init( BTMR0_ID, BTMR_COUNT_DOWN + BTMR_AUTO_RESTART + BTMR_INT_EN, 0, ulPreload, ulPreload );
btmr_start( BTMR0_ID );
jtvic_clr_source( MEC14xx_GIRQ23_ID, 0 );
portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 0 );
portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) << 0 );
jtvic_en_source( MEC14xx_GIRQ23_ID, 0, pdTRUE );
ulPreload = ( unsigned short ) ( ( configPERIPHERAL_CLOCK_HZ / ( unsigned long ) timerINTERRUPT1_FREQUENCY ) );
btmr_sleep_en( BTMR1_ID, 0 );
btmr_init( BTMR1_ID, BTMR_COUNT_DOWN + BTMR_AUTO_RESTART + BTMR_INT_EN, 0, ulPreload, ulPreload );
btmr_start( BTMR1_ID );
jtvic_clr_source( MEC14xx_GIRQ23_ID, 1 );
portMMCR_JTVIC_GIRQ23_PRIA &= ~( 0x0Ful << 4 );
portMMCR_JTVIC_GIRQ23_PRIA |= ( ( portIPL_TO_CODE( configMAX_SYSCALL_INTERRUPT_PRIORITY ) ) << 4 );
jtvic_en_source( MEC14xx_GIRQ23_ID, 1, pdTRUE );
}
void sys_cpu_en_timer(uint32_t counts, uint8_t ien)
{
/* Disable Counter by setting DC bit to 1 in CP0.Cause */
_CP0_BIS_CAUSE(_CP0_CAUSE_DC_MASK);
_CP0_SET_COUNT(counts);
if (ien) {
jtvic_en_source(MEC14xx_GIRQ24_ID, 0, 0);
} else {
jtvic_dis_clr_source(MEC14xx_GIRQ24_ID, 0, 1);
}
/* Enable Counter */
_CP0_BIC_CAUSE(_CP0_CAUSE_DC_MASK);
}
