Example #1
0
void lan8720Tick(NetInterface *interface)
{
   uint16_t value;
   bool_t linkState;

   //Read basic status register
   value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR);
   //Retrieve current link state
   linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;

   //Link up event?
   if(linkState && !interface->linkState)
   {
      //A PHY event is pending...
      interface->phyEvent = TRUE;
      //Notify the user that the link state has changed
      osSetEvent(&interface->nicRxEvent);
   }
   //Link down event?
   else if(!linkState && interface->linkState)
   {
      //A PHY event is pending...
      interface->phyEvent = TRUE;
      //Notify the user that the link state has changed
      osSetEvent(&interface->nicRxEvent);
   }
}
Example #2
0
void lan8720Tick(NetInterface *interface)
{
//STM32F4-DISCOVERY evaluation board?
#if defined(USE_STM32F4_DISCOVERY)
   uint16_t value;
   bool_t linkState;

   //Read basic status register
   value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR);
   //Retrieve current link state
   linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;

   //Link up event?
   if(linkState && !interface->linkState)
   {
      //A PHY event is pending...
      interface->phyEvent = TRUE;
      //Notify the user that the link state has changed
      osEventSet(interface->nicRxEvent);
   }
   //Link down event?
   else if(!linkState && interface->linkState)
   {
      //A PHY event is pending...
      interface->phyEvent = TRUE;
      //Notify the user that the link state has changed
      osEventSet(interface->nicRxEvent);
   }
#endif
}
Example #3
0
void lan8720Tick(NetInterface *interface)
{
   uint16_t value;
   bool_t linkState;

   //Read basic status register
   value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR);
   //Retrieve current link state
   linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;

   //Link up event?
   if(linkState && !interface->linkState)
   {
      //Set event flag
      interface->phyEvent = TRUE;
      //Notify the TCP/IP stack of the event
      osSetEvent(&netEvent);
   }
   //Link down event?
   else if(!linkState && interface->linkState)
   {
      //Set event flag
      interface->phyEvent = TRUE;
      //Notify the TCP/IP stack of the event
      osSetEvent(&netEvent);
   }
}
Example #4
0
void lan8720DumpPhyReg(NetInterface *interface)
{
   uint_t i;

   //Loop through PHY registers
   for(i = 0; i < 32; i++)
   {
      //Display current PHY register
      TRACE_DEBUG("%02X: 0x%04X\r\n", i, lan8720ReadPhyReg(interface, i));
   }

   //Terminate with a line feed
   TRACE_DEBUG("\r\n");
}
Example #5
0
error_t lan8720Init(NetInterface *interface)
{
   //Debug message
   TRACE_INFO("Initializing LAN8720...\r\n");

   //Reset PHY transceiver (soft reset)
   lan8720WritePhyReg(interface, LAN8720_PHY_REG_BMCR, BMCR_RESET);
   //Wait for the reset to complete
   while(lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMCR) & BMCR_RESET);

   //Dump PHY registers for debugging purpose
   lan8720DumpPhyReg(interface);

   //Successful initialization
   return NO_ERROR;
}
Example #6
0
error_t lan8720Init(NetInterface *interface)
{
   //Debug message
   TRACE_INFO("Initializing LAN8720...\r\n");

   //Reset PHY transceiver (soft reset)
   lan8720WritePhyReg(interface, LAN8720_PHY_REG_BMCR, BMCR_RESET);
   //Wait for the reset to complete
   while(lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMCR) & BMCR_RESET);

   //Dump PHY registers for debugging purpose
   lan8720DumpPhyReg(interface);

   //Force the TCP/IP stack to poll the link state at startup
   interface->phyEvent = TRUE;
   //Notify the TCP/IP stack of the event
   osSetEvent(&netEvent);

   //Successful initialization
   return NO_ERROR;
}
Example #7
0
error_t lan8720Init(NetInterface *interface)
{
//STM32F4-DISCOVERY evaluation board?
#if defined(USE_STM32F4_DISCOVERY)
   GPIO_InitTypeDef GPIO_InitStructure;

   //Debug message
   TRACE_INFO("Initializing LAN8720...\r\n");

   //Enable GPIOE clock
   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);

   //Configure PE2 (PHY_RST) pin as an output
   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
   GPIO_Init(GPIOE, &GPIO_InitStructure);

   //Reset PHY transceiver (hard reset)
   GPIO_ResetBits(GPIOE, GPIO_Pin_2);
   sleep(10);
   GPIO_SetBits(GPIOE, GPIO_Pin_2);
   sleep(10);
#endif

   //Reset PHY transceiver (soft reset)
   lan8720WritePhyReg(interface, LAN8720_PHY_REG_BMCR, BMCR_RESET);
   //Wait for the reset to complete
   while(lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMCR) & BMCR_RESET);

   //Dump PHY registers for debugging purpose
   lan8720DumpPhyReg(interface);

   //Successful initialization
   return NO_ERROR;
}
Example #8
0
bool_t lan8720EventHandler(NetInterface *interface)
{
//STM32F4-DISCOVERY evaluation board?
#if defined(USE_STM32F4_DISCOVERY)
   uint16_t value;
   bool_t linkState;

   //Read basic status register
   value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR);
   //Retrieve current link state
   linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;

   ///Link is up?
   if(linkState && !interface->linkState)
   {
      //Read PHY special control/status register
      value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_PSCSR);

      //Check current operation mode
      switch(value & PSCSR_HCDSPEED_MASK)
      {
      //10BASE-T
      case PSCSR_HCDSPEED_10BT:
         interface->speed100 = FALSE;
         interface->fullDuplex = FALSE;
         break;
      //10BASE-T full-duplex
      case PSCSR_HCDSPEED_10BT_FD:
         interface->speed100 = FALSE;
         interface->fullDuplex = TRUE;
         break;
      //100BASE-TX
      case PSCSR_HCDSPEED_100BTX:
         interface->speed100 = TRUE;
         interface->fullDuplex = FALSE;
         break;
      //100BASE-TX full-duplex
      case PSCSR_HCDSPEED_100BTX_FD:
         interface->speed100 = TRUE;
         interface->fullDuplex = TRUE;
         break;
      //Unknown operation mode
      default:
         //Debug message
         TRACE_WARNING("Invalid Duplex mode\r\n");
         break;
      }

      //Update link state
      interface->linkState = TRUE;
      //Display link state
      TRACE_INFO("Link is up (%s)...\r\n", interface->name);

      //Display actual speed and duplex mode
      TRACE_INFO("%s %s\r\n",
         interface->speed100 ? "100BASE-TX" : "10BASE-T",
         interface->fullDuplex ? "Full-Duplex" : "Half-Duplex");

      //Notify the user that the link state has changed
      return TRUE;
   }
   //Link is down?
   else if(!linkState && interface->linkState)
   {
      //Update link state
      interface->linkState = FALSE;
      //Display link state
      TRACE_INFO("Link is down (%s)...\r\n", interface->name);

      //Notify the user that the link state has changed
      return TRUE;
   }
   else
   {
      //No link state change...
      return FALSE;
   }
#endif
}
Example #9
0
error_t lan8720Init(NetInterface *interface)
{
//LPC1830-Xplorer evaluation board?
#if defined(USE_LPC1830_XPLORER)
   //Debug message
   TRACE_INFO("Initializing LAN8720...\r\n");

   //Enable GPIO peripheral clock
   LPC_CCU1->CLK_M3_GPIO_CFG |= CCU1_CLK_M3_GPIO_CFG_RUN_Msk;
   while(!(LPC_CCU1->CLK_M3_GPIO_STAT & CCU1_CLK_M3_GPIO_STAT_RUN_Msk));

   //Configure P1.0 as a general purpose output
   LPC_SCU->SFSP1_0 = 0;
   LPC_GPIO_PORT->DIR[0] |= (1 << 4);

   //Reset PHY transceiver (hard reset)
   LPC_GPIO_PORT->CLR[0] = (1 << 4);
   sleep(10);
   LPC_GPIO_PORT->SET[0] = (1 << 4);
   sleep(10);

//LPC4330-Xplorer evaluation board?
#elif defined(USE_LPC4330_XPLORER)
   //Debug message
   TRACE_INFO("Initializing LAN8720...\r\n");

   //Enable GPIO peripheral clock
   LPC_CCU1->CLK_M4_GPIO_CFG |= CCU1_CLK_M4_GPIO_CFG_RUN_Msk;
   while(!(LPC_CCU1->CLK_M4_GPIO_STAT & CCU1_CLK_M4_GPIO_STAT_RUN_Msk));

   //Configure P6.1 as a general purpose output
   LPC_SCU->SFSP6_1 = 0;
   LPC_GPIO_PORT->DIR[3] |= (1 << 0);

   //Reset PHY transceiver (hard reset)
   LPC_GPIO_PORT->CLR[3] = (1 << 0);
   sleep(10);
   LPC_GPIO_PORT->SET[3] = (1 << 0);
   sleep(10);

//STM32F4-DISCOVERY evaluation board?
#elif defined(USE_STM32F4_DISCOVERY)
   GPIO_InitTypeDef GPIO_InitStructure;

   //Debug message
   TRACE_INFO("Initializing LAN8720...\r\n");

   //Enable GPIOE clock
   RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOE, ENABLE);

   //Configure PE2 (PHY_RST) pin as an output
   GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT;
   GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
   GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
   GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
   GPIO_Init(GPIOE, &GPIO_InitStructure);

   //Reset PHY transceiver (hard reset)
   GPIO_ResetBits(GPIOE, GPIO_Pin_2);
   sleep(10);
   GPIO_SetBits(GPIOE, GPIO_Pin_2);
   sleep(10);
#endif

   //Reset PHY transceiver (soft reset)
   lan8720WritePhyReg(interface, LAN8720_PHY_REG_BMCR, BMCR_RESET);
   //Wait for the reset to complete
   while(lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMCR) & BMCR_RESET);

   //Dump PHY registers for debugging purpose
   lan8720DumpPhyReg(interface);

   //Successful initialization
   return NO_ERROR;
}
Example #10
0
void lan8720EventHandler(NetInterface *interface)
{
   uint16_t value;
   bool_t linkState;

   //Any link failure condition is latched in the BMSR register... Reading
   //the register twice will always return the actual link status
   value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR);
   value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_BMSR);

   //Retrieve current link state
   linkState = (value & BMSR_LINK_STATUS) ? TRUE : FALSE;

   //Link is up?
   if(linkState && !interface->linkState)
   {
      //Read PHY special control/status register
      value = lan8720ReadPhyReg(interface, LAN8720_PHY_REG_PSCSR);

      //Check current operation mode
      switch(value & PSCSR_HCDSPEED_MASK)
      {
      //10BASE-T
      case PSCSR_HCDSPEED_10BT:
         interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
         interface->duplexMode = NIC_HALF_DUPLEX_MODE;
         break;
      //10BASE-T full-duplex
      case PSCSR_HCDSPEED_10BT_FD:
         interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
         interface->duplexMode = NIC_FULL_DUPLEX_MODE;
         break;
      //100BASE-TX
      case PSCSR_HCDSPEED_100BTX:
         interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
         interface->duplexMode = NIC_HALF_DUPLEX_MODE;
         break;
      //100BASE-TX full-duplex
      case PSCSR_HCDSPEED_100BTX_FD:
         interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
         interface->duplexMode = NIC_FULL_DUPLEX_MODE;
         break;
      //Unknown operation mode
      default:
         //Debug message
         TRACE_WARNING("Invalid Duplex mode\r\n");
         break;
      }

      //Update link state
      interface->linkState = TRUE;

      //Adjust MAC configuration parameters for proper operation
      interface->nicDriver->updateMacConfig(interface);

      //Process link state change event
      nicNotifyLinkChange(interface);
   }
   //Link is down?
   else if(!linkState && interface->linkState)
   {
      //Update link state
      interface->linkState = FALSE;

      //Process link state change event
      nicNotifyLinkChange(interface);
   }
}