/******************************************************************************* *函数名称: Boot0_C_part *函数原型:void Boot0_C_part( void ) *函数功能: Boot0中用C语言编写的部分的主流程 *入口参数: void *返 回 值: void *备 注: *******************************************************************************/ void Boot0_C_part( void ) { __u32 status; __s32 dram_size; int index = 0; int ddr_aotu_scan = 0; volatile unsigned int *reg_addr = 0; // move_RW( ); clear_ZI( ); bias_calibration(); timer_init(); UART_open( BT0_head.prvt_head.uart_port, (void *)BT0_head.prvt_head.uart_ctrl, 24*1000*1000 ); //odt_status = check_odt(5); if( BT0_head.prvt_head.enable_jtag ) { jtag_init( (normal_gpio_cfg *)BT0_head.prvt_head.jtag_gpio ); } msg("HELLO! BOOT0 is starting!\n"); print_version(); { __u32 reg_val; __u32 fel_flag; fel_flag = *(volatile unsigned int *)(0x01f00000 + 0x108); //print smp status. index = 0; while(index < 0x18) { reg_addr = (volatile unsigned int *)(0x01f00000 + 0x100 + index); reg_val = *reg_addr; *reg_addr = 0; msg("reg_addr %x =%x\n", reg_addr, reg_val); index+=0x4; } // reg_val = *(volatile unsigned int *)(0x01f00000 + 0x108); // *(volatile unsigned int *)(0x01f00000 + 0x108) = 0; // msg("fel_flag=%x\n", fel_flag); if(fel_flag == 0x5AA5A55A) { msg("eraly jump fel\n"); pll_reset(); __msdelay(10); jump_to( FEL_BASE ); } } mmu_system_init(EGON2_DRAM_BASE, 1 * 1024, EGON2_MMU_BASE); mmu_enable(); //dram_size = init_DRAM(BT0_head.boot_head.platform[7]); // 初始化DRAM //#ifdef CONFIG_SUN6I_FPGA // ddr_aotu_scan = 1; // msg("config fpga\n"); //#else // ddr_aotu_scan = BT0_head.boot_head.platform[7]; // msg("not config fpga\n"); //#endif ddr_aotu_scan = 0; #ifdef DEBUG { int k; for(k=0;k<16;k++) { msg("%x\n", BT0_head.prvt_head.dram_para[k]); } } #endif // msg("------------before------------\n"); // dram_para_display(); dram_size = init_DRAM(ddr_aotu_scan, (void *)BT0_head.prvt_head.dram_para); if(dram_size) { mdfs_save_value((void *)BT0_head.prvt_head.dram_para); msg("dram size =%d\n", dram_size); } else { msg("initializing SDRAM Fail.\n"); mmu_disable( ); pll_reset(); __msdelay(10); jump_to( FEL_BASE ); } // { // __u32 reg_val; // // reg_val = *(volatile __u32 *)(0x1c20d20); // *(volatile __u32 *)(0x1c20d20) = 0; // msg("reg_val=%x, %x\n", reg_val, *(volatile __u32 *)(0x1c20d24)); // if(reg_val & 0x01) // { // mmu_disable( ); // jump_to( 0x40100000 ); // } // } // msg("------------end------------\n"); // dram_para_display(); #if SYS_STORAGE_MEDIA_TYPE == SYS_STORAGE_MEDIA_NAND_FLASH status = load_Boot1_from_nand( ); // 载入Boot1 #elif SYS_STORAGE_MEDIA_TYPE == SYS_STORAGE_MEDIA_SPI_NOR_FLASH status = load_boot1_from_spinor( ); // 载入Boot1 #elif SYS_STORAGE_MEDIA_TYPE == SYS_STORAGE_MEDIA_SD_CARD status = load_boot1_from_sdmmc( (char *)BT0_head.prvt_head.storage_data ); // 载入boot1 #else #error The storage media of Boot1 has not been defined. #endif msg("Ready to disable icache.\n"); mmu_disable( ); // disable instruction cache if( status == OK ) { // restart_watch_dog( ); // restart watch dog //跳转boot1之前,把dram的大小写进去 //set_dram_size(dram_size ); //跳转之前,把所有的dram参数写到boot1中 set_dram_para((void *)&BT0_head.prvt_head.dram_para, dram_size); msg("Succeed in loading Boot1.\n" "Jump to Boot1.\n"); jump_to( BOOT1_BASE ); // 如果载入Boot1成功,跳转到Boot1处执行 } else { // disable_watch_dog( ); // disable watch dog msg("Fail in loading Boot1.\n" "Jump to Fel.\n"); pll_reset(); __msdelay(10); jump_to( FEL_BASE ); // 如果载入Boot1失败,将控制权交给Fel } }
int load_boot1(void) { memcpy((void *)DRAM_PARA_STORE_ADDR, (void *)BT0_head.prvt_head.dram_para, SUNXI_DRAM_PARA_MAX * 4); return load_boot1_from_sdmmc((char *)BT0_head.prvt_head.storage_data); }