/*---
* CALLfar_pm: call gate (SAME-PRIVILEGE)
*/
static void
CALLfar_pm_call_gate_same_privilege(const selector_t *callgate_sel, selector_t *cs_sel)
{
UINT32 sp;
VERBOSE(("CALLfar_pm: SAME-PRIVILEGE"));
if (CPU_STAT_SS32) {
sp = CPU_ESP;
} else {
sp = CPU_SP;
}
if (callgate_sel->desc.type == CPU_SYSDESC_TYPE_CALL_32) {
STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 8);
PUSH0_32(CPU_CS);
PUSH0_32(CPU_EIP);
load_cs(cs_sel->selector, &cs_sel->desc, CPU_STAT_CPL);
SET_EIP(callgate_sel->desc.u.gate.offset);
} else {
STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 4);
PUSH0_16(CPU_CS);
PUSH0_16(CPU_IP);
load_cs(cs_sel->selector, &cs_sel->desc, CPU_STAT_CPL);
SET_EIP(callgate_sel->desc.u.gate.offset);
}
}
void BX_CPU_C::branch_far64(bx_selector_t *selector,
bx_descriptor_t *descriptor, bx_address rip, Bit8u cpl)
{
#if BX_SUPPORT_X86_64
if (descriptor->u.segment.l)
{
if (! IsCanonical(rip)) {
BX_ERROR(("branch_far: canonical RIP violation"));
exception(BX_GP_EXCEPTION, 0, 0);
}
}
else
#endif
{
/* instruction pointer must be in code segment limit else #GP(0) */
if (rip > descriptor->u.segment.limit_scaled) {
BX_ERROR(("branch_far: RIP > limit"));
exception(BX_GP_EXCEPTION, 0, 0);
}
}
/* Load CS:IP from destination pointer */
/* Load CS-cache with new segment descriptor */
load_cs(selector, descriptor, cpl);
/* Change the RIP value */
RIP = rip;
}
void BX_CPU_C::branch_far32(bx_selector_t *selector,
bx_descriptor_t *descriptor, Bit32u eip, Bit8u cpl)
{
/* instruction pointer must be in code segment limit else #GP(0) */
if (eip > descriptor->u.segment.limit_scaled) {
BX_ERROR(("branch_far: EIP > limit"));
exception(BX_GP_EXCEPTION, 0, 0);
}
/* Load CS:IP from destination pointer */
/* Load CS-cache with new segment descriptor */
load_cs(selector, descriptor, cpl);
/* Change the EIP value */
EIP = eip;
}
/*---
* IRET_pm: SAME-PRIVILEGE
*/
static void
IRET_pm_protected_mode_return_same_privilege(const selector_t *cs_sel, UINT32 new_ip, UINT32 new_flags)
{
UINT32 mask;
UINT stacksize;
VERBOSE(("IRET_pm: RETURN-TO-SAME-PRIVILEGE-LEVEL"));
/* check code segment limit */
if (new_ip > cs_sel->desc.u.seg.limit) {
VERBOSE(("IRET_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel->desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
mask = 0;
if (CPU_INST_OP32)
mask |= RF_FLAG;
if (CPU_STAT_CPL <= CPU_STAT_IOPL)
mask |= I_FLAG;
if (CPU_STAT_CPL == 0) {
mask |= IOPL_FLAG;
if (CPU_INST_OP32) {
mask |= VM_FLAG|VIF_FLAG|VIP_FLAG;
}
}
if (CPU_INST_OP32) {
stacksize = 12;
} else {
stacksize = 6;
}
/* set new register */
load_cs(cs_sel->selector, &cs_sel->desc, CPU_STAT_CPL);
SET_EIP(new_ip);
set_eflags(new_flags, mask);
if (CPU_STAT_SS32) {
CPU_ESP += stacksize;
} else {
CPU_SP += (UINT16)stacksize;
}
}
/*---
* JMPfar: code segment
*/
static void
JMPfar_pm_code_segment(const selector_t *cs_sel, UINT32 new_ip)
{
VERBOSE(("JMPfar_pm: CODE-SEGMENT"));
/* check privilege level */
if (!cs_sel->desc.u.seg.ec) {
VERBOSE(("JMPfar_pm: NON-CONFORMING-CODE-SEGMENT"));
/* 下巻 p.119 4.8.1.1. */
if (cs_sel->rpl > CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: RPL(%d) > CPL(%d)", cs_sel->rpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel->idx);
}
if (cs_sel->desc.dpl != CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: DPL(%d) != CPL(%d)", cs_sel->desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel->idx);
}
} else {
VERBOSE(("JMPfar_pm: CONFORMING-CODE-SEGMENT"));
/* 下巻 p.120 4.8.1.2. */
if (cs_sel->desc.dpl > CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: DPL(%d) > CPL(%d)", cs_sel->desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel->idx);
}
}
/* not present */
if (selector_is_not_present(cs_sel)) {
VERBOSE(("JMPfar_pm: selector is not present"));
EXCEPTION(NP_EXCEPTION, cs_sel->idx);
}
/* out of range */
if (new_ip > cs_sel->desc.u.seg.limit) {
VERBOSE(("JMPfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel->desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
load_cs(cs_sel->selector, &cs_sel->desc, CPU_STAT_CPL);
SET_EIP(new_ip);
}
void BX_CPU_C::protected_mode_int(Bit8u vector, unsigned soft_int, bx_bool push_error, Bit16u error_code)
{
bx_descriptor_t gate_descriptor, cs_descriptor;
bx_selector_t cs_selector;
Bit16u raw_tss_selector;
bx_selector_t tss_selector;
bx_descriptor_t tss_descriptor;
Bit16u gate_dest_selector;
Bit32u gate_dest_offset;
// interrupt vector must be within IDT table limits,
// else #GP(vector*8 + 2 + EXT)
if ((vector*8 + 7) > BX_CPU_THIS_PTR idtr.limit) {
BX_ERROR(("interrupt(): vector must be within IDT table limits, IDT.limit = 0x%x", BX_CPU_THIS_PTR idtr.limit));
exception(BX_GP_EXCEPTION, vector*8 + 2);
}
Bit64u desctmp = system_read_qword(BX_CPU_THIS_PTR idtr.base + vector*8);
Bit32u dword1 = GET32L(desctmp);
Bit32u dword2 = GET32H(desctmp);
parse_descriptor(dword1, dword2, &gate_descriptor);
if ((gate_descriptor.valid==0) || gate_descriptor.segment) {
BX_ERROR(("interrupt(): gate descriptor is not valid sys seg (vector=0x%02x)", vector));
exception(BX_GP_EXCEPTION, vector*8 + 2);
}
// descriptor AR byte must indicate interrupt gate, trap gate,
// or task gate, else #GP(vector*8 + 2 + EXT)
switch (gate_descriptor.type) {
case BX_TASK_GATE:
case BX_286_INTERRUPT_GATE:
case BX_286_TRAP_GATE:
case BX_386_INTERRUPT_GATE:
case BX_386_TRAP_GATE:
break;
default:
BX_ERROR(("interrupt(): gate.type(%u) != {5,6,7,14,15}",
(unsigned) gate_descriptor.type));
exception(BX_GP_EXCEPTION, vector*8 + 2);
}
// if software interrupt, then gate descripor DPL must be >= CPL,
// else #GP(vector * 8 + 2 + EXT)
if (soft_int && gate_descriptor.dpl < CPL) {
BX_ERROR(("interrupt(): soft_int && (gate.dpl < CPL)"));
exception(BX_GP_EXCEPTION, vector*8 + 2);
}
// Gate must be present, else #NP(vector * 8 + 2 + EXT)
if (! IS_PRESENT(gate_descriptor)) {
BX_ERROR(("interrupt(): gate not present"));
exception(BX_NP_EXCEPTION, vector*8 + 2);
}
switch (gate_descriptor.type) {
case BX_TASK_GATE:
// examine selector to TSS, given in task gate descriptor
raw_tss_selector = gate_descriptor.u.taskgate.tss_selector;
parse_selector(raw_tss_selector, &tss_selector);
// must specify global in the local/global bit,
// else #GP(TSS selector)
if (tss_selector.ti) {
BX_ERROR(("interrupt(): tss_selector.ti=1 from gate descriptor - #GP(tss_selector)"));
exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc);
}
// index must be within GDT limits, else #TS(TSS selector)
fetch_raw_descriptor(&tss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
parse_descriptor(dword1, dword2, &tss_descriptor);
// AR byte must specify available TSS,
// else #GP(TSS selector)
if (tss_descriptor.valid==0 || tss_descriptor.segment) {
BX_ERROR(("interrupt(): TSS selector points to invalid or bad TSS - #GP(tss_selector)"));
exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc);
}
if (tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_286_TSS &&
tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS)
{
BX_ERROR(("interrupt(): TSS selector points to bad TSS - #GP(tss_selector)"));
exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc);
}
// TSS must be present, else #NP(TSS selector)
if (! IS_PRESENT(tss_descriptor)) {
BX_ERROR(("interrupt(): TSS descriptor.p == 0"));
exception(BX_NP_EXCEPTION, raw_tss_selector & 0xfffc);
}
// switch tasks with nesting to TSS
task_switch(0, &tss_selector, &tss_descriptor,
BX_TASK_FROM_INT, dword1, dword2);
RSP_SPECULATIVE;
// if interrupt was caused by fault with error code
// stack limits must allow push of 2 more bytes, else #SS(0)
// push error code onto stack
if (push_error) {
if (tss_descriptor.type >= 9) // TSS386
push_32(error_code);
else
push_16(error_code);
}
// instruction pointer must be in CS limit, else #GP(0)
if (EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
BX_ERROR(("interrupt(): EIP > CS.limit"));
exception(BX_GP_EXCEPTION, 0);
}
RSP_COMMIT;
return;
case BX_286_INTERRUPT_GATE:
case BX_286_TRAP_GATE:
case BX_386_INTERRUPT_GATE:
case BX_386_TRAP_GATE:
gate_dest_selector = gate_descriptor.u.gate.dest_selector;
gate_dest_offset = gate_descriptor.u.gate.dest_offset;
// examine CS selector and descriptor given in gate descriptor
// selector must be non-null else #GP(EXT)
if ((gate_dest_selector & 0xfffc) == 0) {
BX_ERROR(("int_trap_gate(): selector null"));
exception(BX_GP_EXCEPTION, 0);
}
parse_selector(gate_dest_selector, &cs_selector);
// selector must be within its descriptor table limits
// else #GP(selector+EXT)
fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
parse_descriptor(dword1, dword2, &cs_descriptor);
// descriptor AR byte must indicate code seg
// and code segment descriptor DPL<=CPL, else #GP(selector+EXT)
if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
IS_DATA_SEGMENT(cs_descriptor.type) ||
cs_descriptor.dpl > CPL)
{
BX_ERROR(("interrupt(): not accessible or not code segment cs=0x%04x", cs_selector.value));
exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
}
// segment must be present, else #NP(selector + EXT)
if (! IS_PRESENT(cs_descriptor)) {
BX_ERROR(("interrupt(): segment not present"));
exception(BX_NP_EXCEPTION, cs_selector.value & 0xfffc);
}
// if code segment is non-conforming and DPL < CPL then
// INTERRUPT TO INNER PRIVILEGE
if(IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && cs_descriptor.dpl < CPL)
{
Bit16u old_SS, old_CS, SS_for_cpl_x;
Bit32u ESP_for_cpl_x, old_EIP, old_ESP;
bx_descriptor_t ss_descriptor;
bx_selector_t ss_selector;
int is_v8086_mode = v8086_mode();
BX_DEBUG(("interrupt(): INTERRUPT TO INNER PRIVILEGE"));
// check selector and descriptor for new stack in current TSS
get_SS_ESP_from_TSS(cs_descriptor.dpl,
&SS_for_cpl_x, &ESP_for_cpl_x);
if (is_v8086_mode && cs_descriptor.dpl != 0) {
// if code segment DPL != 0 then #GP(new code segment selector)
BX_ERROR(("interrupt(): code segment DPL(%d) != 0 in v8086 mode", cs_descriptor.dpl));
exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
}
// Selector must be non-null else #TS(EXT)
if ((SS_for_cpl_x & 0xfffc) == 0) {
BX_ERROR(("interrupt(): SS selector null"));
exception(BX_TS_EXCEPTION, 0); /* TS(ext) */
}
// selector index must be within its descriptor table limits
// else #TS(SS selector + EXT)
parse_selector(SS_for_cpl_x, &ss_selector);
// fetch 2 dwords of descriptor; call handles out of limits checks
fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
parse_descriptor(dword1, dword2, &ss_descriptor);
// selector rpl must = dpl of code segment,
// else #TS(SS selector + ext)
if (ss_selector.rpl != cs_descriptor.dpl) {
BX_ERROR(("interrupt(): SS.rpl != CS.dpl"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// stack seg DPL must = DPL of code segment,
// else #TS(SS selector + ext)
if (ss_descriptor.dpl != cs_descriptor.dpl) {
BX_ERROR(("interrupt(): SS.dpl != CS.dpl"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// descriptor must indicate writable data segment,
// else #TS(SS selector + EXT)
if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
IS_CODE_SEGMENT(ss_descriptor.type) ||
!IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
{
BX_ERROR(("interrupt(): SS is not writable data segment"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// seg must be present, else #SS(SS selector + ext)
if (! IS_PRESENT(ss_descriptor)) {
BX_ERROR(("interrupt(): SS not present"));
exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// IP must be within CS segment boundaries, else #GP(0)
if (gate_dest_offset > cs_descriptor.u.segment.limit_scaled) {
BX_ERROR(("interrupt(): gate EIP > CS.limit"));
exception(BX_GP_EXCEPTION, 0);
}
old_ESP = ESP;
old_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
old_EIP = EIP;
old_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
// Prepare new stack segment
bx_segment_reg_t new_stack;
new_stack.selector = ss_selector;
new_stack.cache = ss_descriptor;
new_stack.selector.rpl = cs_descriptor.dpl;
// add cpl to the selector value
new_stack.selector.value = (0xfffc & new_stack.selector.value) |
new_stack.selector.rpl;
if (ss_descriptor.u.segment.d_b) {
Bit32u temp_ESP = ESP_for_cpl_x;
if (is_v8086_mode)
{
if (gate_descriptor.type>=14) { // 386 int/trap gate
write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
write_new_stack_dword_32(&new_stack, temp_ESP-12, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
write_new_stack_dword_32(&new_stack, temp_ESP-16, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
temp_ESP -= 16;
}
else {
write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
write_new_stack_word_32(&new_stack, temp_ESP-6, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
write_new_stack_word_32(&new_stack, temp_ESP-8, cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
temp_ESP -= 8;
}
}
if (gate_descriptor.type>=14) { // 386 int/trap gate
// push long pointer to old stack onto new stack
write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, old_SS);
write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, old_ESP);
write_new_stack_dword_32(&new_stack, temp_ESP-12, cs_descriptor.dpl, read_eflags());
write_new_stack_dword_32(&new_stack, temp_ESP-16, cs_descriptor.dpl, old_CS);
write_new_stack_dword_32(&new_stack, temp_ESP-20, cs_descriptor.dpl, old_EIP);
temp_ESP -= 20;
if (push_error) {
temp_ESP -= 4;
write_new_stack_dword_32(&new_stack, temp_ESP, cs_descriptor.dpl, error_code);
}
}
else { // 286 int/trap gate
// push long pointer to old stack onto new stack
write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, old_SS);
write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) old_ESP);
write_new_stack_word_32(&new_stack, temp_ESP-6, cs_descriptor.dpl, (Bit16u) read_eflags());
write_new_stack_word_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, old_CS);
write_new_stack_word_32(&new_stack, temp_ESP-10, cs_descriptor.dpl, (Bit16u) old_EIP);
temp_ESP -= 10;
if (push_error) {
temp_ESP -= 2;
write_new_stack_word_32(&new_stack, temp_ESP, cs_descriptor.dpl, error_code);
}
}
ESP = temp_ESP;
}
else {
Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;
if (is_v8086_mode)
{
if (gate_descriptor.type>=14) { // 386 int/trap gate
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-12), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-16), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
temp_SP -= 16;
}
else {
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-6), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl,
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value);
temp_SP -= 8;
}
}
if (gate_descriptor.type>=14) { // 386 int/trap gate
// push long pointer to old stack onto new stack
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, old_SS);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, old_ESP);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-12), cs_descriptor.dpl, read_eflags());
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-16), cs_descriptor.dpl, old_CS);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-20), cs_descriptor.dpl, old_EIP);
temp_SP -= 20;
if (push_error) {
temp_SP -= 4;
write_new_stack_dword_32(&new_stack, temp_SP, cs_descriptor.dpl, error_code);
}
}
else { // 286 int/trap gate
// push long pointer to old stack onto new stack
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, old_SS);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) old_ESP);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-6), cs_descriptor.dpl, (Bit16u) read_eflags());
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, old_CS);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-10), cs_descriptor.dpl, (Bit16u) old_EIP);
temp_SP -= 10;
if (push_error) {
temp_SP -= 2;
write_new_stack_word_32(&new_stack, temp_SP, cs_descriptor.dpl, error_code);
}
}
SP = temp_SP;
}
// load new CS:eIP values from gate
// set CPL to new code segment DPL
// set RPL of CS to CPL
load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);
// load new SS:eSP values from TSS
load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);
if (is_v8086_mode)
{
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].cache.valid = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_GS].selector.value = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].cache.valid = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_FS].selector.value = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].cache.valid = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_DS].selector.value = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].cache.valid = 0;
BX_CPU_THIS_PTR sregs[BX_SEG_REG_ES].selector.value = 0;
}
}
else
{
BX_DEBUG(("interrupt(): INTERRUPT TO SAME PRIVILEGE"));
if (v8086_mode() && (IS_CODE_SEGMENT_CONFORMING(cs_descriptor.type) || cs_descriptor.dpl != 0)) {
// if code segment DPL != 0 then #GP(new code segment selector)
BX_ERROR(("interrupt(): code segment conforming or DPL(%d) != 0 in v8086 mode", cs_descriptor.dpl));
exception(BX_GP_EXCEPTION, cs_selector.value & 0xfffc);
}
// EIP must be in CS limit else #GP(0)
if (gate_dest_offset > cs_descriptor.u.segment.limit_scaled) {
BX_ERROR(("interrupt(): IP > CS descriptor limit"));
exception(BX_GP_EXCEPTION, 0);
}
// push flags onto stack
// push current CS selector onto stack
// push return offset onto stack
if (gate_descriptor.type >= 14) { // 386 gate
push_32(read_eflags());
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_32(EIP);
if (push_error)
push_32(error_code);
}
else { // 286 gate
push_16((Bit16u) read_eflags());
push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_16(IP);
if (push_error)
push_16(error_code);
}
// load CS:IP from gate
// load CS descriptor
// set the RPL field of CS to CPL
load_cs(&cs_selector, &cs_descriptor, CPL);
}
EIP = gate_dest_offset;
// if interrupt gate then set IF to 0
if (!(gate_descriptor.type & 1)) // even is int-gate
BX_CPU_THIS_PTR clear_IF();
BX_CPU_THIS_PTR clear_TF();
BX_CPU_THIS_PTR clear_NT();
BX_CPU_THIS_PTR clear_VM();
BX_CPU_THIS_PTR clear_RF();
return;
default:
BX_PANIC(("bad descriptor type in interrupt()!"));
break;
}
}
void
RETfar_pm(UINT nbytes)
{
selector_t cs_sel, ss_sel, temp_sel;
UINT32 sp;
UINT32 new_ip, new_sp;
UINT16 new_cs, new_ss;
int rv;
int i;
VERBOSE(("RETfar_pm: old EIP = %04x:%08x, ESP = %04x:%08x, nbytes = %d", CPU_CS, CPU_PREV_EIP, CPU_SS, CPU_ESP, nbytes));
if (CPU_STAT_SS32) {
sp = CPU_ESP;
} else {
sp = CPU_SP;
}
if (CPU_INST_OP32) {
STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, nbytes + 8);
new_ip = cpu_vmemoryread_d(CPU_SS_INDEX, sp);
new_cs = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 4);
} else {
STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, nbytes + 4);
new_ip = cpu_vmemoryread_w(CPU_SS_INDEX, sp);
new_cs = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 2);
}
rv = parse_selector(&cs_sel, new_cs);
if (rv < 0) {
VERBOSE(("RETfar_pm: parse_selector (selector = %04x, rv = %d, %s)", cs_sel.selector, rv));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* check segment type */
if (!cs_sel.desc.s) {
VERBOSE(("RETfar_pm: return to system segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (!cs_sel.desc.u.seg.c) {
VERBOSE(("RETfar_pm: return to data segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* check privilege level */
if (cs_sel.rpl < CPU_STAT_CPL) {
VERBOSE(("RETfar_pm: RPL(%d) < CPL(%d)", cs_sel.rpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (!cs_sel.desc.u.seg.ec && (cs_sel.desc.dpl > cs_sel.rpl)) {
VERBOSE(("RETfar_pm: NON-COMFORMING-CODE-SEGMENT and DPL(%d) > RPL(%d)", cs_sel.desc.dpl, cs_sel.rpl));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* not present */
if (selector_is_not_present(&cs_sel)) {
VERBOSE(("RETfar_pm: returned code segment is not present"));
EXCEPTION(NP_EXCEPTION, cs_sel.idx);
}
if (cs_sel.rpl == CPU_STAT_CPL) {
VERBOSE(("RETfar_pm: RETURN-TO-SAME-PRIVILEGE-LEVEL"));
/* check code segment limit */
if (new_ip > cs_sel.desc.u.seg.limit) {
VERBOSE(("RETfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
VERBOSE(("RETfar_pm: new_ip = %08x, new_cs = %04x", new_ip, cs_sel.selector));
if (CPU_INST_OP32) {
nbytes += 8;
} else {
nbytes += 4;
}
if (CPU_STAT_SS32) {
CPU_ESP += nbytes;
} else {
CPU_SP += (UINT16)nbytes;
}
load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
SET_EIP(new_ip);
} else {
VERBOSE(("RETfar_pm: RETURN-OUTER-PRIVILEGE-LEVEL"));
if (CPU_INST_OP32) {
STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 8 + 8 + nbytes);
new_sp = cpu_vmemoryread_d(CPU_SS_INDEX, sp + 8 + nbytes);
new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 8 + nbytes + 4);
} else {
STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 4 + 4 + nbytes);
new_sp = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 4 + nbytes);
new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 4 + nbytes + 2);
}
rv = parse_selector(&ss_sel, new_ss);
if (rv < 0) {
VERBOSE(("RETfar_pm: parse_selector (selector = %04x, rv = %d, %s)", ss_sel.selector, rv));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
/* check stack segment descriptor */
if (!ss_sel.desc.s) {
VERBOSE(("RETfar_pm: stack segment is system segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (ss_sel.desc.u.seg.c) {
VERBOSE(("RETfar_pm: stack segment is code segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (!ss_sel.desc.u.seg.wr) {
VERBOSE(("RETfar_pm: stack segment is read-only data segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* check privilege level */
if (ss_sel.rpl != cs_sel.rpl) {
VERBOSE(("RETfar_pm: RPL[SS](%d) != RPL[CS](%d)", ss_sel.rpl, cs_sel.rpl));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (ss_sel.desc.dpl != cs_sel.rpl) {
VERBOSE(("RETfar_pm: DPL[SS](%d) != RPL[CS](%d)", ss_sel.desc.dpl, cs_sel.rpl));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* not present */
if (selector_is_not_present(&ss_sel)) {
VERBOSE(("RETfar_pm: stack segment is not present"));
EXCEPTION(SS_EXCEPTION, ss_sel.idx);
}
/* check code segment limit */
if (new_ip > cs_sel.desc.u.seg.limit) {
VERBOSE(("RETfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
VERBOSE(("RETfar_pm: new_ip = %08x, new_cs = %04x", new_ip, cs_sel.selector));
VERBOSE(("RETfar_pm: new_sp = %08x, new_ss = %04x", new_sp, ss_sel.selector));
load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.rpl);
SET_EIP(new_ip);
load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.rpl);
if (CPU_STAT_SS32) {
CPU_ESP = new_sp + nbytes;
} else {
CPU_SP = (UINT16)(new_sp + nbytes);
}
/* check segment register */
for (i = 0; i < CPU_SEGREG_NUM; i++) {
descriptor_t *dp;
BOOL valid;
dp = &CPU_STAT_SREG(i);
if ((!dp->u.seg.c || !dp->u.seg.ec)
&& (CPU_STAT_SREG(i).dpl < CPU_STAT_CPL)) {
/* segment register is invalid */
CPU_REGS_SREG(i) = 0;
CPU_STAT_SREG_CLEAR(i);
continue;
}
rv = parse_selector(&temp_sel, CPU_REGS_SREG(i));
if (rv < 0) {
/* segment register is invalid */
CPU_REGS_SREG(i) = 0;
CPU_STAT_SREG_CLEAR(i);
continue;
}
valid = TRUE;
if (!temp_sel.desc.s) {
/* system segment */
valid = FALSE;
}
if (temp_sel.desc.u.seg.c && !temp_sel.desc.u.seg.wr) {
/* execute-only code segment */
valid = FALSE;
}
if (!temp_sel.desc.u.seg.c || !temp_sel.desc.u.seg.ec) {
if (CPU_STAT_CPL > temp_sel.desc.dpl) {
valid = FALSE;
}
}
if (!valid) {
/* segment register is invalid */
CPU_REGS_SREG(i) = 0;
CPU_STAT_SREG(i).valid = 0;
}
}
}
VERBOSE(("RETfar_pm: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
}
/*---
* CALLfar_pm: call gate (MORE-PRIVILEGE)
*/
static void
CALLfar_pm_call_gate_more_privilege(const selector_t *callgate_sel, selector_t *cs_sel)
{
UINT32 param[32]; /* copy param */
selector_t ss_sel;
UINT32 old_eip, old_esp;
UINT32 new_esp;
UINT16 old_cs, old_ss;
UINT16 new_ss;
int param_count;
int i;
int rv;
VERBOSE(("CALLfar_pm: MORE-PRIVILEGE"));
/* save register */
old_cs = CPU_CS;
old_ss = CPU_SS;
old_eip = CPU_EIP;
old_esp = CPU_ESP;
if (!CPU_STAT_SS32) {
old_esp &= 0xffff;
}
/* get stack pointer from TSS */
get_stack_pointer_from_tss(cs_sel->desc.dpl, &new_ss, &new_esp);
/* parse stack segment descriptor */
rv = parse_selector(&ss_sel, new_ss);
if (rv < 0) {
VERBOSE(("CALLfar_pm: parse_selector (selector = %04x, rv = %d)", new_ss, rv));
EXCEPTION(TS_EXCEPTION, ss_sel.idx);
}
/* check privilege level */
if (ss_sel.rpl != cs_sel->desc.dpl) {
VERBOSE(("CALLfar_pm: RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel->desc.dpl));
EXCEPTION(TS_EXCEPTION, ss_sel.idx);
}
if (ss_sel.desc.dpl != cs_sel->desc.dpl) {
VERBOSE(("CALLfar_pm: DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel->desc.dpl));
EXCEPTION(TS_EXCEPTION, ss_sel.idx);
}
/* stack segment must be writable data segment. */
if (!ss_sel.desc.s) {
VERBOSE(("CALLfar_pm: stack segment is system segment"));
EXCEPTION(TS_EXCEPTION, ss_sel.idx);
}
if (ss_sel.desc.u.seg.c) {
VERBOSE(("CALLfar_pm: stack segment is code segment"));
EXCEPTION(TS_EXCEPTION, ss_sel.idx);
}
if (!ss_sel.desc.u.seg.wr) {
VERBOSE(("CALLfar_pm: stack segment is read-only data segment"));
EXCEPTION(TS_EXCEPTION, ss_sel.idx);
}
/* not present */
if (selector_is_not_present(&ss_sel)) {
VERBOSE(("CALLfar_pm: stack segment selector is not present"));
EXCEPTION(SS_EXCEPTION, ss_sel.idx);
}
param_count = callgate_sel->desc.u.gate.count;
VERBOSE(("CALLfar_pm: param_count = %d", param_count));
if (callgate_sel->desc.type == CPU_SYSDESC_TYPE_CALL_32) {
STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_esp, 16 + param_count * 4);
/* dump param */
for (i = 0; i < param_count; i++) {
param[i] = cpu_vmemoryread_d(CPU_SS_INDEX, old_esp + i * 4);
VERBOSE(("CALLfar_pm: get param[%d] = %08x", i, param[i]));
}
load_ss(ss_sel.selector, &ss_sel.desc, ss_sel.desc.dpl);
if (CPU_STAT_SS32) {
CPU_ESP = new_esp;
} else {
CPU_SP = (UINT16)new_esp;
}
load_cs(cs_sel->selector, &cs_sel->desc, cs_sel->desc.dpl);
SET_EIP(callgate_sel->desc.u.gate.offset);
PUSH0_32(old_ss);
PUSH0_32(old_esp);
/* restore param */
for (i = param_count; i > 0; i--) {
PUSH0_32(param[i - 1]);
VERBOSE(("CALLfar_pm: set param[%d] = %08x", i - 1, param[i - 1]));
}
PUSH0_32(old_cs);
PUSH0_32(old_eip);
} else {
STACK_PUSH_CHECK(ss_sel.idx, &ss_sel.desc, new_esp, 8 + param_count * 2);
/* dump param */
for (i = 0; i < param_count; i++) {
param[i] = cpu_vmemoryread_w(CPU_SS_INDEX, old_esp + i * 2);
VERBOSE(("CALLfar_pm: get param[%d] = %04x", i, param[i]));
}
load_ss(ss_sel.selector, &ss_sel.desc, ss_sel.desc.dpl);
if (CPU_STAT_SS32) {
CPU_ESP = new_esp;
} else {
CPU_SP = (UINT16)new_esp;
}
load_cs(cs_sel->selector, &cs_sel->desc, cs_sel->desc.dpl);
SET_EIP(callgate_sel->desc.u.gate.offset);
PUSH0_16(old_ss);
PUSH0_16(old_esp);
/* restore param */
for (i = param_count; i > 0; i--) {
PUSH0_16(param[i - 1]);
VERBOSE(("CALLfar_pm: set param[%d] = %04x", i - 1, param[i - 1]));
}
PUSH0_16(old_cs);
PUSH0_16(old_eip);
}
}
/*---
* CALLfar_pm: code segment
*/
static void
CALLfar_pm_code_segment(const selector_t *cs_sel, UINT32 new_ip)
{
UINT32 sp;
VERBOSE(("CALLfar_pm: CODE-SEGMENT"));
/* check privilege level */
if (!cs_sel->desc.u.seg.ec) {
VERBOSE(("CALLfar_pm: NON-CONFORMING-CODE-SEGMENT"));
/* 下巻 p.119 4.8.1.1. */
if (cs_sel->rpl > CPU_STAT_CPL) {
VERBOSE(("CALLfar_pm: RPL(%d) > CPL(%d)", cs_sel->rpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel->idx);
}
if (cs_sel->desc.dpl != CPU_STAT_CPL) {
VERBOSE(("CALLfar_pm: DPL(%d) != CPL(%d)", cs_sel->desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel->idx);
}
} else {
VERBOSE(("CALLfar_pm: CONFORMING-CODE-SEGMENT"));
/* 下巻 p.120 4.8.1.2. */
if (cs_sel->desc.dpl > CPU_STAT_CPL) {
VERBOSE(("CALLfar_pm: DPL(%d) > CPL(%d)", cs_sel->desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel->idx);
}
}
/* not present */
if (selector_is_not_present(cs_sel)) {
VERBOSE(("CALLfar_pm: selector is not present"));
EXCEPTION(NP_EXCEPTION, cs_sel->idx);
}
if (CPU_STAT_SS32) {
sp = CPU_ESP;
} else {
sp = CPU_SP;
}
if (CPU_INST_OP32) {
STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 8);
/* out of range */
if (new_ip > cs_sel->desc.u.seg.limit) {
VERBOSE(("CALLfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel->desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
PUSH0_32(CPU_CS);
PUSH0_32(CPU_EIP);
} else {
STACK_PUSH_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 4);
/* out of range */
if (new_ip > cs_sel->desc.u.seg.limit) {
VERBOSE(("CALLfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel->desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
PUSH0_16(CPU_CS);
PUSH0_16(CPU_IP);
}
load_cs(cs_sel->selector, &cs_sel->desc, CPU_STAT_CPL);
SET_EIP(new_ip);
}
/*---
* JMPfar: call gate
*/
static void
JMPfar_pm_call_gate(const selector_t *callgate_sel)
{
selector_t cs_sel;
int rv;
VERBOSE(("JMPfar_pm: CALL-GATE"));
/* check privilege level */
if (callgate_sel->desc.dpl < CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: DPL(%d) < CPL(%d)", callgate_sel->desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, callgate_sel->idx);
}
if (callgate_sel->desc.dpl < callgate_sel->rpl) {
VERBOSE(("JMPfar_pm: DPL(%d) < RPL(%d)", callgate_sel->desc.dpl, callgate_sel->rpl));
EXCEPTION(GP_EXCEPTION, callgate_sel->idx);
}
/* not present */
if (selector_is_not_present(callgate_sel)) {
VERBOSE(("JMPfar_pm: selector is not present"));
EXCEPTION(NP_EXCEPTION, callgate_sel->idx);
}
/* parse code segment selector */
rv = parse_selector(&cs_sel, callgate_sel->desc.u.gate.selector);
if (rv < 0) {
VERBOSE(("JMPfar_pm: parse_selector (selector = %04x, rv = %d)", callgate_sel->desc.u.gate.selector, rv));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* check segment type */
if (!cs_sel.desc.s) {
VERBOSE(("JMPfar_pm: code segment is system segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (!cs_sel.desc.u.seg.c) {
VERBOSE(("JMPfar_pm: code segment is data segment"));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
/* check privilege level */
if (!cs_sel.desc.u.seg.ec) {
/* 下巻 p.119 4.8.1.1. */
if (cs_sel.rpl > CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: RPL(%d) > CPL(%d)", cs_sel.rpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
if (cs_sel.desc.dpl != CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: DPL(%d) != CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
} else {
/* 下巻 p.120 4.8.1.2. */
if (cs_sel.desc.dpl > CPU_STAT_CPL) {
VERBOSE(("JMPfar_pm: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, cs_sel.idx);
}
}
/* not present */
if (selector_is_not_present(&cs_sel)) {
VERBOSE(("JMPfar_pm: selector is not present"));
EXCEPTION(NP_EXCEPTION, cs_sel.idx);
}
/* out of range */
if (callgate_sel->desc.u.gate.offset > cs_sel.desc.u.seg.limit) {
VERBOSE(("JMPfar_pm: new_ip is out of range. new_ip = %08x, limit = %08x", callgate_sel->desc.u.gate.offset, cs_sel.desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
SET_EIP(callgate_sel->desc.u.gate.offset);
}
/*---
* IRET_pm: OUTER-PRIVILEGE
*/
static void
IRET_pm_protected_mode_return_outer_privilege(const selector_t *cs_sel, UINT32 new_ip, UINT32 new_flags)
{
descriptor_t *dp;
selector_t ss_sel;
UINT32 mask;
UINT32 sp;
UINT32 new_sp;
UINT16 new_ss;
int rv;
int i;
VERBOSE(("IRET_pm: RETURN-OUTER-PRIVILEGE-LEVEL"));
if (CPU_STAT_SS32) {
sp = CPU_ESP;
} else {
sp = CPU_SP;
}
if (CPU_INST_OP32) {
STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 20);
new_sp = cpu_vmemoryread_d(CPU_SS_INDEX, sp + 12);
new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 16);
} else {
STACK_POP_CHECK(CPU_REGS_SREG(CPU_SS_INDEX), &CPU_STAT_SREG(CPU_SS_INDEX), sp, 10);
new_sp = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 6);
new_ss = cpu_vmemoryread_w(CPU_SS_INDEX, sp + 8);
}
VERBOSE(("IRET_pm: new_sp = 0x%08x, new_ss = 0x%04x", new_sp, new_ss));
rv = parse_selector(&ss_sel, new_ss);
if (rv < 0) {
VERBOSE(("IRET_pm: parse_selector (selector = %04x, rv = %d)", ss_sel.selector, rv));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
/* check privilege level */
if (ss_sel.rpl != cs_sel->rpl) {
VERBOSE(("IRET_pm: RPL[SS](%d) != RPL[CS](%d)", ss_sel.rpl, cs_sel->rpl));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
if (ss_sel.desc.dpl != cs_sel->rpl) {
VERBOSE(("IRET_pm: DPL[SS](%d) != RPL[CS](%d)", ss_sel.desc.dpl, cs_sel->rpl));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
/* check stack segment descriptor */
if (!ss_sel.desc.s) {
VERBOSE(("IRET_pm: stack segment is system segment"));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
if (ss_sel.desc.u.seg.c) {
VERBOSE(("IRET_pm: stack segment is code segment"));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
if (!ss_sel.desc.u.seg.wr) {
VERBOSE(("IRET_pm: stack segment is read-only data segment"));
EXCEPTION(GP_EXCEPTION, ss_sel.idx);
}
/* not present */
if (selector_is_not_present(&ss_sel)) {
VERBOSE(("IRET_pm: stack segment is not present"));
EXCEPTION(SS_EXCEPTION, ss_sel.idx);
}
/* check code segment limit */
if (new_ip > cs_sel->desc.u.seg.limit) {
VERBOSE(("IRET_pm: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel->desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
mask = 0;
if (CPU_INST_OP32)
mask |= RF_FLAG;
if (CPU_STAT_CPL <= CPU_STAT_IOPL)
mask |= I_FLAG;
if (CPU_STAT_CPL == 0) {
mask |= IOPL_FLAG;
if (CPU_INST_OP32) {
mask |= VM_FLAG|VIF_FLAG|VIP_FLAG;
}
}
/* set new register */
load_cs(cs_sel->selector, &cs_sel->desc, cs_sel->rpl);
SET_EIP(new_ip);
set_eflags(new_flags, mask);
load_ss(ss_sel.selector, &ss_sel.desc, cs_sel->rpl);
if (CPU_STAT_SS32) {
CPU_ESP = new_sp;
} else {
CPU_SP = (UINT16)new_sp;
}
/* check segment register */
for (i = 0; i < CPU_SEGREG_NUM; i++) {
if ((i != CPU_CS_INDEX) && (i != CPU_SS_INDEX)) {
dp = &CPU_STAT_SREG(i);
if ((!dp->u.seg.c || !dp->u.seg.ec)
&& (CPU_STAT_SREG(i).dpl < CPU_STAT_CPL)) {
/* segment register is invalid */
CPU_REGS_SREG(i) = 0;
CPU_STAT_SREG_CLEAR(i);
}
}
}
}
void
task_switch(selector_t *task_sel, task_switch_type_t type)
{
UINT32 regs[CPU_REG_NUM];
UINT32 eip;
UINT32 new_flags;
UINT32 cr3 = 0;
UINT16 sreg[CPU_SEGREG_NUM];
UINT16 ldtr;
UINT16 iobase;
UINT16 t;
selector_t cs_sel;
int rv;
UINT32 cur_base; /* current task state */
UINT32 task_base; /* new task state */
UINT32 old_flags = REAL_EFLAGREG;
BOOL task16;
UINT i;
VERBOSE(("task_switch: start"));
/* limit check */
switch (task_sel->desc.type) {
case CPU_SYSDESC_TYPE_TSS_32:
case CPU_SYSDESC_TYPE_TSS_BUSY_32:
if (task_sel->desc.u.seg.limit < 0x67) {
EXCEPTION(TS_EXCEPTION, task_sel->idx);
}
task16 = FALSE;
break;
case CPU_SYSDESC_TYPE_TSS_16:
case CPU_SYSDESC_TYPE_TSS_BUSY_16:
if (task_sel->desc.u.seg.limit < 0x2b) {
EXCEPTION(TS_EXCEPTION, task_sel->idx);
}
task16 = TRUE;
break;
default:
ia32_panic("task_switch: descriptor type is invalid.");
task16 = FALSE; /* compiler happy */
break;
}
cur_base = CPU_TR_DESC.u.seg.segbase;
task_base = task_sel->desc.u.seg.segbase;
VERBOSE(("task_switch: cur task (%04x) = 0x%08x:%08x", CPU_TR, cur_base, CPU_TR_DESC.u.seg.limit));
VERBOSE(("task_switch: new task (%04x) = 0x%08x:%08x", task_sel->selector, task_base, task_sel->desc.u.seg.limit));
VERBOSE(("task_switch: %dbit task switch", task16 ? 16 : 32));
#if defined(MORE_DEBUG)
{
UINT32 v;
VERBOSE(("task_switch: new task"));
for (i = 0; i < task_sel->desc.u.seg.limit; i += 4) {
v = cpu_kmemoryread_d(task_base + i);
VERBOSE(("task_switch: 0x%08x: %08x", task_base + i,v));
}
}
#endif
if (CPU_STAT_PAGING) {
/* task state paging check */
paging_check(cur_base, CPU_TR_DESC.u.seg.limit, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
paging_check(task_base, task_sel->desc.u.seg.limit, CPU_PAGE_WRITE_DATA|CPU_MODE_SUPERVISER);
}
/* load task state */
memset(sreg, 0, sizeof(sreg));
if (!task16) {
if (CPU_STAT_PAGING) {
cr3 = cpu_kmemoryread_d(task_base + 28);
}
eip = cpu_kmemoryread_d(task_base + 32);
new_flags = cpu_kmemoryread_d(task_base + 36);
for (i = 0; i < CPU_REG_NUM; i++) {
regs[i] = cpu_kmemoryread_d(task_base + 40 + i * 4);
}
for (i = 0; i < CPU_SEGREG_NUM; i++) {
sreg[i] = cpu_kmemoryread_w(task_base + 72 + i * 4);
}
ldtr = cpu_kmemoryread_w(task_base + 96);
t = cpu_kmemoryread_w(task_base + 100);
if (t & 1) {
CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_TASK;
}
iobase = cpu_kmemoryread_w(task_base + 102);
} else {
eip = cpu_kmemoryread_w(task_base + 14);
new_flags = cpu_kmemoryread_w(task_base + 16);
for (i = 0; i < CPU_REG_NUM; i++) {
regs[i] = cpu_kmemoryread_w(task_base + 18 + i * 2);
}
for (i = 0; i < CPU_SEGREG286_NUM; i++) {
sreg[i] = cpu_kmemoryread_w(task_base + 34 + i * 2);
}
ldtr = cpu_kmemoryread_w(task_base + 42);
iobase = 0;
t = 0;
}
#if defined(DEBUG)
VERBOSE(("task_switch: current task"));
if (!task16) {
VERBOSE(("task_switch: CR3 = 0x%08x", CPU_CR3));
}
VERBOSE(("task_switch: eip = 0x%08x", CPU_EIP));
VERBOSE(("task_switch: eflags = 0x%08x", old_flags));
for (i = 0; i < CPU_REG_NUM; i++) {
VERBOSE(("task_switch: regs[%d] = 0x%08x", i, CPU_REGS_DWORD(i)));
}
for (i = 0; i < CPU_SEGREG_NUM; i++) {
VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, CPU_REGS_SREG(i)));
}
VERBOSE(("task_switch: ldtr = 0x%04x", CPU_LDTR));
VERBOSE(("task_switch: new task"));
if (!task16) {
VERBOSE(("task_switch: CR3 = 0x%08x", cr3));
}
VERBOSE(("task_switch: eip = 0x%08x", eip));
VERBOSE(("task_switch: eflags = 0x%08x", new_flags));
for (i = 0; i < CPU_REG_NUM; i++) {
VERBOSE(("task_switch: regs[%d] = 0x%08x", i, regs[i]));
}
for (i = 0; i < CPU_SEGREG_NUM; i++) {
VERBOSE(("task_switch: sreg[%d] = 0x%04x", i, sreg[i]));
}
VERBOSE(("task_switch: ldtr = 0x%04x", ldtr));
if (!task16) {
VERBOSE(("task_switch: t = 0x%04x", t));
VERBOSE(("task_switch: iobase = 0x%04x", iobase));
}
#endif
/* if IRET or JMP, clear busy flag in this task: need */
/* if IRET, clear NT_FLAG in current EFLAG: need */
switch (type) {
case TASK_SWITCH_IRET:
/* clear NT_FLAG */
old_flags &= ~NT_FLAG;
/*FALLTHROUGH*/
case TASK_SWITCH_JMP:
/* clear busy flags in current task */
CPU_SET_TASK_FREE(CPU_TR, &CPU_TR_DESC);
break;
case TASK_SWITCH_CALL:
case TASK_SWITCH_INTR:
/* Nothing to do */
break;
default:
ia32_panic("task_switch(): task switch type is invalid");
break;
}
/* save this task state in this task state segment */
if (!task16) {
cpu_kmemorywrite_d(cur_base + 32, CPU_EIP);
cpu_kmemorywrite_d(cur_base + 36, old_flags);
for (i = 0; i < CPU_REG_NUM; i++) {
cpu_kmemorywrite_d(cur_base + 40 + i * 4, CPU_REGS_DWORD(i));
}
for (i = 0; i < CPU_SEGREG_NUM; i++) {
cpu_kmemorywrite_w(cur_base + 72 + i * 4, CPU_REGS_SREG(i));
}
} else {
cpu_kmemorywrite_w(cur_base + 14, CPU_IP);
cpu_kmemorywrite_w(cur_base + 16, (UINT16)old_flags);
for (i = 0; i < CPU_REG_NUM; i++) {
cpu_kmemorywrite_w(cur_base + 18 + i * 2, CPU_REGS_WORD(i));
}
for (i = 0; i < CPU_SEGREG286_NUM; i++) {
cpu_kmemorywrite_w(cur_base + 34 + i * 2, CPU_REGS_SREG(i));
}
}
#if defined(MORE_DEBUG)
{
UINT32 v;
VERBOSE(("task_switch: current task"));
for (i = 0; i < CPU_TR_DESC.u.seg.limit; i += 4) {
v = cpu_kmemoryread_d(cur_base + i);
VERBOSE(("task_switch: 0x%08x: %08x", cur_base + i, v));
}
}
#endif
/* set back link selector */
switch (type) {
case TASK_SWITCH_CALL:
case TASK_SWITCH_INTR:
/* set back link selector */
cpu_kmemorywrite_w(task_base, CPU_TR);
break;
case TASK_SWITCH_IRET:
case TASK_SWITCH_JMP:
/* Nothing to do */
break;
default:
ia32_panic("task_switch(): task switch type is invalid");
break;
}
/* Now task switching! */
/* if CALL, INTR, set EFLAGS image NT_FLAG */
/* if CALL, INTR, JMP set busy flag */
switch (type) {
case TASK_SWITCH_CALL:
case TASK_SWITCH_INTR:
/* set back link selector */
new_flags |= NT_FLAG;
/*FALLTHROUGH*/
case TASK_SWITCH_JMP:
CPU_SET_TASK_BUSY(task_sel->selector, &task_sel->desc);
break;
case TASK_SWITCH_IRET:
/* check busy flag is active */
if (task_sel->desc.valid) {
UINT32 h;
h = cpu_kmemoryread_d(task_sel->addr + 4);
if ((h & CPU_TSS_H_BUSY) == 0) {
ia32_panic("task_switch: new task is not busy");
}
}
break;
default:
ia32_panic("task_switch(): task switch type is invalid");
break;
}
/* set CR0 image CPU_CR0_TS */
CPU_CR0 |= CPU_CR0_TS;
/* load task selector to CPU_TR */
CPU_TR = task_sel->selector;
CPU_TR_DESC = task_sel->desc;
/* load task state (CR3, EFLAG, EIP, GPR, segreg, LDTR) */
/* set new CR3 */
if (!task16 && CPU_STAT_PAGING) {
set_CR3(cr3);
}
/* set new EIP, GPR */
CPU_PREV_EIP = CPU_EIP = eip;
for (i = 0; i < CPU_REG_NUM; i++) {
CPU_REGS_DWORD(i) = regs[i];
}
for (i = 0; i < CPU_SEGREG_NUM; i++) {
CPU_REGS_SREG(i) = sreg[i];
CPU_STAT_SREG_INIT(i);
}
/* set new EFLAGS */
set_eflags(new_flags, I_FLAG|IOPL_FLAG|RF_FLAG|VM_FLAG|VIF_FLAG|VIP_FLAG);
/* I/O deny bitmap */
if (!task16) {
if (iobase != 0 && iobase < task_sel->desc.u.seg.limit) {
CPU_STAT_IOLIMIT = (UINT16)(task_sel->desc.u.seg.limit - iobase);
CPU_STAT_IOADDR = task_sel->desc.u.seg.segbase + iobase;
} else {
CPU_STAT_IOLIMIT = 0;
}
} else {
CPU_STAT_IOLIMIT = 0;
}
VERBOSE(("task_switch: ioaddr = %08x, limit = %08x", CPU_STAT_IOADDR, CPU_STAT_IOLIMIT));
#if defined(IA32_SUPPORT_DEBUG_REGISTER)
/* check resume flag */
if (CPU_EFLAG & RF_FLAG) {
CPU_STAT_BP_EVENT |= CPU_STAT_BP_EVENT_RF;
}
/* clear local break point flags */
CPU_DR7 &= ~(CPU_DR7_L(0)|CPU_DR7_L(1)|CPU_DR7_L(2)|CPU_DR7_L(3)|CPU_DR7_LE);
CPU_STAT_BP = 0;
for (i = 0; i < CPU_DEBUG_REG_INDEX_NUM; i++) {
if (CPU_DR7 & CPU_DR7_G(i)) {
CPU_STAT_BP |= (1 << i);
}
}
#endif
/* load new LDTR */
load_ldtr(ldtr, TS_EXCEPTION);
/* set new segment register */
if (!CPU_STAT_VM86) {
/* clear segment descriptor cache */
for (i = 0; i < CPU_SEGREG_NUM; i++) {
CPU_STAT_SREG_CLEAR(i);
}
/* load CS */
rv = parse_selector(&cs_sel, sreg[CPU_CS_INDEX]);
if (rv < 0) {
VERBOSE(("task_switch: load CS failure (sel = 0x%04x, rv = %d)", sreg[CPU_CS_INDEX], rv));
EXCEPTION(TS_EXCEPTION, cs_sel.idx);
}
/* CS register must be code segment */
if (!cs_sel.desc.s || !cs_sel.desc.u.seg.c) {
EXCEPTION(TS_EXCEPTION, cs_sel.idx);
}
/* check privilege level */
if (!cs_sel.desc.u.seg.ec) {
/* non-confirming code segment */
if (cs_sel.desc.dpl != cs_sel.rpl) {
EXCEPTION(TS_EXCEPTION, cs_sel.idx);
}
} else {
/* confirming code segment */
if (cs_sel.desc.dpl < cs_sel.rpl) {
EXCEPTION(TS_EXCEPTION, cs_sel.idx);
}
}
/* code segment is not present */
rv = selector_is_not_present(&cs_sel);
if (rv < 0) {
EXCEPTION(NP_EXCEPTION, cs_sel.idx);
}
/* Now loading CS register */
load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);
/* load ES, SS, DS, FS, GS segment register */
for (i = 0; i < CPU_SEGREG_NUM; i++) {
if (i != CPU_CS_INDEX) {
load_segreg(i, sreg[i], TS_EXCEPTION);
}
}
}
/* out of range */
if (CPU_EIP > CPU_STAT_CS_LIMIT) {
VERBOSE(("task_switch: new_ip is out of range. new_ip = %08x, limit = %08x", CPU_EIP, CPU_STAT_CS_LIMIT));
EXCEPTION(GP_EXCEPTION, 0);
}
VERBOSE(("task_switch: done."));
}
BX_CPU_C::call_protected(bxInstruction_c *i, Bit16u cs_raw, bx_address disp)
{
bx_selector_t cs_selector;
Bit32u dword1, dword2;
bx_descriptor_t cs_descriptor;
/* new cs selector must not be null, else #GP(0) */
if ((cs_raw & 0xfffc) == 0) {
BX_ERROR(("call_protected: CS selector null"));
exception(BX_GP_EXCEPTION, 0, 0);
}
parse_selector(cs_raw, &cs_selector);
// check new CS selector index within its descriptor limits,
// else #GP(new CS selector)
fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
parse_descriptor(dword1, dword2, &cs_descriptor);
// examine AR byte of selected descriptor for various legal values
if (cs_descriptor.valid==0) {
BX_ERROR(("call_protected: invalid CS descriptor"));
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
}
if (cs_descriptor.segment) // normal segment
{
check_cs(&cs_descriptor, cs_raw, BX_SELECTOR_RPL(cs_raw), CPL);
#if BX_SUPPORT_X86_64
if (i->os64L()) {
// push return address onto stack (CS padded to 64bits)
push_64((Bit64u) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_64(RIP);
}
else
#endif
if (i->os32L()) {
// push return address onto stack (CS padded to 32bits)
push_32((Bit32u) BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_32(EIP);
}
else {
// push return address onto stack
push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_16(IP);
}
// load code segment descriptor into CS cache
// load CS with new code segment selector
// set RPL of CS to CPL
branch_far64(&cs_selector, &cs_descriptor, disp, CPL);
return;
}
else { // gate & special segment
bx_descriptor_t gate_descriptor = cs_descriptor;
bx_selector_t gate_selector = cs_selector;
Bit32u new_EIP;
Bit16u dest_selector;
Bit16u raw_tss_selector;
bx_selector_t tss_selector;
bx_descriptor_t tss_descriptor;
Bit32u temp_eIP;
// descriptor DPL must be >= CPL else #GP(gate selector)
if (gate_descriptor.dpl < CPL) {
BX_ERROR(("call_protected: descriptor.dpl < CPL"));
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
}
// descriptor DPL must be >= gate selector RPL else #GP(gate selector)
if (gate_descriptor.dpl < gate_selector.rpl) {
BX_ERROR(("call_protected: descriptor.dpl < selector.rpl"));
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
}
#if BX_SUPPORT_X86_64
if (long_mode()) {
// call gate type is higher priority than non-present bit check
if (gate_descriptor.type != BX_386_CALL_GATE) {
BX_ERROR(("call_protected: gate type %u unsupported in long mode", (unsigned) gate_descriptor.type));
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
}
}
else
#endif
{
switch (gate_descriptor.type) {
case BX_SYS_SEGMENT_AVAIL_286_TSS:
case BX_SYS_SEGMENT_AVAIL_386_TSS:
case BX_TASK_GATE:
case BX_286_CALL_GATE:
case BX_386_CALL_GATE:
break;
default:
BX_ERROR(("call_protected(): gate.type(%u) unsupported", (unsigned) gate_descriptor.type));
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
}
}
// gate descriptor must be present else #NP(gate selector)
if (! IS_PRESENT(gate_descriptor)) {
BX_ERROR(("call_protected: gate not present"));
exception(BX_NP_EXCEPTION, cs_raw & 0xfffc, 0);
}
#if BX_SUPPORT_X86_64
if (long_mode()) {
call_gate64(&gate_selector);
return;
}
#endif
switch (gate_descriptor.type) {
case BX_SYS_SEGMENT_AVAIL_286_TSS:
case BX_SYS_SEGMENT_AVAIL_386_TSS:
if (gate_descriptor.type==BX_SYS_SEGMENT_AVAIL_286_TSS)
BX_DEBUG(("call_protected: 16bit available TSS"));
else
BX_DEBUG(("call_protected: 32bit available TSS"));
// SWITCH_TASKS _without_ nesting to TSS
task_switch(&gate_selector, &gate_descriptor,
BX_TASK_FROM_CALL_OR_INT, dword1, dword2);
// EIP must be in code seg limit, else #GP(0)
if (EIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled) {
BX_ERROR(("call_protected: EIP not within CS limits"));
exception(BX_GP_EXCEPTION, 0, 0);
}
return;
case BX_TASK_GATE:
// examine selector to TSS, given in Task Gate descriptor
// must specify global in the local/global bit else #TS(TSS selector)
raw_tss_selector = gate_descriptor.u.taskgate.tss_selector;
parse_selector(raw_tss_selector, &tss_selector);
if (tss_selector.ti) {
BX_ERROR(("call_protected: tss_selector.ti=1"));
exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
}
// index must be within GDT limits else #TS(TSS selector)
fetch_raw_descriptor(&tss_selector, &dword1, &dword2, BX_GP_EXCEPTION);
parse_descriptor(dword1, dword2, &tss_descriptor);
// descriptor AR byte must specify available TSS
// else #GP(TSS selector)
if (tss_descriptor.valid==0 || tss_descriptor.segment) {
BX_ERROR(("call_protected: TSS selector points to bad TSS"));
exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
}
if (tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_286_TSS &&
tss_descriptor.type!=BX_SYS_SEGMENT_AVAIL_386_TSS)
{
BX_ERROR(("call_protected: TSS selector points to bad TSS"));
exception(BX_GP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
}
// task state segment must be present, else #NP(tss selector)
if (! IS_PRESENT(tss_descriptor)) {
BX_ERROR(("call_protected: task descriptor.p == 0"));
exception(BX_NP_EXCEPTION, raw_tss_selector & 0xfffc, 0);
}
// SWITCH_TASKS without nesting to TSS
task_switch(&tss_selector, &tss_descriptor,
BX_TASK_FROM_CALL_OR_INT, dword1, dword2);
// EIP must be within code segment limit, else #TS(0)
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.d_b)
temp_eIP = EIP;
else
temp_eIP = IP;
if (temp_eIP > BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].cache.u.segment.limit_scaled)
{
BX_ERROR(("call_protected: EIP > CS.limit"));
exception(BX_GP_EXCEPTION, 0, 0);
}
return;
case BX_286_CALL_GATE:
case BX_386_CALL_GATE:
// examine code segment selector in call gate descriptor
BX_DEBUG(("call_protected: call gate"));
dest_selector = gate_descriptor.u.gate.dest_selector;
new_EIP = gate_descriptor.u.gate.dest_offset;
// selector must not be null else #GP(0)
if ((dest_selector & 0xfffc) == 0) {
BX_ERROR(("call_protected: selector in gate null"));
exception(BX_GP_EXCEPTION, 0, 0);
}
parse_selector(dest_selector, &cs_selector);
// selector must be within its descriptor table limits,
// else #GP(code segment selector)
fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
parse_descriptor(dword1, dword2, &cs_descriptor);
// AR byte of selected descriptor must indicate code segment,
// else #GP(code segment selector)
// DPL of selected descriptor must be <= CPL,
// else #GP(code segment selector)
if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
IS_DATA_SEGMENT(cs_descriptor.type) ||
cs_descriptor.dpl > CPL)
{
BX_ERROR(("call_protected: selected descriptor is not code"));
exception(BX_GP_EXCEPTION, dest_selector & 0xfffc, 0);
}
// code segment must be present else #NP(selector)
if (! IS_PRESENT(cs_descriptor)) {
BX_ERROR(("call_protected: code segment not present !"));
exception(BX_NP_EXCEPTION, dest_selector & 0xfffc, 0);
}
// CALL GATE TO MORE PRIVILEGE
// if non-conforming code segment and DPL < CPL then
if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
{
Bit16u SS_for_cpl_x;
Bit32u ESP_for_cpl_x;
bx_selector_t ss_selector;
bx_descriptor_t ss_descriptor;
Bit16u return_SS, return_CS;
Bit32u return_ESP, return_EIP;
Bit16u parameter_word[32];
Bit32u parameter_dword[32];
BX_DEBUG(("CALL GATE TO MORE PRIVILEGE LEVEL"));
// get new SS selector for new privilege level from TSS
get_SS_ESP_from_TSS(cs_descriptor.dpl, &SS_for_cpl_x, &ESP_for_cpl_x);
// check selector & descriptor for new SS:
// selector must not be null, else #TS(0)
if ((SS_for_cpl_x & 0xfffc) == 0) {
BX_ERROR(("call_protected: new SS null"));
exception(BX_TS_EXCEPTION, 0, 0);
}
// selector index must be within its descriptor table limits,
// else #TS(SS selector)
parse_selector(SS_for_cpl_x, &ss_selector);
fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
parse_descriptor(dword1, dword2, &ss_descriptor);
// selector's RPL must equal DPL of code segment,
// else #TS(SS selector)
if (ss_selector.rpl != cs_descriptor.dpl) {
BX_ERROR(("call_protected: SS selector.rpl != CS descr.dpl"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
}
// stack segment DPL must equal DPL of code segment,
// else #TS(SS selector)
if (ss_descriptor.dpl != cs_descriptor.dpl) {
BX_ERROR(("call_protected: SS descr.rpl != CS descr.dpl"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
}
// descriptor must indicate writable data segment,
// else #TS(SS selector)
if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
IS_CODE_SEGMENT(ss_descriptor.type) ||
!IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
{
BX_ERROR(("call_protected: ss descriptor is not writable data seg"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
}
// segment must be present, else #SS(SS selector)
if (! IS_PRESENT(ss_descriptor)) {
BX_ERROR(("call_protected: ss descriptor not present"));
exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc, 0);
}
// get word count from call gate, mask to 5 bits
unsigned param_count = gate_descriptor.u.gate.param_count & 0x1f;
// save return SS:eSP to be pushed on new stack
return_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
return_ESP = ESP;
else
return_ESP = SP;
// save return CS:eIP to be pushed on new stack
return_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
if (cs_descriptor.u.segment.d_b)
return_EIP = EIP;
else
return_EIP = IP;
if (gate_descriptor.type==BX_286_CALL_GATE) {
for (unsigned i=0; i<param_count; i++) {
parameter_word[i] = read_virtual_word(BX_SEG_REG_SS, return_ESP + i*2);
}
}
else {
for (unsigned i=0; i<param_count; i++) {
parameter_dword[i] = read_virtual_dword(BX_SEG_REG_SS, return_ESP + i*4);
}
}
// Prepare new stack segment
bx_segment_reg_t new_stack;
new_stack.selector = ss_selector;
new_stack.cache = ss_descriptor;
new_stack.selector.rpl = cs_descriptor.dpl;
// add cpl to the selector value
new_stack.selector.value = (0xfffc & new_stack.selector.value) |
new_stack.selector.rpl;
/* load new SS:SP value from TSS */
if (ss_descriptor.u.segment.d_b) {
Bit32u temp_ESP = ESP_for_cpl_x;
// push pointer of old stack onto new stack
if (gate_descriptor.type==BX_386_CALL_GATE) {
write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_SS);
write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_ESP);
temp_ESP -= 8;
for (unsigned i=param_count; i>0; i--) {
temp_ESP -= 4;
write_new_stack_dword_32(&new_stack, temp_ESP, cs_descriptor.dpl, parameter_dword[i-1]);
}
// push return address onto new stack
write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_CS);
write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_EIP);
temp_ESP -= 8;
}
else {
write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_SS);
write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_ESP);
temp_ESP -= 4;
for (unsigned i=param_count; i>0; i--) {
temp_ESP -= 2;
write_new_stack_word_32(&new_stack, temp_ESP, cs_descriptor.dpl, parameter_word[i-1]);
}
// push return address onto new stack
write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_CS);
write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_EIP);
temp_ESP -= 4;
}
ESP = temp_ESP;
}
else {
Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;
// push pointer of old stack onto new stack
if (gate_descriptor.type==BX_386_CALL_GATE) {
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_SS);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_ESP);
temp_SP -= 8;
for (unsigned i=param_count; i>0; i--) {
temp_SP -= 4;
write_new_stack_dword_32(&new_stack, temp_SP, cs_descriptor.dpl, parameter_dword[i-1]);
}
// push return address onto new stack
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_CS);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_EIP);
temp_SP -= 8;
}
else {
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_SS);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_ESP);
temp_SP -= 4;
for (unsigned i=param_count; i>0; i--) {
temp_SP -= 2;
write_new_stack_word_32(&new_stack, temp_SP, cs_descriptor.dpl, parameter_word[i-1]);
}
// push return address onto new stack
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_CS);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_EIP);
temp_SP -= 4;
}
SP = temp_SP;
}
// new eIP must be in code segment limit else #GP(0)
if (new_EIP > cs_descriptor.u.segment.limit_scaled) {
BX_ERROR(("call_protected: EIP not within CS limits"));
exception(BX_GP_EXCEPTION, 0, 0);
}
/* load SS descriptor */
load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);
/* load new CS:IP value from gate */
/* load CS descriptor */
/* set CPL to stack segment DPL */
/* set RPL of CS to CPL */
load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);
EIP = new_EIP;
}
else // CALL GATE TO SAME PRIVILEGE
{
BX_DEBUG(("CALL GATE TO SAME PRIVILEGE"));
if (gate_descriptor.type == BX_386_CALL_GATE) {
// call gate 32bit, push return address onto stack
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_32(EIP);
}
else {
// call gate 16bit, push return address onto stack
push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_16(IP);
}
// load CS:EIP from gate
// load code segment descriptor into CS register
// set RPL of CS to CPL
branch_far32(&cs_selector, &cs_descriptor, new_EIP, CPL);
}
return;
default: // can't get here
BX_PANIC(("call_protected: gate type %u unsupported", (unsigned) cs_descriptor.type));
exception(BX_GP_EXCEPTION, cs_raw & 0xfffc, 0);
}
}
}
void basic_segmentaion_setup()
{
LGDT(&thegdt);
load_ds(0x10);
load_cs(0x8);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::call_gate(bx_descriptor_t *gate_descriptor)
{
bx_selector_t cs_selector;
Bit32u dword1, dword2;
bx_descriptor_t cs_descriptor;
// examine code segment selector in call gate descriptor
BX_DEBUG(("call_protected: call gate"));
Bit16u dest_selector = gate_descriptor->u.gate.dest_selector;
Bit32u new_EIP = gate_descriptor->u.gate.dest_offset;
// selector must not be null else #GP(0)
if ((dest_selector & 0xfffc) == 0) {
BX_ERROR(("call_protected: selector in gate null"));
exception(BX_GP_EXCEPTION, 0);
}
parse_selector(dest_selector, &cs_selector);
// selector must be within its descriptor table limits,
// else #GP(code segment selector)
fetch_raw_descriptor(&cs_selector, &dword1, &dword2, BX_GP_EXCEPTION);
parse_descriptor(dword1, dword2, &cs_descriptor);
// AR byte of selected descriptor must indicate code segment,
// else #GP(code segment selector)
// DPL of selected descriptor must be <= CPL,
// else #GP(code segment selector)
if (cs_descriptor.valid==0 || cs_descriptor.segment==0 ||
IS_DATA_SEGMENT(cs_descriptor.type) || cs_descriptor.dpl > CPL)
{
BX_ERROR(("call_protected: selected descriptor is not code"));
exception(BX_GP_EXCEPTION, dest_selector & 0xfffc);
}
// code segment must be present else #NP(selector)
if (! IS_PRESENT(cs_descriptor)) {
BX_ERROR(("call_protected: code segment not present !"));
exception(BX_NP_EXCEPTION, dest_selector & 0xfffc);
}
// CALL GATE TO MORE PRIVILEGE
// if non-conforming code segment and DPL < CPL then
if (IS_CODE_SEGMENT_NON_CONFORMING(cs_descriptor.type) && (cs_descriptor.dpl < CPL))
{
Bit16u SS_for_cpl_x;
Bit32u ESP_for_cpl_x;
bx_selector_t ss_selector;
bx_descriptor_t ss_descriptor;
Bit16u return_SS, return_CS;
Bit32u return_ESP, return_EIP;
BX_DEBUG(("CALL GATE TO MORE PRIVILEGE LEVEL"));
// get new SS selector for new privilege level from TSS
get_SS_ESP_from_TSS(cs_descriptor.dpl, &SS_for_cpl_x, &ESP_for_cpl_x);
// check selector & descriptor for new SS:
// selector must not be null, else #TS(0)
if ((SS_for_cpl_x & 0xfffc) == 0) {
BX_ERROR(("call_protected: new SS null"));
exception(BX_TS_EXCEPTION, 0);
}
// selector index must be within its descriptor table limits,
// else #TS(SS selector)
parse_selector(SS_for_cpl_x, &ss_selector);
fetch_raw_descriptor(&ss_selector, &dword1, &dword2, BX_TS_EXCEPTION);
parse_descriptor(dword1, dword2, &ss_descriptor);
// selector's RPL must equal DPL of code segment,
// else #TS(SS selector)
if (ss_selector.rpl != cs_descriptor.dpl) {
BX_ERROR(("call_protected: SS selector.rpl != CS descr.dpl"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// stack segment DPL must equal DPL of code segment,
// else #TS(SS selector)
if (ss_descriptor.dpl != cs_descriptor.dpl) {
BX_ERROR(("call_protected: SS descr.rpl != CS descr.dpl"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// descriptor must indicate writable data segment,
// else #TS(SS selector)
if (ss_descriptor.valid==0 || ss_descriptor.segment==0 ||
IS_CODE_SEGMENT(ss_descriptor.type) || !IS_DATA_SEGMENT_WRITEABLE(ss_descriptor.type))
{
BX_ERROR(("call_protected: ss descriptor is not writable data seg"));
exception(BX_TS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// segment must be present, else #SS(SS selector)
if (! IS_PRESENT(ss_descriptor)) {
BX_ERROR(("call_protected: ss descriptor not present"));
exception(BX_SS_EXCEPTION, SS_for_cpl_x & 0xfffc);
}
// get word count from call gate, mask to 5 bits
unsigned param_count = gate_descriptor->u.gate.param_count & 0x1f;
// save return SS:eSP to be pushed on new stack
return_SS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].selector.value;
if (BX_CPU_THIS_PTR sregs[BX_SEG_REG_SS].cache.u.segment.d_b)
return_ESP = ESP;
else
return_ESP = SP;
// save return CS:eIP to be pushed on new stack
return_CS = BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value;
if (cs_descriptor.u.segment.d_b)
return_EIP = EIP;
else
return_EIP = IP;
// Prepare new stack segment
bx_segment_reg_t new_stack;
new_stack.selector = ss_selector;
new_stack.cache = ss_descriptor;
new_stack.selector.rpl = cs_descriptor.dpl;
// add cpl to the selector value
new_stack.selector.value = (0xfffc & new_stack.selector.value) |
new_stack.selector.rpl;
/* load new SS:SP value from TSS */
if (ss_descriptor.u.segment.d_b) {
Bit32u temp_ESP = ESP_for_cpl_x;
// push pointer of old stack onto new stack
if (gate_descriptor->type==BX_386_CALL_GATE) {
write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_SS);
write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_ESP);
temp_ESP -= 8;
for (unsigned n=param_count; n>0; n--) {
temp_ESP -= 4;
Bit32u param = read_virtual_dword_32(BX_SEG_REG_SS, return_ESP + (n-1)*4);
write_new_stack_dword_32(&new_stack, temp_ESP, cs_descriptor.dpl, param);
}
// push return address onto new stack
write_new_stack_dword_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, return_CS);
write_new_stack_dword_32(&new_stack, temp_ESP-8, cs_descriptor.dpl, return_EIP);
temp_ESP -= 8;
}
else {
write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_SS);
write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_ESP);
temp_ESP -= 4;
for (unsigned n=param_count; n>0; n--) {
temp_ESP -= 2;
Bit16u param = read_virtual_word_32(BX_SEG_REG_SS, return_ESP + (n-1)*2);
write_new_stack_word_32(&new_stack, temp_ESP, cs_descriptor.dpl, param);
}
// push return address onto new stack
write_new_stack_word_32(&new_stack, temp_ESP-2, cs_descriptor.dpl, return_CS);
write_new_stack_word_32(&new_stack, temp_ESP-4, cs_descriptor.dpl, (Bit16u) return_EIP);
temp_ESP -= 4;
}
ESP = temp_ESP;
}
else {
Bit16u temp_SP = (Bit16u) ESP_for_cpl_x;
// push pointer of old stack onto new stack
if (gate_descriptor->type==BX_386_CALL_GATE) {
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_SS);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_ESP);
temp_SP -= 8;
for (unsigned n=param_count; n>0; n--) {
temp_SP -= 4;
Bit32u param = read_virtual_dword_32(BX_SEG_REG_SS, return_ESP + (n-1)*4);
write_new_stack_dword_32(&new_stack, temp_SP, cs_descriptor.dpl, param);
}
// push return address onto new stack
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, return_CS);
write_new_stack_dword_32(&new_stack, (Bit16u)(temp_SP-8), cs_descriptor.dpl, return_EIP);
temp_SP -= 8;
}
else {
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_SS);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_ESP);
temp_SP -= 4;
for (unsigned n=param_count; n>0; n--) {
temp_SP -= 2;
Bit16u param = read_virtual_word_32(BX_SEG_REG_SS, return_ESP + (n-1)*2);
write_new_stack_word_32(&new_stack, temp_SP, cs_descriptor.dpl, param);
}
// push return address onto new stack
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-2), cs_descriptor.dpl, return_CS);
write_new_stack_word_32(&new_stack, (Bit16u)(temp_SP-4), cs_descriptor.dpl, (Bit16u) return_EIP);
temp_SP -= 4;
}
SP = temp_SP;
}
// new eIP must be in code segment limit else #GP(0)
if (new_EIP > cs_descriptor.u.segment.limit_scaled) {
BX_ERROR(("call_protected: EIP not within CS limits"));
exception(BX_GP_EXCEPTION, 0);
}
/* load SS descriptor */
load_ss(&ss_selector, &ss_descriptor, cs_descriptor.dpl);
/* load new CS:IP value from gate */
/* load CS descriptor */
/* set CPL to stack segment DPL */
/* set RPL of CS to CPL */
load_cs(&cs_selector, &cs_descriptor, cs_descriptor.dpl);
EIP = new_EIP;
}
else // CALL GATE TO SAME PRIVILEGE
{
BX_DEBUG(("CALL GATE TO SAME PRIVILEGE"));
if (gate_descriptor->type == BX_386_CALL_GATE) {
// call gate 32bit, push return address onto stack
push_32(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_32(EIP);
}
else {
// call gate 16bit, push return address onto stack
push_16(BX_CPU_THIS_PTR sregs[BX_SEG_REG_CS].selector.value);
push_16(IP);
}
// load CS:EIP from gate
// load code segment descriptor into CS register
// set RPL of CS to CPL
branch_far32(&cs_selector, &cs_descriptor, new_EIP, CPL);
}
}
static void CPUCALL
interrupt_intr_or_trap(const descriptor_t *gsdp, int intrtype, int errorp, int error_code)
{
selector_t cs_sel, ss_sel;
UINT stacksize;
UINT32 old_flags;
UINT32 new_flags;
UINT32 mask;
UINT32 sp;
UINT32 new_ip, new_sp;
UINT32 old_ip, old_sp;
UINT16 old_cs, old_ss, new_ss;
BOOL is32bit;
int exc_errcode;
int rv;
new_ip = gsdp->u.gate.offset;
old_ss = CPU_SS;
old_cs = CPU_CS;
old_ip = CPU_EIP;
old_sp = CPU_ESP;
old_flags = REAL_EFLAGREG;
new_flags = REAL_EFLAGREG & ~(T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG);
mask = T_FLAG|RF_FLAG|NT_FLAG|VM_FLAG;
switch (gsdp->type) {
case CPU_SYSDESC_TYPE_INTR_16:
case CPU_SYSDESC_TYPE_INTR_32:
VERBOSE(("interrupt: INTERRUPT-GATE"));
new_flags &= ~I_FLAG;
mask |= I_FLAG;
break;
case CPU_SYSDESC_TYPE_TRAP_16:
case CPU_SYSDESC_TYPE_TRAP_32:
VERBOSE(("interrupt: TRAP-GATE"));
break;
default:
ia32_panic("interrupt: gate descriptor type is invalid (type = %d)", gsdp->type);
break;
}
exc_errcode = gsdp->u.gate.selector & ~3;
if (intrtype == INTR_TYPE_EXTINTR)
exc_errcode++;
rv = parse_selector(&cs_sel, gsdp->u.gate.selector);
if (rv < 0) {
VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", gsdp->u.gate.selector, rv));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
/* check segment type */
if (SEG_IS_SYSTEM(&cs_sel.desc)) {
VERBOSE(("interrupt: code segment is system segment"));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
if (SEG_IS_DATA(&cs_sel.desc)) {
VERBOSE(("interrupt: code segment is data segment"));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
/* check privilege level */
if (cs_sel.desc.dpl > CPU_STAT_CPL) {
VERBOSE(("interrupt: DPL(%d) > CPL(%d)", cs_sel.desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
/* not present */
if (selector_is_not_present(&cs_sel)) {
VERBOSE(("interrupt: selector is not present"));
EXCEPTION(NP_EXCEPTION, exc_errcode);
}
is32bit = gsdp->type & CPU_SYSDESC_TYPE_32BIT;
if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl < CPU_STAT_CPL)) {
stacksize = errorp ? 12 : 10;
if (!CPU_STAT_VM86) {
VERBOSE(("interrupt: INTER-PRIVILEGE-LEVEL-INTERRUPT"));
} else {
/* VM86 */
VERBOSE(("interrupt: INTERRUPT-FROM-VIRTUAL-8086-MODE"));
if (cs_sel.desc.dpl != 0) {
/* 16.3.1.1 */
VERBOSE(("interrupt: DPL[CS](%d) != 0", cs_sel.desc.dpl));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
stacksize += 8;
}
if (is32bit) {
stacksize *= 2;
}
/* get stack pointer from TSS */
get_stack_pointer_from_tss(cs_sel.desc.dpl, &new_ss, &new_sp);
/* parse stack segment descriptor */
rv = parse_selector(&ss_sel, new_ss);
/* update exception error code */
exc_errcode = ss_sel.idx;
if (intrtype == INTR_TYPE_EXTINTR)
exc_errcode++;
if (rv < 0) {
VERBOSE(("interrupt: parse_selector (selector = %04x, rv = %d)", new_ss, rv));
EXCEPTION(TS_EXCEPTION, exc_errcode);
}
/* check privilege level */
if (ss_sel.rpl != cs_sel.desc.dpl) {
VERBOSE(("interrupt: selector RPL[SS](%d) != DPL[CS](%d)", ss_sel.rpl, cs_sel.desc.dpl));
EXCEPTION(TS_EXCEPTION, exc_errcode);
}
if (ss_sel.desc.dpl != cs_sel.desc.dpl) {
VERBOSE(("interrupt: descriptor DPL[SS](%d) != DPL[CS](%d)", ss_sel.desc.dpl, cs_sel.desc.dpl));
EXCEPTION(TS_EXCEPTION, exc_errcode);
}
/* stack segment must be writable data segment. */
if (SEG_IS_SYSTEM(&ss_sel.desc)) {
VERBOSE(("interrupt: stack segment is system segment"));
EXCEPTION(TS_EXCEPTION, exc_errcode);
}
if (SEG_IS_CODE(&ss_sel.desc)) {
VERBOSE(("interrupt: stack segment is code segment"));
EXCEPTION(TS_EXCEPTION, exc_errcode);
}
if (!SEG_IS_WRITABLE_DATA(&ss_sel.desc)) {
VERBOSE(("interrupt: stack segment is read-only data segment"));
EXCEPTION(TS_EXCEPTION, exc_errcode);
}
/* not present */
if (selector_is_not_present(&ss_sel)) {
VERBOSE(("interrupt: selector is not present"));
EXCEPTION(SS_EXCEPTION, exc_errcode);
}
/* check stack room size */
cpu_stack_push_check(ss_sel.idx, &ss_sel.desc, new_sp, stacksize, ss_sel.desc.d);
/* out of range */
if (new_ip > cs_sel.desc.u.seg.limit) {
VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
load_ss(ss_sel.selector, &ss_sel.desc, cs_sel.desc.dpl);
CPU_ESP = new_sp;
load_cs(cs_sel.selector, &cs_sel.desc, cs_sel.desc.dpl);
CPU_EIP = new_ip;
if (is32bit) {
if (CPU_STAT_VM86) {
PUSH0_32(CPU_GS);
PUSH0_32(CPU_FS);
PUSH0_32(CPU_DS);
PUSH0_32(CPU_ES);
LOAD_SEGREG(CPU_GS_INDEX, 0);
CPU_STAT_SREG(CPU_GS_INDEX).valid = 0;
LOAD_SEGREG(CPU_FS_INDEX, 0);
CPU_STAT_SREG(CPU_FS_INDEX).valid = 0;
LOAD_SEGREG(CPU_DS_INDEX, 0);
CPU_STAT_SREG(CPU_DS_INDEX).valid = 0;
LOAD_SEGREG(CPU_ES_INDEX, 0);
CPU_STAT_SREG(CPU_ES_INDEX).valid = 0;
}
PUSH0_32(old_ss);
PUSH0_32(old_sp);
PUSH0_32(old_flags);
PUSH0_32(old_cs);
PUSH0_32(old_ip);
if (errorp) {
PUSH0_32(error_code);
}
} else {
if (CPU_STAT_VM86) {
ia32_panic("interrupt: 16bit gate && VM86");
}
PUSH0_16(old_ss);
PUSH0_16(old_sp);
PUSH0_16(old_flags);
PUSH0_16(old_cs);
PUSH0_16(old_ip);
if (errorp) {
PUSH0_16(error_code);
}
}
} else {
if (CPU_STAT_VM86) {
VERBOSE(("interrupt: VM86"));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
if (!SEG_IS_CONFORMING_CODE(&cs_sel.desc) && (cs_sel.desc.dpl != CPU_STAT_CPL)) {
VERBOSE(("interrupt: %sCONFORMING-CODE-SEGMENT(%d) && DPL[CS](%d) != CPL", SEG_IS_CONFORMING_CODE(&cs_sel.desc) ? "" : "NON-", cs_sel.desc.dpl, CPU_STAT_CPL));
EXCEPTION(GP_EXCEPTION, exc_errcode);
}
VERBOSE(("interrupt: INTRA-PRIVILEGE-LEVEL-INTERRUPT"));
stacksize = errorp ? 8 : 6;
if (is32bit) {
stacksize *= 2;
}
/* check stack room size */
if (CPU_STAT_SS32) {
sp = CPU_ESP;
} else {
sp = CPU_SP;
}
/*
* 17.1
* コールゲート、割り込みゲート、またはトラップゲートを通じて
* プログラムの制御を他のコード・セグメントに移行するときは、
* 移行中に使用されるオペランド・サイズは使用されるゲートの
* タイプ（16 ビットまたは32 ビット）によって決まる（移行命
* 令のD フラグ、プリフィックスのいずれにもよらない）。
*/
SS_PUSH_CHECK1(sp, stacksize, is32bit);
/* out of range */
if (new_ip > cs_sel.desc.u.seg.limit) {
VERBOSE(("interrupt: new_ip is out of range. new_ip = %08x, limit = %08x", new_ip, cs_sel.desc.u.seg.limit));
EXCEPTION(GP_EXCEPTION, 0);
}
load_cs(cs_sel.selector, &cs_sel.desc, CPU_STAT_CPL);
CPU_EIP = new_ip;
if (is32bit) {
PUSH0_32(old_flags);
PUSH0_32(old_cs);
PUSH0_32(old_ip);
if (errorp) {
PUSH0_32(error_code);
}
} else {
PUSH0_16(old_flags);
PUSH0_16(old_cs);
PUSH0_16(old_ip);
if (errorp) {
PUSH0_16(error_code);
}
}
}
set_eflags(new_flags, mask);
VERBOSE(("interrupt: new EIP = %04x:%08x, ESP = %04x:%08x", CPU_CS, CPU_EIP, CPU_SS, CPU_ESP));
}
