unsigned int disp_allocate_mva(unsigned int pa, unsigned int size, M4U_PORT_ID port)
{
int ret = 0;
unsigned int mva = 0;
m4u_client_t *client = NULL;
struct sg_table *sg_table = kzalloc(sizeof(struct sg_table), GFP_ATOMIC);
sg_alloc_table(sg_table, 1, GFP_KERNEL);
sg_dma_address(sg_table->sgl) = pa;
sg_dma_len(sg_table->sgl) = size;
client = m4u_create_client();
if (IS_ERR_OR_NULL(client))
DISPMSG("create client fail!\n");
mva = pa;
ret = m4u_alloc_mva(client, port, 0, sg_table, size, M4U_PROT_READ | M4U_PROT_WRITE,
M4U_FLAGS_FIX_MVA, &mva);
/* m4u_alloc_mva(M4U_PORT_DISP_OVL0, pa_start, (pa_end - pa_start + 1), 0, 0, mva); */
if (ret)
DISPMSG("m4u_alloc_mva returns fail: %d\n", ret);
DISPMSG("[DISPHAL] FB MVA is 0x%08X PA is 0x%08X\n", mva, pa);
return mva;
}
int disphal_map_overlay_out_buffer(unsigned int va, unsigned int size, unsigned int* dma_pa)
{
int ret;
ret = m4u_alloc_mva(DISP_WDMA, va, size, 0, 0, dma_pa);
if(ret!=0)
{
return ret;
}
m4u_dma_cache_maint(DISP_WDMA, (const void *)va, size, DMA_BIDIRECTIONAL);
return 0;
}
int disphal_allocate_fb(struct resource* res, unsigned int* pa, unsigned int* va, unsigned int* dma_pa)
{
*pa = res->start;
*va = (unsigned int) ioremap_nocache(res->start, res->end - res->start + 1);
if (disp_use_mmu)
{
m4u_alloc_mva(M4U_CLNTMOD_LCDC_UI, *pa, (res->end - res->start + 1), 0, 0, dma_pa);
ASSERT(dma_pa);
printk("[DISPHAL] FB MVA is 0x%08X PA is 0x%08X\n", *dma_pa, *pa);
}
else
{
*dma_pa = *pa;
}
return 0;
}
int hdmi_allocate_hdmi_buffer(void)
{
M4U_PORT_STRUCT m4uport;
int hdmiPixelSize = p->hdmi_width * p->hdmi_height;
int hdmiDataSize = hdmiPixelSize * hdmi_bpp;
int hdmiBufferSize = hdmiDataSize * 4;
HDMI_FUNC();
hdmi_va = (unsigned int) vmalloc(hdmiBufferSize);
if (((void *) hdmi_va) == NULL)
{
HDMI_LOG("vmalloc %dbytes fail!!!\n", hdmiBufferSize);
return -1;
}
memset((void *) hdmi_va, 0x80, hdmiBufferSize);
//RDMA1
if (m4u_alloc_mva(M4U_CLNTMOD_RDMA, hdmi_va, hdmiBufferSize, 0, 0, &hdmi_mva_r))
{
HDMI_LOG("m4u_alloc_mva for hdmi_mva_r fail\n");
return -1;
}
memset((void *) &m4uport, 0, sizeof(M4U_PORT_STRUCT));
m4uport.ePortID = M4U_PORT_RDMA1;
m4uport.Virtuality = 1;
m4uport.domain = 0;
m4uport.Security = 0;
m4uport.Distance = 1;
m4uport.Direction = 0;
m4u_config_port(&m4uport);
HDMI_LOG("hdmi_va=0x%08x, hdmi_mva_r=0x%08x, hdmi_mva_w=0x%08x\n", hdmi_va, hdmi_mva_r, hdmi_mva_w);
return 0;
}
static int ion_mm_heap_phys(struct ion_heap *heap,
struct ion_buffer *buffer,
ion_phys_addr_t *addr, size_t *len)
{
ion_mm_buffer_info* pBufferInfo = (ion_mm_buffer_info*) buffer->priv_virt;
ION_FUNC_ENTER;
if (!pBufferInfo)
{
printk("[ion_mm_heap_phys]: Error. Invalid buffer.\n");
ION_FUNC_LEAVE;
return -EFAULT; // Invalid buffer
}
if (pBufferInfo->eModuleID == -1)
{
printk("[ion_mm_heap_phys]: Error. Buffer not configured.\n");
ION_FUNC_LEAVE;
return -EFAULT; // Buffer not configured.
}
// Allocate MVA
mutex_lock(&ion_mm_buffer_info_mutex);
if (pBufferInfo->MVA == 0)
{
int ret = m4u_alloc_mva(pBufferInfo->eModuleID, (unsigned int)pBufferInfo->pVA, buffer->size, pBufferInfo->security, pBufferInfo->coherent, &pBufferInfo->MVA);
if (ret < 0)
{
mutex_unlock(&ion_mm_buffer_info_mutex);
pBufferInfo->MVA = 0;
printk("[ion_mm_heap_phys]: Error. Allocate MVA failed.\n");
ION_FUNC_LEAVE;
return -EFAULT;
}
}
mutex_unlock(&ion_mm_buffer_info_mutex);
*addr = (ion_phys_addr_t) pBufferInfo->MVA; // MVA address
*len = buffer->size;
ION_FUNC_LEAVE;
return 0;
}
int g2d_allocate_mva(unsigned int va, unsigned int *mva, unsigned int size)
{
int err = 0;
G2D_DBG("try to allocate mva with 0x%x (%d)\n", va, size);
err = m4u_alloc_mva(M4U_CLNTMOD_G2D, va, size, mva);
if (err != 0)
{
G2D_ERR("failed to allocate mva\n");
return -1;
}
err = m4u_insert_tlb_range(M4U_CLNTMOD_G2D, *mva, *mva + size - 1, RT_RANGE_HIGH_PRIORITY, 1);
if (err != 0)
{
G2D_ERR("failed to insert m4u tlb\n");
m4u_dealloc_mva(M4U_CLNTMOD_G2D, va, size, *mva);
return -1;
}
return 0;
}
int m4u_test_main(void)
{
int ret;
M4U_PORT_STRUCT M4uPort;
//allocate memory
gSrcVaBuf = (unsigned int) vmalloc(64 * 64 * 4);
if (!gSrcVaBuf) {
M4UMSG("vmalloc failed.\n");
return -1;
}
gDstVaBuf = (unsigned int) vmalloc(64 * 64 * 4);
if (!gDstVaBuf) {
M4UMSG("vmalloc failed.\n");
return -1;
}
//config port
M4uPort.ePortID = DISP_OVL_0;
M4uPort.Virtuality = 1;
M4uPort.Security = 0;
M4uPort.Distance = 1;
M4uPort.Direction = 0;
m4u_config_port(&M4uPort);
M4uPort.ePortID = DISP_WDMA;
M4uPort.Virtuality = 1;
M4uPort.Security = 0;
M4uPort.Distance = 1;
M4uPort.Direction = 0;
m4u_config_port(&M4uPort);
//allocate mva
ret = m4u_alloc_mva(DISP_OVL_0, gSrcVaBuf, 64 * 64 * 4, 0, 0, &(gSrcMvaBuf));
M4U_ASSERT(0==ret);
m4u_insert_seq_range(DISP_OVL_0, gSrcMvaBuf, gSrcMvaBuf + 64 * 64 * 4 - 1, SEQ_RANGE_LOW_PRIORITY, 1);
M4UMSG("src module=DISP_OVL_0, va=0x%x, mva=0x%x.\n",
gSrcVaBuf, gSrcMvaBuf);
ret = m4u_alloc_mva(DISP_WDMA, gDstVaBuf, 64 * 64 * 4, 0, 0, &(gDstMvaBuf));
M4U_ASSERT(0==ret);
m4u_insert_seq_range(DISP_OVL_0, gDstMvaBuf, gDstMvaBuf + 64 * 64 * 4 - 1, SEQ_RANGE_LOW_PRIORITY, 1);
M4UMSG("dst module=DISP_WDMA, va=0x%x, mva=0x%x.\n",
gDstVaBuf, gDstMvaBuf);
// ddp test
memset((void *)gSrcVaBuf, 0, 64 * 64 * 4);
memcpy((void *)gSrcVaBuf, SRC_BUF_ADDR, 64 * 64 * 4);
memset((void *)gDstVaBuf, 0, 64 * 64 * 4);
m4u_dma_cache_maint(DISP_OVL_0, (void *)gSrcVaBuf, 64 * 64 * 4, M4U_CACHE_FLUSH_BEFORE_HW_READ_MEM);
m4u_dma_cache_maint(DISP_WDMA, (void *)gDstVaBuf, 64 * 64 * 4, M4U_CACHE_FLUSH_BEFORE_HW_READ_MEM);
if ((slt_result = m4u_ddp_test(gSrcMvaBuf, gDstVaBuf, gDstMvaBuf)) == 0)
M4UMSG("case 1 result: success \n");
else {
M4UMSG("case 1 result: fail\n");
M4U_ASSERT(0);
}
//free va & mva
/*m4u_invalid_seq_range(DISP_OVL_0, gSrcMvaBuf, gSrcMvaBuf + 64 * 64 * 4 - 1);
m4u_invalid_seq_range(DISP_WDMA, gDstMvaBuf, gDstMvaBuf + 64 * 64 * 4 - 1);
m4u_dealloc_mva(DISP_OVL_0, gSrcVaBuf, 64 * 64 * 4, gSrcMvaBuf);
m4u_dealloc_mva(DISP_WDMA, gDstVaBuf, 64 * 64 * 4, gDstMvaBuf);*/
vfree((void *)gSrcVaBuf);
vfree((void *)gDstVaBuf);
/*
M4uPort.ePortID = DISP_OVL_0;
M4uPort.Virtuality = 0;
M4uPort.Security = 0;
M4uPort.Distance = 1;
M4uPort.Direction = 0;
m4u_config_port(&M4uPort);
M4uPort.ePortID = DISP_WDMA;
M4uPort.Virtuality = 0;
M4uPort.Security = 0;
M4uPort.Distance = 1;
M4uPort.Direction = 0;
m4u_config_port(&M4uPort);*/
m4u_debug_init();
return 0;
}
/* Will only be used in ioctl(MTK_HDMI_AUDIO_VIDEO_ENABLE) */
static HDMI_STATUS hdmi_drv_init(void)
{
int lcm_width, lcm_height;
int tmpBufferSize;
M4U_PORT_STRUCT portStruct;
HDMI_FUNC();
RETIF(p->output_mode == HDMI_OUTPUT_MODE_DPI_BYPASS, 0);
p->hdmi_width = 1280;
p->hdmi_height = 720;
lcm_width = DISP_GetScreenWidth();
lcm_height = DISP_GetScreenHeight();
//printk("[hdmi]%s, hdmi_width=%d, hdmi_height=%d\n", __func__, p->hdmi_width, p->hdmi_height);
HDMI_LOG("lcm_width=%d, lcm_height=%d\n", lcm_width, lcm_height);
tmpBufferSize = lcm_width * lcm_height *4 * 4;
temp_va = (unsigned int) vmalloc(tmpBufferSize);
if (((void*) temp_va) == NULL)
{
HDMI_LOG("vmalloc %dbytes fail\n", tmpBufferSize);
return -1;
}
// WDMA1
if (m4u_alloc_mva(M4U_CLNTMOD_WDMA,
temp_va,
tmpBufferSize,
0,
0,
&temp_mva_w))
{
HDMI_LOG("m4u_alloc_mva for temp_mva_w fail\n");
return -1;
}
m4u_dma_cache_maint(M4U_CLNTMOD_WDMA,
temp_va,
tmpBufferSize,
DMA_BIDIRECTIONAL);
portStruct.ePortID = M4U_PORT_WDMA1; //hardware port ID, defined in M4U_PORT_ID_ENUM
portStruct.Virtuality = 1;
portStruct.Security = 0;
portStruct.domain = 0; //domain : 0 1 2 3
portStruct.Distance = 1;
portStruct.Direction = 0;
m4u_config_port(&portStruct);
HDMI_LOG("temp_va=0x%08x, temp_mva_w=0x%08x\n", temp_va, temp_mva_w);
p->lcm_width = lcm_width;
p->lcm_height = lcm_height;
p->output_video_resolution = hdmi_params->init_config.vformat;
p->output_audio_format = hdmi_params->init_config.aformat;
//#ifdef NEW_HDMI_ARCH
// hdmi_display_path_overlay_config(true);
//#endif
DISP_Config_Overlay_to_Memory(temp_mva_w, 1);
//hdmi_dpi_config_clock(); // configure dpi clock
//hdmi_dpi_power_switch(false); // but dpi power is still off
//hdmi_drv->suspend();
#if 0
LCD_WaitForNotBusy();
LCD_SetOutputMode(3); // LCD write to memory and LCM
#endif
return HDMI_STATUS_OK;
}
DPI_STATUS DPI_Capture_Framebuffer(unsigned int pvbuf, unsigned int bpp)
{
unsigned int mva;
unsigned int ret = 0;
M4U_PORT_STRUCT portStruct;
struct disp_path_config_mem_out_struct mem_out = {0};
printk("enter DPI_Capture_FB!\n");
if(bpp == 32)
mem_out.outFormat = eARGB8888;
else if(bpp == 16)
mem_out.outFormat = eRGB565;
else if(bpp == 24)
mem_out.outFormat = eRGB888;
else
printk("DPI_Capture_FB, fb color format not support\n");
printk("before alloc MVA: va = 0x%x, size = %d\n", pvbuf, lcm_params->height*lcm_params->width*bpp/8);
ret = m4u_alloc_mva(DISP_WDMA,
pvbuf,
lcm_params->height*lcm_params->width*bpp/8,
0,
0,
&mva);
if(ret!=0)
{
printk("m4u_alloc_mva() fail! \n");
return DPI_STATUS_OK;
}
printk("addr=0x%x, format=%d \n", mva, mem_out.outFormat);
m4u_dma_cache_maint(DISP_WDMA,
(void *)pvbuf,
lcm_params->height*lcm_params->width*bpp/8,
DMA_BIDIRECTIONAL);
portStruct.ePortID = DISP_WDMA; //hardware port ID, defined in M4U_PORT_ID_ENUM
portStruct.Virtuality = 1;
portStruct.Security = 0;
portStruct.domain = 0; //domain : 0 1 2 3
portStruct.Distance = 1;
portStruct.Direction = 0;
m4u_config_port(&portStruct);
mem_out.enable = 1;
mem_out.dstAddr = mva;
mem_out.srcROI.x = 0;
mem_out.srcROI.y = 0;
mem_out.srcROI.height= lcm_params->height;
mem_out.srcROI.width= lcm_params->width;
disp_path_get_mutex();
disp_path_config_mem_out(&mem_out);
printk("Wait DPI idle \n");
disp_path_release_mutex();
msleep(20);
disp_path_get_mutex();
mem_out.enable = 0;
disp_path_config_mem_out(&mem_out);
disp_path_release_mutex();
portStruct.ePortID = DISP_WDMA; //hardware port ID, defined in M4U_PORT_ID_ENUM
portStruct.Virtuality = 0;
portStruct.Security = 0;
portStruct.domain = 0; //domain : 0 1 2 3
portStruct.Distance = 1;
portStruct.Direction = 0;
m4u_config_port(&portStruct);
m4u_dealloc_mva(DISP_WDMA,
pvbuf,
lcm_params->height*lcm_params->width*bpp/8,
mva);
return DPI_STATUS_OK;
}
