Example #1
0
int __cpuinit msm8974_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
	pr_debug("Starting secondary CPU %d\n", cpu);

	if (per_cpu(cold_boot_done, cpu) == false) {
		if (machine_is_msm8974_sim() || machine_is_mpq8092_sim())
			release_secondary_sim(0xf9088000, cpu);
		else if (!machine_is_msm8974_rumi())
			msm8974_release_secondary(0xf9088000, cpu);

		per_cpu(cold_boot_done, cpu) = true;
	}
	return release_from_pen(cpu);
}
Example #2
0
static int krait_release_secondary_sim(unsigned long base, int cpu)
{
	void *base_ptr = ioremap_nocache(base + (cpu * 0x10000), SZ_4K);
	if (!base_ptr)
		return -ENODEV;

	if (machine_is_msm8974_sim() || machine_is_mpq8092_sim()) {
		writel_relaxed(0x800, base_ptr+0x04);
		writel_relaxed(0x3FFF, base_ptr+0x14);
	}

	mb();
	iounmap(base_ptr);
	return 0;
}
Example #3
0
static int __cpuinit release_secondary(unsigned int cpu)
{
	BUG_ON(cpu >= get_core_count());

	if (cpu_is_msm8x60())
		return scorpion_release_secondary();

	if (machine_is_msm8974_sim() || machine_is_mpq8092_sim())
		return krait_release_secondary_sim(0xf9088000, cpu);

	if (soc_class_is_msm8960() || soc_class_is_msm8930() ||
	    soc_class_is_apq8064())
		return krait_release_secondary(0x02088000, cpu);

	if (cpu_is_msm8974())
		return krait_release_secondary_p3(0xf9088000, cpu);

	WARN(1, "unknown CPU case in release_secondary\n");
	return -EINVAL;
}