void mdp4_mddi_overlay(struct msm_fb_data_type *mfd) { mutex_lock(&mfd->dma->ov_mutex); if (mfd && mfd->panel_power_on) { #ifndef CONFIG_SHLCDC_BOARD mdp4_mddi_dma_busy_wait(mfd); #endif /*CONFIG_SHLCDC_BOARD*/ mdp4_overlay_update_lcd(mfd); if (mdp_hw_revision < MDP4_REVISION_V2_1) { /* dmas dmap switch */ #ifdef CONFIG_SHLCDC_BOARD if ((mdp4_overlay_pipe_staged(mddi_pipe->mixer_num) <= 1) && ( mddi_pipe->src_h == mddi_pipe->dst_h ) && ( mddi_pipe->src_w == mddi_pipe->dst_w )) { #else if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num) == 0) { #endif /* CONFIG_SHLCDC_BOARD */ mdp4_dma_s_update_lcd(mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe); } else mdp4_mddi_kickoff_ui(mfd, mddi_pipe); } else /* no dams dmap switch */ mdp4_mddi_kickoff_ui(mfd, mddi_pipe); mdp4_stat.kickoff_mddi++; /* signal if pan function is waiting for the update completion */ if (mfd->pan_waiting) { mfd->pan_waiting = FALSE; complete(&mfd->pan_comp); } } mdp4_overlay_resource_release(); mutex_unlock(&mfd->dma->ov_mutex); } int mdp4_mddi_overlay_cursor(struct fb_info *info, struct fb_cursor *cursor) { struct msm_fb_data_type *mfd = info->par; mutex_lock(&mfd->dma->ov_mutex); if (mfd && mfd->panel_power_on) { #ifndef CONFIG_SHLCDC_BOARD mdp4_mddi_dma_busy_wait(mfd); #endif /* CONFIG_SHLCDC_BOARD */ mdp_hw_cursor_update(info, cursor); } mutex_unlock(&mfd->dma->ov_mutex); return 0; }
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd) { down(&mfd->dma->ov_sem); if (mfd && mfd->panel_power_on) { mdp4_mddi_dma_busy_wait(mfd, mddi_pipe); mdp4_overlay_update_lcd(mfd); if (mdp_hw_revision < MDP4_REVISION_V2_1) { /* dmas dmap switch */ if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num) == 0) { mdp4_dma_s_update_lcd(mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe); } else mdp4_mddi_kickoff_ui(mfd, mddi_pipe); } else /* no dams dmap switch */ mdp4_mddi_kickoff_ui(mfd, mddi_pipe); mdp4_stat.kickoff_mddi++; /* signal if pan function is waiting for the update completion */ if (mfd->pan_waiting) { mfd->pan_waiting = FALSE; complete(&mfd->pan_comp); } } up(&mfd->dma->ov_sem); }
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd) { mutex_lock(&mfd->dma->ov_mutex); if (mfd && mfd->panel_power_on) { mdp4_mddi_dma_busy_wait(mfd); if (mddi_pipe && mddi_pipe->ov_blt_addr) mdp4_mddi_blt_dmap_busy_wait(mfd); mdp4_overlay_mdp_perf_upd(mfd, 0); mdp4_overlay_update_lcd(mfd); mdp4_overlay_mdp_perf_upd(mfd, 1); if (mdp_hw_revision < MDP4_REVISION_V2_1) { /* dmas dmap switch */ if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num) == 0) { mdp4_dma_s_update_lcd(mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe); } else mdp4_mddi_kickoff_ui(mfd, mddi_pipe); } else /* no dams dmap switch */ mdp4_mddi_kickoff_ui(mfd, mddi_pipe); /* signal if pan function is waiting for the update completion */ if (mfd->pan_waiting) { mfd->pan_waiting = FALSE; complete(&mfd->pan_comp); } } mutex_unlock(&mfd->dma->ov_mutex); }
int mdp4_mddi_overlay_blt_start(struct msm_fb_data_type *mfd) { unsigned long flag; pr_debug("%s: blt_end=%d blt_addr=%x pid=%d\n", __func__, mddi_pipe->blt_end, (int)mddi_pipe->ov_blt_addr, current->pid); mdp4_allocate_writeback_buf(mfd, MDP4_MIXER0); if (mfd->ov0_wb_buf->write_addr == 0) { pr_info("%s: no blt_base assigned\n", __func__); return -EBUSY; } if (mddi_pipe->ov_blt_addr == 0) { mdp4_mddi_dma_busy_wait(mfd); spin_lock_irqsave(&mdp_spin_lock, flag); mddi_pipe->blt_end = 0; mddi_pipe->blt_cnt = 0; mddi_pipe->ov_cnt = 0; mddi_pipe->dmap_cnt = 0; mddi_pipe->ov_blt_addr = mfd->ov0_wb_buf->write_addr; mddi_pipe->dma_blt_addr = mfd->ov0_wb_buf->write_addr; mdp4_stat.blt_mddi++; spin_unlock_irqrestore(&mdp_spin_lock, flag); return 0; } return -EBUSY; }
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd) { mutex_lock(&mfd->dma->ov_mutex); #ifdef MDP4_NONBLOCKING if (mfd && mfd->panel_power_on) { mdp4_mddi_dma_busy_wait(mfd, mddi_pipe); #else if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) { #endif mdp4_overlay_update_lcd(mfd); #ifdef MDP4_MDDI_DMA_SWITCH if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num) < 1) { mdp4_dma_s_update_lcd(mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe); } else #endif mdp4_mddi_overlay_kickoff(mfd, mddi_pipe); mdp4_stat.kickoff_mddi++; /* signal if pan function is waiting for the update completion */ if (mfd->pan_waiting) { mfd->pan_waiting = FALSE; complete(&mfd->pan_comp); } } mutex_unlock(&mfd->dma->ov_mutex); }
void mdp4_mddi_overlay_restore(void) { if (mddi_mfd == NULL) return; #ifdef MDP4_NONBLOCKING if (mddi_mfd->panel_power_on == 0) return; #else if (mddi_mfd->dma->busy || mddi_mfd->panel_power_on == 0) return; #endif #ifdef MDP4_MDDI_DMA_SWITCH mdp4_mddi_overlay_dmas_restore(); #else /* mutex holded by caller */ if (mddi_mfd && mddi_pipe) { mdp4_mddi_dma_busy_wait(mddi_mfd, mddi_pipe); mdp4_overlay_update_lcd(mddi_mfd); mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe); } #endif }
void mdp4_mddi_overlay_restore(void) { if (mddi_mfd == NULL) return; pr_debug("%s: resotre, pid=%d\n", __func__, current->pid); #ifndef CONFIG_SHLCDC_BOARD if (mddi_mfd->panel_power_on == 0) return; #else if (mddi_mfd->dma->busy || mddi_mfd->panel_power_on == 0) return; #endif if (mddi_mfd && mddi_pipe) { #ifndef CONFIG_SHLCDC_BOARD mdp4_mddi_dma_busy_wait(mddi_mfd); #endif mdp4_overlay_update_lcd(mddi_mfd); mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe); mddi_mfd->dma_update_flag = 1; } if (mdp_hw_revision < MDP4_REVISION_V2_1) /* need dmas dmap switch */ mdp4_mddi_overlay_dmas_restore(); }
void mdp4_mddi_overlay_dmas_restore(void) { /* mutex held by caller */ if (mddi_mfd && mddi_pipe) { mdp4_mddi_dma_busy_wait(mddi_mfd, mddi_pipe); mdp4_dma_s_update_lcd(mddi_mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mddi_mfd, mddi_pipe); mddi_mfd->dma_update_flag = 1; } }
int mdp4_mddi_overlay_cursor(struct fb_info *info, struct fb_cursor *cursor) { struct msm_fb_data_type *mfd = info->par; mutex_lock(&mfd->dma->ov_mutex); if (mfd && mfd->panel_power_on) { mdp4_mddi_dma_busy_wait(mfd); mdp_hw_cursor_update(info, cursor); } mutex_unlock(&mfd->dma->ov_mutex); return 0; }
void mdp4_mddi_overlay_dmas_restore(void) { if (mddi_mfd && mddi_pipe) { mdp4_mddi_dma_busy_wait(mddi_mfd, mddi_pipe); mdp4_dma_s_update_lcd(mddi_mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mddi_mfd, mddi_pipe); } }
void mdp4_mddi_overlay_dmas_restore(void) { /* mutex held by caller */ if (mddi_mfd && mddi_pipe) { #ifndef CONFIG_SHLCDC_BOARD mdp4_mddi_dma_busy_wait(mddi_mfd); #endif /*CONFIG_SHLCDC_BOARD*/ mdp4_dma_s_update_lcd(mddi_mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mddi_mfd, mddi_pipe); mddi_mfd->dma_update_flag = 1; } }
void mdp4_mddi_overlay_restore(void) { if (mddi_mfd == NULL) return; if (mddi_mfd->panel_power_on == 0) return; if (mddi_mfd && mddi_pipe) { mdp4_mddi_dma_busy_wait(mddi_mfd, mddi_pipe); mdp4_overlay_update_lcd(mddi_mfd); mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe); mddi_mfd->dma_update_flag = 1; } if (mdp_hw_revision < MDP4_REVISION_V2_1) /* need dmas dmap switch */ mdp4_mddi_overlay_dmas_restore(); }
void mdp4_mddi_kickoff_ui(struct msm_fb_data_type *mfd, struct mdp4_overlay_pipe *pipe) { if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num) > 0) { #ifdef MDDI_TIMER mddi_add_delay_timer(10); #endif atomic_set(&mddi_delay_kickoff_cnt, 1); INIT_COMPLETION(mddi_delay_comp); up(&mfd->dma->ov_sem); wait_for_completion_killable(&mddi_delay_comp); down(&mfd->dma->ov_sem); /* semaphore was re-locked, wait for DMA completion again*/ mdp4_mddi_dma_busy_wait(mfd, pipe); } mdp4_mddi_overlay_kickoff(mfd, pipe); }
void mdp4_mddi_overlay_restore(void) { if (mddi_mfd == NULL) return; pr_debug("%s: resotre, pid=%d\n", __func__, current->pid); if (mddi_mfd->panel_power_on == 0) return; if (mddi_mfd && mddi_pipe) { mdp4_mddi_dma_busy_wait(mddi_mfd); mdp4_overlay_update_lcd(mddi_mfd); if (mddi_pipe->ov_blt_addr) mdp4_mddi_blt_dmap_busy_wait(mddi_mfd); mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe); mddi_mfd->dma_update_flag = 1; } if (mdp_hw_revision < MDP4_REVISION_V2_1) /* need dmas dmap switch */ mdp4_mddi_overlay_dmas_restore(); }
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd) { mutex_lock(&mfd->dma->ov_mutex); if (mfd && mfd->panel_power_on) { mdp4_mddi_dma_busy_wait(mfd); mdp4_overlay_update_lcd(mfd); if (mdp_hw_revision < MDP4_REVISION_V2_1) { /* dmas dmap switch */ if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num) == 0) { mdp4_dma_s_update_lcd(mfd, mddi_pipe); mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe); } else mdp4_mddi_kickoff_ui(mfd, mddi_pipe); } else /* no dams dmap switch */ mdp4_mddi_kickoff_ui(mfd, mddi_pipe); mdp4_stat.kickoff_mddi++; /* signal if pan function is waiting for the update completion */ if (mfd->pan_waiting) { mfd->pan_waiting = FALSE; complete(&mfd->pan_comp); } } mdp4_overlay_resource_release(); mutex_unlock(&mfd->dma->ov_mutex); /*< DTS2011101103751 wangjiongfeng 20111011 begin */ #ifdef CONFIG_HUAWEI_KERNEL /* avoid to the ui thread occupy the ov_mutex continuously.If overlay_is_set is true,then schedule */ if (overlay_is_set) { schedule(); } #endif /* DTS2011101103751 wangjiongfeng 20111011 end >*/ }