void mdp4_mddi_overlay(struct msm_fb_data_type *mfd)
{
down(&mfd->dma->ov_sem);
if (mfd && mfd->panel_power_on) {
mdp4_mddi_dma_busy_wait(mfd, mddi_pipe);
mdp4_overlay_update_lcd(mfd);
if (mdp_hw_revision < MDP4_REVISION_V2_1) {
/* dmas dmap switch */
if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num)
== 0) {
mdp4_dma_s_update_lcd(mfd, mddi_pipe);
mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe);
} else
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
} else /* no dams dmap switch */
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
mdp4_stat.kickoff_mddi++;
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
mfd->pan_waiting = FALSE;
complete(&mfd->pan_comp);
}
}
up(&mfd->dma->ov_sem);
}
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd)
{
mutex_lock(&mfd->dma->ov_mutex);
if (mfd && mfd->panel_power_on) {
mdp4_mddi_dma_busy_wait(mfd);
if (mddi_pipe && mddi_pipe->ov_blt_addr)
mdp4_mddi_blt_dmap_busy_wait(mfd);
mdp4_overlay_mdp_perf_upd(mfd, 0);
mdp4_overlay_update_lcd(mfd);
mdp4_overlay_mdp_perf_upd(mfd, 1);
if (mdp_hw_revision < MDP4_REVISION_V2_1) {
/* dmas dmap switch */
if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num)
== 0) {
mdp4_dma_s_update_lcd(mfd, mddi_pipe);
mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe);
} else
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
} else /* no dams dmap switch */
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
mfd->pan_waiting = FALSE;
complete(&mfd->pan_comp);
}
}
mutex_unlock(&mfd->dma->ov_mutex);
}
void mdp4_mddi_overlay_restore(void)
{
if (mddi_mfd == NULL)
return;
#ifdef MDP4_NONBLOCKING
if (mddi_mfd->panel_power_on == 0)
return;
#else
if (mddi_mfd->dma->busy || mddi_mfd->panel_power_on == 0)
return;
#endif
#ifdef MDP4_MDDI_DMA_SWITCH
mdp4_mddi_overlay_dmas_restore();
#else
/* mutex holded by caller */
if (mddi_mfd && mddi_pipe) {
mdp4_mddi_dma_busy_wait(mddi_mfd, mddi_pipe);
mdp4_overlay_update_lcd(mddi_mfd);
mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe);
}
#endif
}
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd)
{
mutex_lock(&mfd->dma->ov_mutex);
#ifdef MDP4_NONBLOCKING
if (mfd && mfd->panel_power_on) {
#else
if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) {
#endif
mdp4_overlay_update_lcd(mfd);
#ifdef MDP4_MDDI_DMA_SWITCH
if (mdp4_overlay_pipe_staged(mddi_pipe->mixer_num) <= 1) {
mdp4_dma_s_update_lcd(mfd, mddi_pipe);
mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe);
} else
#endif
mdp4_mddi_overlay_kickoff(mfd, mddi_pipe);
mdp4_stat.kickoff_mddi++;
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
mfd->pan_waiting = FALSE;
complete(&mfd->pan_comp);
}
}
mutex_unlock(&mfd->dma->ov_mutex);
}
void mdp4_mddi_overlay_restore(void)
{
if (mddi_mfd == NULL)
return;
pr_debug("%s: resotre, pid=%d\n", __func__, current->pid);
#ifndef CONFIG_SHLCDC_BOARD
if (mddi_mfd->panel_power_on == 0)
return;
#else
if (mddi_mfd->dma->busy || mddi_mfd->panel_power_on == 0)
return;
#endif
if (mddi_mfd && mddi_pipe) {
#ifndef CONFIG_SHLCDC_BOARD
mdp4_mddi_dma_busy_wait(mddi_mfd);
#endif
mdp4_overlay_update_lcd(mddi_mfd);
mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe);
mddi_mfd->dma_update_flag = 1;
}
if (mdp_hw_revision < MDP4_REVISION_V2_1) /* need dmas dmap switch */
mdp4_mddi_overlay_dmas_restore();
}
void mdp4_mddi_overlay(void *priv, uint32_t addr, uint32_t stride,
uint32_t width, uint32_t height, uint32_t x,
uint32_t y)
{
struct mdp_info *mdp = priv;
#ifdef CONFIG_FB_MSM_WRITE_BACK
if (mdp->mdp_dev.overrides & MSM_MDP4_MDDI_DMA_SWITCH) {
mdp4_overlay_update_lcd(mdp, addr, stride, width, height, x, y);
if(mdp4_overlay_active(mdp, MDP4_MIXER0) > 1){
mdp4_overlay0_done_mddi();
mdp4_mddi_overlay_kickoff(mdp, mddi_pipe);
}
else {
if(mddi_pipe->blt_addr){
mdp4_overlay0_done_mddi();
mdp4_mddi_overlay_kickoff(mdp, mddi_pipe);
}else{
mdp4_dma_s_update_lcd(mdp);
mdp4_mddi_dma_s_kickoff(mdp, mddi_pipe);
}
}
} else {
mdp4_overlay_update_lcd(mdp, addr, stride, width, height, x, y);
mdp4_overlay0_done_mddi();
mdp4_mddi_overlay_kickoff(mdp, mddi_pipe);
}
#else
if (mdp->mdp_dev.overrides & MSM_MDP4_MDDI_DMA_SWITCH) {
mdp4_overlay_update_lcd(mdp, addr, stride, width, height, x, y);
if(mdp4_overlay_active(mdp, MDP4_MIXER0) > 1)
mdp4_mddi_overlay_kickoff(mdp, mddi_pipe);
else {
mdp4_dma_s_update_lcd(mdp);
mdp4_mddi_dma_s_kickoff(mdp, mddi_pipe);
}
} else {
mdp4_overlay_update_lcd(mdp, addr, stride, width, height, x, y);
mdp4_mddi_overlay_kickoff(mdp, mddi_pipe);
}
#endif
}
void mdp4_mddi_overlay_restore(void)
{
#ifdef MDP4_MDDI_DMA_SWITCH
mdp4_mddi_overlay_dmas_restore();
#else
/* mutex holded by caller */
if (mddi_mfd && mddi_pipe) {
mdp4_overlay_update_lcd(mddi_mfd);
mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe);
}
#endif
}
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd)
{
mutex_lock(&mfd->dma->ov_mutex);
if (mfd && mfd->panel_power_on) {
#ifndef CONFIG_SHLCDC_BOARD
mdp4_mddi_dma_busy_wait(mfd);
#endif /*CONFIG_SHLCDC_BOARD*/
mdp4_overlay_update_lcd(mfd);
if (mdp_hw_revision < MDP4_REVISION_V2_1) {
/* dmas dmap switch */
#ifdef CONFIG_SHLCDC_BOARD
if ((mdp4_overlay_pipe_staged(mddi_pipe->mixer_num) <= 1)
&& ( mddi_pipe->src_h == mddi_pipe->dst_h )
&& ( mddi_pipe->src_w == mddi_pipe->dst_w )) {
#else
if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num)
== 0) {
#endif /* CONFIG_SHLCDC_BOARD */
mdp4_dma_s_update_lcd(mfd, mddi_pipe);
mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe);
} else
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
} else /* no dams dmap switch */
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
mdp4_stat.kickoff_mddi++;
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
mfd->pan_waiting = FALSE;
complete(&mfd->pan_comp);
}
}
mdp4_overlay_resource_release();
mutex_unlock(&mfd->dma->ov_mutex);
}
int mdp4_mddi_overlay_cursor(struct fb_info *info, struct fb_cursor *cursor)
{
struct msm_fb_data_type *mfd = info->par;
mutex_lock(&mfd->dma->ov_mutex);
if (mfd && mfd->panel_power_on) {
#ifndef CONFIG_SHLCDC_BOARD
mdp4_mddi_dma_busy_wait(mfd);
#endif /* CONFIG_SHLCDC_BOARD */
mdp_hw_cursor_update(info, cursor);
}
mutex_unlock(&mfd->dma->ov_mutex);
return 0;
}
void mdp4_mddi_kickoff_video(struct msm_fb_data_type *mfd,
struct mdp4_overlay_pipe *pipe)
{
/*
* a video kickoff may happen before UI kickoff after
* blt enabled. mdp4_overlay_update_lcd() need
* to be called before kickoff.
* vice versa for blt disabled.
*/
if (mddi_pipe->ov_blt_addr && mddi_pipe->blt_cnt == 0)
mdp4_overlay_update_lcd(mfd); /* first time */
else if (mddi_pipe->ov_blt_addr == 0 && mddi_pipe->blt_cnt) {
mdp4_overlay_update_lcd(mfd); /* last time */
mddi_pipe->blt_cnt = 0;
}
pr_debug("%s: blt_addr=%d blt_cnt=%d\n",
__func__, (int)mddi_pipe->ov_blt_addr, mddi_pipe->blt_cnt);
if (mddi_pipe->ov_blt_addr)
mdp4_mddi_blt_dmap_busy_wait(mddi_mfd);
mdp4_mddi_overlay_kickoff(mfd, pipe);
}
void mdp4_mddi_overlay_restore(void)
{
if (mddi_mfd == NULL)
return;
if (mddi_mfd->panel_power_on == 0)
return;
if (mddi_mfd && mddi_pipe) {
mdp4_mddi_dma_busy_wait(mddi_mfd, mddi_pipe);
mdp4_overlay_update_lcd(mddi_mfd);
mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe);
mddi_mfd->dma_update_flag = 1;
}
if (mdp_hw_revision < MDP4_REVISION_V2_1) /* need dmas dmap switch */
mdp4_mddi_overlay_dmas_restore();
}
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd)
{
mutex_lock(&mfd->dma->ov_mutex);
if ((mfd) && (!mfd->dma->busy) && (mfd->panel_power_on)) {
mdp4_overlay_update_lcd(mfd);
mdp4_mddi_overlay_kickoff(mfd, mddi_pipe);
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
mfd->pan_waiting = FALSE;
complete(&mfd->pan_comp);
}
}
mutex_unlock(&mfd->dma->ov_mutex);
}
void mdp4_mddi_overlay_restore(void)
{
if (mddi_mfd == NULL)
return;
pr_debug("%s: resotre, pid=%d\n", __func__, current->pid);
if (mddi_mfd->panel_power_on == 0)
return;
if (mddi_mfd && mddi_pipe) {
mdp4_mddi_dma_busy_wait(mddi_mfd);
mdp4_overlay_update_lcd(mddi_mfd);
if (mddi_pipe->ov_blt_addr)
mdp4_mddi_blt_dmap_busy_wait(mddi_mfd);
mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe);
mddi_mfd->dma_update_flag = 1;
}
if (mdp_hw_revision < MDP4_REVISION_V2_1) /* need dmas dmap switch */
mdp4_mddi_overlay_dmas_restore();
}
void mdp4_mddi_overlay(struct msm_fb_data_type *mfd)
{
mutex_lock(&mfd->dma->ov_mutex);
if (mfd && mfd->panel_power_on) {
mdp4_mddi_dma_busy_wait(mfd);
mdp4_overlay_update_lcd(mfd);
if (mdp_hw_revision < MDP4_REVISION_V2_1) {
/* dmas dmap switch */
if (mdp4_overlay_mixer_play(mddi_pipe->mixer_num)
== 0) {
mdp4_dma_s_update_lcd(mfd, mddi_pipe);
mdp4_mddi_dma_s_kickoff(mfd, mddi_pipe);
} else
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
} else /* no dams dmap switch */
mdp4_mddi_kickoff_ui(mfd, mddi_pipe);
mdp4_stat.kickoff_mddi++;
/* signal if pan function is waiting for the update completion */
if (mfd->pan_waiting) {
mfd->pan_waiting = FALSE;
complete(&mfd->pan_comp);
}
}
mdp4_overlay_resource_release();
mutex_unlock(&mfd->dma->ov_mutex);
/*< DTS2011101103751 wangjiongfeng 20111011 begin */
#ifdef CONFIG_HUAWEI_KERNEL
/* avoid to the ui thread occupy the ov_mutex continuously.If overlay_is_set is true,then schedule */
if (overlay_is_set)
{
schedule();
}
#endif
/* DTS2011101103751 wangjiongfeng 20111011 end >*/
}
void mdp4_mddi_overlay_restore(void)
{
/* mutex holded by caller */
mdp4_overlay_update_lcd(mddi_mfd);
mdp4_mddi_overlay_kickoff(mddi_mfd, mddi_pipe);
}
