static int dsi_panel_handler(struct mdss_panel_data *pdata, int enable)
{
int rc = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
pr_debug("dsi_panel_handler enable=%d\n", enable);
if (!pdata)
return -ENODEV;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
if (enable) {
#if !(defined (CONFIG_MACH_MSM8X10_W6) || defined(CONFIG_MACH_MSM8X10_W55DS_GLOBAL_COM))
dsi_ctrl_gpio_request(ctrl_pdata);
mdss_dsi_panel_reset(pdata, 1);
#endif
rc = ctrl_pdata->on(pdata);
if (rc)
pr_err("dsi_panel_handler panel on failed %d\n", rc);
} else {
if (dsi_intf.op_mode_config)
dsi_intf.op_mode_config(DSI_CMD_MODE, pdata);
rc = ctrl_pdata->off(pdata);
mdss_dsi_panel_reset(pdata, 0);
dsi_ctrl_gpio_free(ctrl_pdata);
}
return rc;
}
static int dsi_panel_handler(struct mdss_panel_data *pdata, int enable)
{
int rc = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
pr_debug("dsi_panel_handler enable=%d\n", enable);
if (!pdata)
return -ENODEV;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
if (enable) {
dsi_ctrl_gpio_request(ctrl_pdata);
mdss_dsi_panel_reset(pdata, 1);
pdata->panel_info.panel_power_on = 1;
rc = ctrl_pdata->on(pdata);
if (rc)
pr_err("dsi_panel_handler panel on failed %d\n", rc);
} else {
if (dsi_intf.op_mode_config)
dsi_intf.op_mode_config(DSI_CMD_MODE, pdata);
rc = ctrl_pdata->off(pdata);
pdata->panel_info.panel_power_on = 0;
mdss_dsi_panel_reset(pdata, 0);
dsi_ctrl_gpio_free(ctrl_pdata);
}
return rc;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto error;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
if (pdata->panel_info.dynamic_switch_pending)
return 0;
if (enable) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable vregs.rc=%d\n",
__func__, ret);
goto error;
}
if (!pdata->panel_info.mipi.lp11_init) {
ret = mdss_dsi_panel_reset(pdata, 1);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
if (msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0))
pr_err("Disable vregs failed\n");
goto error;
}
}
} else {
ret = mdss_dsi_panel_reset(pdata, 0);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
goto error;
}
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
}
error:
return ret;
}
static int dsi_panel_handler(struct mdss_panel_data *pdata, int enable)
{
int rc = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
pr_debug("dsi_panel_handler enable=%d\n", enable);
if (!pdata)
return -ENODEV;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
if (enable) {
if (!pdata->panel_info.dynamic_switch_pending) {
if (pdata->panel_info.type == MIPI_CMD_PANEL)
dsi_ctrl_gpio_request(ctrl_pdata);
mdss_dsi_panel_reset(pdata, 1);
}
pdata->panel_info.panel_power_on = 1;
if (!pdata->panel_info.dynamic_switch_pending) {
rc = ctrl_pdata->on(pdata);
if (rc)
pr_err("%s: panel on failed!\n", __func__);
}
if (pdata->panel_info.type == MIPI_CMD_PANEL &&
pdata->panel_info.dynamic_switch_pending) {
dsi_ctrl_gpio_request(ctrl_pdata);
mdss_dsi_set_tear_on(ctrl_pdata);
}
} else {
msm_dsi_sw_reset();
if (dsi_intf.op_mode_config)
dsi_intf.op_mode_config(DSI_CMD_MODE, pdata);
if (pdata->panel_info.dynamic_switch_pending) {
pr_info("%s: switching to %s mode\n", __func__,
(pdata->panel_info.mipi.mode ? "video" : "command"));
if (pdata->panel_info.type == MIPI_CMD_PANEL) {
ctrl_pdata->switch_mode(pdata, DSI_VIDEO_MODE);
dsi_ctrl_gpio_free(ctrl_pdata);
} else if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
ctrl_pdata->switch_mode(pdata, DSI_CMD_MODE);
dsi_ctrl_gpio_request(ctrl_pdata);
mdss_dsi_set_tear_off(ctrl_pdata);
dsi_ctrl_gpio_free(ctrl_pdata);
}
}
if (!pdata->panel_info.dynamic_switch_pending)
rc = ctrl_pdata->off(pdata);
pdata->panel_info.panel_power_on = 0;
if (!pdata->panel_info.dynamic_switch_pending) {
if (pdata->panel_info.type == MIPI_CMD_PANEL)
dsi_ctrl_gpio_free(ctrl_pdata);
mdss_dsi_panel_reset(pdata, 0);
}
}
return rc;
}
static int mdss_dsi_panel_power(uint8_t enable)
{
int ret = NO_ERROR;
if (enable) {
/* Enable backlight */
ret = panel_backlight_ctrl(enable);
if (ret) {
dprintf(CRITICAL, "Backlight enable failed \n");
return ret;
}
ret = target_ldo_ctrl(enable, ldo_entry_array,
TOTAL_LDO_DEFINED);
if (ret) {
dprintf(CRITICAL, "LDO control enable failed \n");
return ret;
}
/* Panel Reset */
ret = mdss_dsi_panel_reset(enable);
if (ret) {
dprintf(CRITICAL, "panel reset failed \n");
return ret;
}
dprintf(SPEW, "Panel power on done\n");
} else {
/* Disable panel, backlight and ldo */
ret = mdss_dsi_panel_reset(enable);
if (ret) {
dprintf(CRITICAL, "panel reset disable failed \n");
return ret;
}
ret = panel_backlight_ctrl(enable);
if (ret) {
dprintf(CRITICAL, "Backlight disable failed \n");
return ret;
}
ret = target_ldo_ctrl(enable, ldo_entry_array,
TOTAL_LDO_DEFINED);
if (ret) {
dprintf(CRITICAL, "ldo control disable failed \n");
return ret;
}
dprintf(SPEW, "Panel power off done\n");
}
return ret;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto error;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
if (enable) {
#ifdef CONFIG_MACH_LGE
mdss_dsi_panel_io(pdata, 1);
#endif
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable vregs.rc=%d\n",
__func__, ret);
goto error;
}
if (pdata->panel_info.panel_power_on == 0)
mdss_dsi_panel_reset(pdata, 1);
} else {
mdss_dsi_panel_reset(pdata, 0);
#ifdef CONFIG_MACH_LGE
mdss_dsi_panel_io(pdata, 0);
#endif
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
}
error:
return ret;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto error;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
if (enable) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable vregs.rc=%d\n",
__func__, ret);
goto error;
}
if (pdata->panel_info.panel_power_on == 0)
mdss_dsi_panel_reset(pdata, 1);
} else {
mdss_dsi_panel_reset(pdata, 0);
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
#ifdef ZTE_FEATURE_LCD_5_HD_VIDEO
gpio_direction_output(13, 0);
mdelay(5);
gpio_direction_output(12, 0);
mdelay(5);
#endif
}
error:
return ret;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto error;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
if (enable) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable vregs.rc=%d\n",
__func__, ret);
goto error;
}
#ifndef CONFIG_HUAWEI_LCD
if (pdata->panel_info.panel_power_on == 0)
mdss_dsi_panel_reset(pdata, 1);
#endif
} else {
/*reset should change to low after mipi off, we reset lcd in here instead of BLANK*/
#ifdef CONFIG_HUAWEI_LCD
mdss_dsi_panel_reset(pdata, 0);
#endif
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
}
error:
return ret;
}
static int dsi_panel_handler(struct mdss_panel_data *pdata, int enable)
{
int rc = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
pr_debug("dsi_panel_handler enable=%d\n", enable);
if (!pdata)
return -ENODEV;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
if (enable &&
(pdata->panel_info.panel_power_state == MDSS_PANEL_POWER_OFF)) {
if (!pdata->panel_info.dynamic_switch_pending) {
mdss_dsi_panel_reset(pdata, 1);
rc = ctrl_pdata->on(pdata);
if (rc)
pr_err("dsi_panel_handler panel on failed %d\n",
rc);
}
pdata->panel_info.panel_power_state = MDSS_PANEL_POWER_ON;
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_set_tear_on(ctrl_pdata);
} else if (!enable &&
(pdata->panel_info.panel_power_state == MDSS_PANEL_POWER_ON)) {
msm_dsi_sw_reset();
if (dsi_intf.op_mode_config)
dsi_intf.op_mode_config(DSI_CMD_MODE, pdata);
if (pdata->panel_info.dynamic_switch_pending) {
pr_info("%s: switching to %s mode\n", __func__,
(pdata->panel_info.mipi.mode ? "video" : "command"));
if (pdata->panel_info.type == MIPI_CMD_PANEL) {
ctrl_pdata->switch_mode(pdata, DSI_VIDEO_MODE);
} else if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
ctrl_pdata->switch_mode(pdata, DSI_CMD_MODE);
mdss_dsi_set_tear_off(ctrl_pdata);
}
}
pdata->panel_info.panel_power_state = MDSS_PANEL_POWER_OFF;
if (!pdata->panel_info.dynamic_switch_pending) {
rc = ctrl_pdata->off(pdata);
mdss_dsi_panel_reset(pdata, 0);
}
}
return rc;
}
int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
/* Z OLED power on start */
if (enable) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable regulators.rc=%d\n",
__func__, ret);
return ret;
}
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
gpio_set_value((ctrl_pdata->disp_en_gpio), 1);
msleep(1);
} else
pr_debug("%s:%d, reset line not configured\n",
__func__, __LINE__);
/*
* A small delay is needed here after enabling
* all regulators and before issuing panel reset
*/
msleep(10);
/* Z OLED power off start */
} else {
msleep(20);
mdss_dsi_panel_reset(pdata, 0);
msleep(20);
ret = msm_dss_enable_vreg(
/*ctrl_pdata->power_data.vreg_config*/ctrl_pdata->power_data.vreg_config+1,
/*ctrl_pdata->power_data.num_vreg*/1, 0);
if (ret) {
pr_err("%s: Failed to disable regs.rc=%d\n",
__func__, ret);
return ret;
}
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);
msleep(1);
}
pr_info("[Zee][OLED] mdss_dsi_panel_power %s\n", enable ? "on" : "off");
return 0;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int i = 0;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
for (i = 0; i < DSI_MAX_PM; i++) {
/*
* Core power module will be enabled when the
* clocks are enabled
*/
if (DSI_CORE_PM == i)
continue;
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 1);
if (ret) {
pr_err("%s: failed to enable vregs for %s\n",
__func__, __mdss_dsi_pm_name(i));
goto error;
}
}
i--;
/*
* If continuous splash screen feature is enabled, then we need to
* request all the GPIOs that have already been configured in the
* bootloader. This needs to be done irresepective of whether
* the lp11_init flag is set or not.
*/
if (pdata->panel_info.cont_splash_enabled ||
!pdata->panel_info.mipi.lp11_init) {
ret = mdss_dsi_panel_reset(pdata, 1);
if (ret)
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
}
error:
if (ret) {
for (; i >= 0; i--)
msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 0);
}
return ret;
}
static int mdss_dsi_panel_power(uint8_t enable,
struct msm_panel_info *pinfo)
{
int ret = NO_ERROR;
if (enable) {
ret = target_ldo_ctrl(enable, pinfo);
if (ret) {
dprintf(CRITICAL, "LDO control enable failed\n");
return ret;
}
/* Panel Reset */
if (!panelstruct.paneldata->panel_lp11_init) {
ret = mdss_dsi_panel_reset(enable);
if (ret) {
dprintf(CRITICAL, "panel reset failed\n");
return ret;
}
}
dprintf(SPEW, "Panel power on done\n");
} else {
/* Disable panel and ldo */
ret = mdss_dsi_panel_reset(enable);
if (ret) {
dprintf(CRITICAL, "panel reset disable failed\n");
return ret;
}
ret = target_ldo_ctrl(enable, pinfo);
if (ret) {
dprintf(CRITICAL, "ldo control disable failed\n");
return ret;
}
dprintf(SPEW, "Panel power off done\n");
}
return ret;
}
static int mdss_dsi_panel_pre_init(void)
{
int ret = NO_ERROR;
if (panelstruct.paneldata->panel_lp11_init) {
ret = mdss_dsi_panel_reset(1);
if (ret) {
dprintf(CRITICAL, "panel reset failed\n");
return ret;
}
}
if(panelstruct.paneldata->panel_init_delay)
udelay(panelstruct.paneldata->panel_init_delay);
dprintf(SPEW, "Panel pre init done\n");
return ret;
}
static int mdss_dsi_panel_power_off(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int i = 0;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto end;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
ret = mdss_dsi_panel_reset(pdata, 0);
if (ret) {
pr_warn("%s: Panel reset failed. rc=%d\n", __func__, ret);
ret = 0;
}
for (i = DSI_MAX_PM - 1; i >= 0; i--) {
/*
* Core power module will be disabled when the
* clocks are disabled
*/
if (DSI_CORE_PM == i)
continue;
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 0);
if (ret)
pr_err("%s: failed to disable vregs for %s\n",
__func__, __mdss_dsi_pm_name(i));
}
end:
return ret;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
#endif
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
if (enable) {
if (ctrl_pdata->power_data.num_vreg > 0) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable regulators.rc=%d\n",
__func__, ret);
return ret;
}
/*
* A small delay is needed here after enabling
* all regulators and before issuing panel reset
*/
msleep(20);
} else {
#ifdef CONFIG_MACH_LGE
if (mdss_dsi_use_vdd_supply) {
ret = regulator_set_optimum_mode
((ctrl_pdata->shared_pdata).vdd_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
#else
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_vreg set opt mode failed.\n",
__func__);
return ret;
}
#endif
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_io_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode
((ctrl_pdata->shared_pdata).vdda_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdda_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
msleep(20);
#ifdef CONFIG_MACH_LGE
if (mdss_dsi_use_vdd_supply) {
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
}
msleep(20);
#else
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
msleep(20);
#endif
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdda_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
}
#if defined(CONFIG_MACH_LGE)
/* LGE_CHANGE_S
* power sequence for LGD_FHD panel
* 2013-04-05, [email protected]
*/
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)){
gpio_set_value((ctrl_pdata->disp_en_gpio), 1);
msleep(1);
}
else
pr_debug("%s:%d, reset line not configured\n",
__func__, __LINE__);
#else
if (pdata->panel_info.panel_power_on == 0)
mdss_dsi_panel_reset(pdata, 1);
/* LGE_CHANGE_E */
#endif
} else {
#if !defined(CONFIG_MACH_LGE)
/* LGE_CHANGE_S
* power sequence for LGD_FHD panel
* 2013-04-05, [email protected]
*/
mdss_dsi_panel_reset(pdata, 0);
#endif
if (ctrl_pdata->power_data.num_vreg > 0) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable regs.rc=%d\n",
__func__, ret);
return ret;
}
} else {
#ifdef CONFIG_MACH_LGE
if (mdss_dsi_use_vdd_supply) {
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
}
#else
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
#endif
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdda_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
#if defined(CONFIG_MACH_LGE)
/* LGE_CHANGE_S
* power sequence for LGD_FHD panel
* 2013-04-09, [email protected]
*/
msleep(1);
mdss_dsi_panel_reset(pdata, 0);
msleep(1);
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);
msleep(1);
#endif
#if !defined(CONFIG_MACH_MSM8974_VU3_KR)
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
#endif
#ifdef CONFIG_MACH_LGE
if (mdss_dsi_use_vdd_supply) {
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
#else
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_vreg set opt mode failed.\n",
__func__);
return ret;
}
#endif
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_io_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdda_vreg, 100);
if (ret < 0) {
pr_err("%s: vdda_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
}
return 0;
pr_info("%s: %s\n", __func__, enable ? "on" : "off");
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int cur_power_state;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
cur_power_state = pdata->panel_info.panel_power_state;
pr_debug("%s+: ctrl=%p ndx=%d cur_power_state=%d\n", __func__,
ctrl_pdata, ctrl_pdata->ndx, cur_power_state);
pinfo = &pdata->panel_info;
mipi = &pdata->panel_info.mipi;
if (mdss_dsi_is_panel_on_interactive(pdata)) {
pr_debug("%s: panel already on\n", __func__);
goto end;
}
ret = mdss_dsi_panel_power_ctrl(pdata, MDSS_PANEL_POWER_ON);
if (ret) {
pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret);
return ret;
}
if (cur_power_state != MDSS_PANEL_POWER_OFF) {
pr_debug("%s: dsi_on from panel low power state\n", __func__);
goto end;
}
/*
* Enable DSI clocks.
* This is also enable the DSI core power block and reset/setup
* DSI phy
*/
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
mdss_dsi_sw_reset(ctrl_pdata, true);
/*
* Issue hardware reset line after enabling the DSI clocks and data
* data lanes for LP11 init
*/
if (mipi->lp11_init)
mdss_dsi_panel_reset(pdata, 1);
if (mipi->init_delay)
usleep(mipi->init_delay);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
end:
pr_debug("%s-:\n", __func__);
return 0;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto error;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
if (enable) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable vregs.rc=%d\n",
__func__, ret);
goto error;
}
#if defined(CONFIG_G2_LGD_PANEL) || defined(CONFIG_VU3_LGD_PANEL)
/*
*/
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
gpio_set_value((ctrl_pdata->disp_en_gpio), 1);
msleep(1);
} else
pr_debug("%s:%d, reset line not configured\n",
__func__, __LINE__);
#elif defined(CONFIG_B1_LGD_PANEL)
/* B1 LCD workaround for TI DSV VSN current inrush problem*/
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)) {
gpio_set_value((ctrl_pdata->disp_en_gpio), 1);
mdelay(1);
if( dsv_first_control_flag == false ){
dsv_first_control_flag = true;
}
else {
/* toggle the dsv */
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);
mdelay(5);
gpio_set_value((ctrl_pdata->disp_en_gpio), 1);
msleep(10);
}
} else
pr_debug("%s:%d, reset line not configured\n",
__func__, __LINE__);
#else
if (pdata->panel_info.panel_power_on == 0)
mdss_dsi_panel_reset(pdata, 1);
#endif
} else {
#if defined(CONFIG_G2_LGD_PANEL) || defined(CONFIG_B1_LGD_PANEL) || defined(CONFIG_VU3_LGD_PANEL)
/*
*/
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config+1,
1, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
#if defined(CONFIG_B1_LGD_PANEL)
/* Enter deep standby mode for power saving*/
/* Don't reset */
msleep(1);
#else
msleep(1);
mdss_dsi_panel_reset(pdata, 0);
#endif
msleep(1);
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);
msleep(1);
#if !defined(CONFIG_B1_LGD_PANEL) && !defined(CONFIG_VU3_LGD_PANEL)
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
1, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
#endif
#else
mdss_dsi_panel_reset(pdata, 0);
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable vregs.rc=%d\n",
__func__, ret);
}
#endif
}
error:
pr_info("%s: %s\n", __func__, enable ? "on" : "off");
return ret;
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already on.\n", __func__, __LINE__);
return 0;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s+: ctrl=%p ndx=%d\n",
__func__, ctrl_pdata, ctrl_pdata->ndx);
pinfo = &pdata->panel_info;
mipi = &pdata->panel_info.mipi;
ret = mdss_dsi_panel_power_on(pdata, 1);
if (ret) {
pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret);
return ret;
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 1);
if (ret) {
pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
ret);
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
return ret;
}
pdata->panel_info.panel_power_on = 0;
return ret;
}
if (!mipi->lp11_init)
{
pdata->panel_info.panel_power_on = 1;
}
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
mdss_dsi_phy_init(pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 0);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
__mdss_dsi_ctrl_setup(pdata);
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(pdata);
/*
* Issue hardware reset line after enabling the DSI clocks and data
* data lanes for LP11 init
*/
if (mipi->lp11_init) {
usleep(mipi->lp11_rst_delay);
if (mdss_dsi_pinctrl_set_state(ctrl_pdata, true))
pr_debug("reset enable: pinctrl not enabled\n");
mdss_dsi_panel_reset(pdata, 1);
pdata->panel_info.panel_power_on = 1;
}
if (mipi->init_delay)
usleep(mipi->init_delay);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
pr_debug("%s-:\n", __func__);
return 0;
}
int dsi_panel_device_register(struct device_node *pan_node,
struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
struct mipi_panel_info *mipi;
int rc, i, len;
struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
struct device_node *dsi_ctrl_np = NULL;
struct platform_device *ctrl_pdev = NULL;
bool dynamic_fps;
const char *data;
mipi = &(pinfo->mipi);
pinfo->type =
((mipi->mode == DSI_VIDEO_MODE)
? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL);
rc = mdss_dsi_clk_div_config(pinfo, mipi->frame_rate);
if (rc) {
pr_err("%s: unable to initialize the clk dividers\n", __func__);
return rc;
}
dsi_ctrl_np = of_parse_phandle(pan_node,
"qcom,mdss-dsi-panel-controller", 0);
if (!dsi_ctrl_np) {
pr_err("%s: Dsi controller node not initialized\n", __func__);
return -EPROBE_DEFER;
}
ctrl_pdev = of_find_device_by_node(dsi_ctrl_np);
rc = mdss_dsi_regulator_init(ctrl_pdev);
if (rc) {
pr_err("%s: failed to init regulator, rc=%d\n",
__func__, rc);
return rc;
}
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-strength-ctrl", &len);
if ((!data) || (len != 2)) {
pr_err("%s:%d, Unable to read Phy Strength ctrl settings",
__func__, __LINE__);
return -EINVAL;
}
pinfo->mipi.dsi_phy_db.strength[0] = data[0];
pinfo->mipi.dsi_phy_db.strength[1] = data[1];
pinfo->mipi.dsi_phy_db.reg_ldo_mode = of_property_read_bool(
ctrl_pdev->dev.of_node, "qcom,regulator-ldo-mode");
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-regulator-settings", &len);
if ((!data) || (len != 7)) {
pr_err("%s:%d, Unable to read Phy regulator settings",
__func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < len; i++) {
pinfo->mipi.dsi_phy_db.regulator[i]
= data[i];
}
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-bist-ctrl", &len);
if ((!data) || (len != 6)) {
pr_err("%s:%d, Unable to read Phy Bist Ctrl settings",
__func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < len; i++) {
pinfo->mipi.dsi_phy_db.bistctrl[i]
= data[i];
}
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-lane-config", &len);
if ((!data) || (len != 45)) {
pr_err("%s:%d, Unable to read Phy lane configure settings",
__func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < len; i++) {
pinfo->mipi.dsi_phy_db.lanecfg[i] =
data[i];
}
ctrl_pdata->shared_pdata.broadcast_enable = of_property_read_bool(
pan_node, "qcom,mdss-dsi-panel-broadcast-mode");
dynamic_fps = of_property_read_bool(pan_node,
"qcom,mdss-dsi-pan-enable-dynamic-fps");
if (dynamic_fps) {
pinfo->dynamic_fps = true;
data = of_get_property(pan_node,
"qcom,mdss-dsi-pan-fps-update", NULL);
if (data) {
if (!strcmp(data, "dfps_suspend_resume_mode")) {
pinfo->dfps_update =
DFPS_SUSPEND_RESUME_MODE;
pr_debug("%s: dfps mode: suspend/resume\n",
__func__);
} else if (!strcmp(data,
"dfps_immediate_clk_mode")) {
pinfo->dfps_update =
DFPS_IMMEDIATE_CLK_UPDATE_MODE;
pr_debug("%s: dfps mode: Immediate clk\n",
__func__);
} else if (!strcmp(data,
"dfps_immediate_porch_mode")) {
pinfo->dfps_update =
DFPS_IMMEDIATE_PORCH_UPDATE_MODE;
pr_debug("%s: dfps mode: Immediate porch\n",
__func__);
} else {
pr_debug("%s: dfps to default mode\n",
__func__);
pinfo->dfps_update =
DFPS_SUSPEND_RESUME_MODE;
pr_debug("%s: dfps mode: suspend/resume\n",
__func__);
}
} else {
pr_debug("%s: dfps update mode not configured\n",
__func__);
pinfo->dynamic_fps = false;
pr_debug("%s: dynamic FPS disabled\n",
__func__);
}
pinfo->new_fps = pinfo->mipi.frame_rate;
}
ctrl_pdata->disp_en_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-enable-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->disp_en_gpio))
pr_err("%s:%d, Disp_en gpio not specified\n",
__func__, __LINE__);
ctrl_pdata->bklt_en_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-bklight-en-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->bklt_en_gpio))
pr_info("%s: bklt_en gpio not specified\n", __func__);
ctrl_pdata->rst_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-reset-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->rst_gpio))
pr_err("%s:%d, reset gpio not specified\n",
__func__, __LINE__);
ctrl_pdata->disp_te_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-te-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->disp_te_gpio))
pr_info("%s: disp_te_gpio not specified\n", __func__);
if (pinfo->mode_gpio_state != MODE_GPIO_NOT_VALID) {
ctrl_pdata->mode_gpio = of_get_named_gpio(
ctrl_pdev->dev.of_node,
"qcom,platform-mode-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->mode_gpio))
pr_info("%s:%d, mode gpio not specified\n",
__func__, __LINE__);
} else {
ctrl_pdata->mode_gpio = -EINVAL;
}
if (mdss_dsi_clk_init(ctrl_pdev, ctrl_pdata)) {
pr_err("%s: unable to initialize Dsi ctrl clks\n", __func__);
return -EPERM;
}
if (mdss_dsi_retrieve_ctrl_resources(ctrl_pdev,
pinfo->pdest,
ctrl_pdata)) {
pr_err("%s: unable to get Dsi controller res\n", __func__);
return -EPERM;
}
ctrl_pdata->panel_data.event_handler = mdss_dsi_event_handler;
if (ctrl_pdata->status_mode == ESD_REG)
ctrl_pdata->check_status = mdss_dsi_reg_status_check;
else if (ctrl_pdata->status_mode == ESD_BTA)
ctrl_pdata->check_status = mdss_dsi_bta_status_check;
else if (ctrl_pdata->status_mode == ESD_REG_ZTE)
zte_lcd_check_status_init(ctrl_pdata);
if (ctrl_pdata->status_mode == ESD_MAX) {
pr_err("%s: Using default BTA for ESD check\n", __func__);
ctrl_pdata->check_status = mdss_dsi_bta_status_check;
}
#ifdef CONFIG_ZTEMT_LCD_ESD_TE_CHECK
if (ctrl_pdata->panel_name
&& (!strcmp(ctrl_pdata->panel_name, "cs nt35592 720p video mode dsi panel")
|| !strcmp(ctrl_pdata->panel_name, "lianchuang nt35592 720p video mode dsi panel"))) {
ctrl_pdata->check_status = zte_check_status_by_te;
printk("nt35592 check by te\n");
} else if (ctrl_pdata->panel_name
&& !strcmp(ctrl_pdata->panel_name, "success hx8392b 720p video mode dsi panel")) {
ctrl_pdata->check_status = success_hx83920b_check_status;
printk("hx83920b check faled always\n");
}
#endif
if (ctrl_pdata->bklt_ctrl == BL_PWM)
mdss_dsi_panel_pwm_cfg(ctrl_pdata);
mdss_dsi_ctrl_init(ctrl_pdata);
/*
* register in mdp driver
*/
ctrl_pdata->pclk_rate = mipi->dsi_pclk_rate;
ctrl_pdata->byte_clk_rate = pinfo->clk_rate / 8;
pr_debug("%s: pclk=%d, bclk=%d\n", __func__,
ctrl_pdata->pclk_rate, ctrl_pdata->byte_clk_rate);
ctrl_pdata->ctrl_state = CTRL_STATE_UNKNOWN;
if (pinfo->cont_splash_enabled) {
pinfo->panel_power_on = 1;
rc = mdss_dsi_panel_power_on(&(ctrl_pdata->panel_data), 1);
if (rc) {
pr_err("%s: Panel power on failed\n", __func__);
return rc;
}
if (pinfo->mipi.lp11_init) {
if (mdss_dsi_pinctrl_set_state(ctrl_pdata, true))
pr_debug("reset enable: pinctrl not enabled\n");
rc = mdss_dsi_panel_reset(&(ctrl_pdata->panel_data), 1);
if (rc) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, rc);
return rc;
}
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
ctrl_pdata->ctrl_state |=
(CTRL_STATE_PANEL_INIT | CTRL_STATE_MDP_ACTIVE);
} else {
pinfo->panel_power_on = 0;
}
rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data));
if (rc) {
pr_err("%s: unable to register MIPI DSI panel\n", __func__);
return rc;
}
if (pinfo->pdest == DISPLAY_1) {
mdss_debug_register_base("dsi0",
ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
ctrl_pdata->ndx = 0;
} else {
mdss_debug_register_base("dsi1",
ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
ctrl_pdata->ndx = 1;
}
pr_debug("%s: Panel data initialized\n", __func__);
return 0;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int i = 0;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto error;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
/*
* If a dynamic mode switch is pending, the regulators should not
* be turned off or on.
*/
if (pdata->panel_info.dynamic_switch_pending)
return 0;
if (enable) {
for (i = 0; i < DSI_MAX_PM; i++) {
/*
* Core power module will be enabled when the
* clocks are enabled
*/
if (DSI_CORE_PM == i)
continue;
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 1);
if (ret) {
pr_err("%s: failed to enable vregs for %s\n",
__func__, __mdss_dsi_pm_name(i));
goto error_enable;
}
}
if (!pdata->panel_info.mipi.lp11_init) {
if (mdss_dsi_pinctrl_set_state(ctrl_pdata, true))
pr_debug("reset enable: pinctrl not enabled\n");
ret = mdss_dsi_panel_reset(pdata, 1);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
goto error_enable;
}
}
} else {
ret = mdss_dsi_panel_reset(pdata, 0);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
goto error;
}
if (mdss_dsi_pinctrl_set_state(ctrl_pdata, false))
pr_debug("reset disable: pinctrl not enabled\n");
for (i = DSI_MAX_PM - 1; i >= 0; i--) {
/*
* Core power module will be disabled when the
* clocks are disabled
*/
if (DSI_CORE_PM == i)
continue;
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 0);
if (ret)
pr_err("%s: failed to disable vregs for %s\n",
__func__, __mdss_dsi_pm_name(i));
}
}
error_enable:
if (ret) {
for (; i >= 0; i--)
msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 0);
}
error:
return ret;
}
static int mdss_dsi_off(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct mdss_panel_info *panel_info = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (!pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already off.\n", __func__, __LINE__);
return -EPERM;
}
pdata->panel_info.panel_power_on = 0;
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
panel_info = &ctrl_pdata->panel_data.panel_info;
pr_info("%s+: ctrl=%p ndx=%d\n", __func__,
ctrl_pdata, ctrl_pdata->ndx);
#ifdef CONFIG_MACH_LGE
mdss_dsi_panel_reset(pdata, 0);
#endif
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, 1);
/* */
mdss_dsi_controller_cfg(0, pdata);
/* */
mdss_dsi_phy_disable(ctrl_pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, 0);
#ifdef CONFIG_MACH_LGE
mdelay(5);
mdss_dsi_panel_io(pdata, 0);
ret = msm_dss_enable_vreg(ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s:Failed to enable vregs. rc=%d\n", __func__, ret);
return ret;
}
#else
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
pr_err("%s: Panel power off failed\n", __func__);
return ret;
}
#endif
if (panel_info->dynamic_fps
&& (panel_info->dfps_update == DFPS_SUSPEND_RESUME_MODE)
&& (panel_info->new_fps != panel_info->mipi.frame_rate))
panel_info->mipi.frame_rate = panel_info->new_fps;
pr_info("%s-:\n", __func__);
return ret;
}
static int mdss_dsi_panel_power_on(int enable)
{
int ret;
pr_debug("%s: enable=%d\n", __func__, enable);
if (enable) {
ret = regulator_set_optimum_mode(dsi_drv.vdd_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_vreg set regulator mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(dsi_drv.vdd_io_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set regulator mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(dsi_drv.dsi_vreg, 100000);
if (ret < 0) {
pr_err("%s: dsi_vreg set regulator mode failed.\n",
__func__);
return ret;
}
ret = regulator_enable(dsi_drv.vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n", __func__);
return ret;
}
msleep(20);
wmb();
ret = regulator_enable(dsi_drv.vdd_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n", __func__);
return ret;
}
msleep(20);
wmb();
ret = regulator_enable(dsi_drv.dsi_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n", __func__);
return ret;
}
mdss_dsi_panel_reset(1);
} else {
mdss_dsi_panel_reset(0);
ret = regulator_disable(dsi_drv.vdd_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n", __func__);
return ret;
}
ret = regulator_disable(dsi_drv.dsi_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n", __func__);
return ret;
}
ret = regulator_disable(dsi_drv.vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n", __func__);
return ret;
}
ret = regulator_set_optimum_mode(dsi_drv.vdd_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_vreg set regulator mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(dsi_drv.vdd_io_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set regulator mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(dsi_drv.dsi_vreg, 100);
if (ret < 0) {
pr_err("%s: dsi_vreg set regulator mode failed.\n",
__func__);
return ret;
}
}
return 0;
}
int dsi_panel_device_register(struct device_node *pan_node,
struct mdss_dsi_ctrl_pdata *ctrl_pdata)
{
struct mipi_panel_info *mipi;
int rc, i, len;
struct device_node *dsi_ctrl_np = NULL;
struct platform_device *ctrl_pdev = NULL;
bool dynamic_fps;
const char *data;
struct mdss_panel_info *pinfo = &(ctrl_pdata->panel_data.panel_info);
enum of_gpio_flags flags;
mipi = &(pinfo->mipi);
pinfo->type =
((mipi->mode == DSI_VIDEO_MODE)
? MIPI_VIDEO_PANEL : MIPI_CMD_PANEL);
rc = mdss_dsi_clk_div_config(pinfo, mipi->frame_rate);
if (rc) {
pr_err("%s: unable to initialize the clk dividers\n", __func__);
return rc;
}
dsi_ctrl_np = of_parse_phandle(pan_node,
"qcom,mdss-dsi-panel-controller", 0);
if (!dsi_ctrl_np) {
pr_err("%s: Dsi controller node not initialized\n", __func__);
return -EPROBE_DEFER;
}
ctrl_pdev = of_find_device_by_node(dsi_ctrl_np);
rc = mdss_dsi_regulator_init(ctrl_pdev);
if (rc) {
pr_err("%s: failed to init regulator, rc=%d\n",
__func__, rc);
return rc;
}
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-strength-ctrl", &len);
if ((!data) || (len != 2)) {
pr_err("%s:%d, Unable to read Phy Strength ctrl settings",
__func__, __LINE__);
return -EINVAL;
}
pinfo->mipi.dsi_phy_db.strength[0] = data[0];
pinfo->mipi.dsi_phy_db.strength[1] = data[1];
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-regulator-settings", &len);
if ((!data) || (len != 7)) {
pr_err("%s:%d, Unable to read Phy regulator settings",
__func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < len; i++) {
pinfo->mipi.dsi_phy_db.regulator[i]
= data[i];
}
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-bist-ctrl", &len);
if ((!data) || (len != 6)) {
pr_err("%s:%d, Unable to read Phy Bist Ctrl settings",
__func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < len; i++) {
pinfo->mipi.dsi_phy_db.bistctrl[i]
= data[i];
}
data = of_get_property(ctrl_pdev->dev.of_node,
"qcom,platform-lane-config", &len);
if ((!data) || (len != 45)) {
pr_err("%s:%d, Unable to read Phy lane configure settings",
__func__, __LINE__);
return -EINVAL;
}
for (i = 0; i < len; i++) {
pinfo->mipi.dsi_phy_db.lanecfg[i] =
data[i];
}
ctrl_pdata->shared_pdata.broadcast_enable = of_property_read_bool(
pan_node, "qcom,mdss-dsi-panel-broadcast-mode");
dynamic_fps = of_property_read_bool(pan_node,
"qcom,mdss-dsi-pan-enable-dynamic-fps");
if (dynamic_fps) {
pinfo->dynamic_fps = true;
data = of_get_property(pan_node,
"qcom,mdss-dsi-pan-fps-update", NULL);
if (data) {
if (!strcmp(data, "dfps_suspend_resume_mode")) {
pinfo->dfps_update =
DFPS_SUSPEND_RESUME_MODE;
pr_debug("%s: dfps mode: suspend/resume\n",
__func__);
} else if (!strcmp(data,
"dfps_immediate_clk_mode")) {
pinfo->dfps_update =
DFPS_IMMEDIATE_CLK_UPDATE_MODE;
pr_debug("%s: dfps mode: Immediate clk\n",
__func__);
} else if (!strcmp(data,
"dfps_immediate_porch_mode")) {
pinfo->dfps_update =
DFPS_IMMEDIATE_PORCH_UPDATE_MODE;
pr_debug("%s: dfps mode: Immediate porch\n",
__func__);
} else {
pr_debug("%s: dfps to default mode\n",
__func__);
pinfo->dfps_update =
DFPS_SUSPEND_RESUME_MODE;
pr_debug("%s: dfps mode: suspend/resume\n",
__func__);
}
} else {
pr_debug("%s: dfps update mode not configured\n",
__func__);
pinfo->dynamic_fps =
false;
pr_debug("%s: dynamic FPS disabled\n",
__func__);
}
pinfo->new_fps = pinfo->mipi.frame_rate;
}
pinfo->panel_max_fps = mdss_panel_get_framerate(pinfo);
pinfo->panel_max_vtotal = mdss_panel_get_vtotal(pinfo);
ctrl_pdata->disp_en_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-enable-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->disp_en_gpio))
pr_err("%s:%d, Disp_en gpio not specified\n",
__func__, __LINE__);
ctrl_pdata->disp_te_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-te-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->disp_te_gpio)) {
pr_err("%s:%d, Disp_te gpio not specified\n",
__func__, __LINE__);
} else {
int func;
rc = gpio_request(ctrl_pdata->disp_te_gpio, "disp_te");
if (rc) {
pr_err("request TE gpio failed, rc=%d\n",
rc);
return -ENODEV;
}
if (pinfo->type == MIPI_CMD_PANEL)
func = 1;
else
func = 0;
rc = gpio_tlmm_config(GPIO_CFG(
ctrl_pdata->disp_te_gpio, func,
GPIO_CFG_INPUT,
GPIO_CFG_PULL_DOWN,
GPIO_CFG_2MA),
GPIO_CFG_ENABLE);
if (rc) {
pr_err("%s: unable to config tlmm = %d\n",
__func__, ctrl_pdata->disp_te_gpio);
gpio_free(ctrl_pdata->disp_te_gpio);
return -ENODEV;
}
rc = gpio_direction_input(ctrl_pdata->disp_te_gpio);
if (rc) {
pr_err("set_direction for disp_en gpio failed, rc=%d\n",
rc);
gpio_free(ctrl_pdata->disp_te_gpio);
return -ENODEV;
}
pr_debug("%s: te_gpio=%d\n", __func__,
ctrl_pdata->disp_te_gpio);
}
ctrl_pdata->rst_gpio = of_get_named_gpio(ctrl_pdev->dev.of_node,
"qcom,platform-reset-gpio", 0);
if (!gpio_is_valid(ctrl_pdata->rst_gpio))
pr_err("%s:%d, reset gpio not specified\n",
__func__, __LINE__);
ctrl_pdata->mode_gpio = of_get_named_gpio(
ctrl_pdev->dev.of_node,
"qcom,platform-mode-gpio", 0);
if (pinfo->mode_gpio_state != MODE_GPIO_NOT_VALID) {
if (!gpio_is_valid(ctrl_pdata->mode_gpio))
pr_info("%s:%d, mode gpio not specified\n",
__func__, __LINE__);
}
if (ctrl_pdata->partial_mode_enabled) {
ctrl_pdata->mipi_d0_sel = of_get_named_gpio_flags(
ctrl_pdev->dev.of_node, "mmi,mipi-d0-sel", 0, &flags);
if (!gpio_is_valid(ctrl_pdata->mipi_d0_sel)) {
pr_info("%s:%d, mipi d0 sel gpio not specified\n",
__func__, __LINE__);
ctrl_pdata->partial_mode_enabled = false;
} else {
rc = gpio_request_one(ctrl_pdata->mipi_d0_sel, flags,
"mipi_d0_sel");
if (rc) {
pr_err("request mipi d0 sel gpio failed, rc=%d\n",
rc);
if (gpio_is_valid(ctrl_pdata->disp_te_gpio))
gpio_free(ctrl_pdata->disp_te_gpio);
ctrl_pdata->partial_mode_enabled = false;
return -ENODEV;
}
gpio_export(ctrl_pdata->mipi_d0_sel, 1);
}
}
if (mdss_dsi_clk_init(ctrl_pdev, ctrl_pdata)) {
pr_err("%s: unable to initialize Dsi ctrl clks\n", __func__);
return -EPERM;
}
if (mdss_dsi_retrieve_ctrl_resources(ctrl_pdev,
pinfo->pdest,
ctrl_pdata)) {
pr_err("%s: unable to get Dsi controller res\n", __func__);
return -EPERM;
}
ctrl_pdata->panel_data.event_handler = mdss_dsi_event_handler;
if (ctrl_pdata->bklt_ctrl == BL_PWM)
mdss_dsi_panel_pwm_cfg(ctrl_pdata);
mdss_dsi_ctrl_init(ctrl_pdata);
/*
* register in mdp driver
*/
ctrl_pdata->pclk_rate = mipi->dsi_pclk_rate;
ctrl_pdata->byte_clk_rate = pinfo->clk_rate / 8;
pr_debug("%s: pclk=%d, bclk=%d\n", __func__,
ctrl_pdata->pclk_rate, ctrl_pdata->byte_clk_rate);
ctrl_pdata->ctrl_state = CTRL_STATE_UNKNOWN;
if (pinfo->cont_splash_enabled) {
pinfo->panel_power_on = 1;
/*
* This call intends to call to gpio_request for display's
* reset gpio, because with cont_splash_enabled, there is
* no call to the mdss_dsi_panel_reset(1), but when the first
* suspend call, it will call mdss_dsi_panel_reset(0). This
* will call to gpio_free() for reset spio, and WARN() msg will
* be called because gpio_free() is called without gpio_request
*/
rc = mdss_dsi_panel_reset(&(ctrl_pdata->panel_data), 1);
if (rc) {
pr_err("%s: Panel reset on failed\n", __func__);
return rc;
}
rc = mdss_dsi_panel_power_on(&(ctrl_pdata->panel_data), 1);
if (rc) {
pr_err("%s: Panel power on failed\n", __func__);
return rc;
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
ctrl_pdata->ctrl_state |=
(CTRL_STATE_PANEL_INIT | CTRL_STATE_MDP_ACTIVE);
} else {
pinfo->panel_power_on = 0;
}
rc = mdss_register_panel(ctrl_pdev, &(ctrl_pdata->panel_data));
if (rc) {
pr_err("%s: unable to register MIPI DSI panel\n", __func__);
return rc;
}
if (pinfo->pdest == DISPLAY_1) {
mdss_debug_register_base("dsi0",
ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
ctrl_pdata->ndx = 0;
} else {
mdss_debug_register_base("dsi1",
ctrl_pdata->ctrl_base, ctrl_pdata->reg_size);
ctrl_pdata->ndx = 1;
}
pr_debug("%s: Panel data initialized\n", __func__);
return 0;
}
static int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
cmds_panel_data = pdata;
if (enable) {
if (ctrl_pdata->power_data.num_vreg > 0) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable regulators.rc=%d\n",
__func__, ret);
return ret;
}
/*
* A small delay is needed here after enabling
* all regulators and before issuing panel reset
*/
msleep(20);
} else {
if (mdss_dsi_use_vdd_supply) {
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_vreg,
100000);
if (ret < 0) {
pr_err("%s: vdd_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_io_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode
((ctrl_pdata->shared_pdata).vdda_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdda_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
msleep(20);
if (mdss_dsi_use_vdd_supply) {
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
msleep(20);
}
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdda_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
}
if (pdata->panel_info.panel_power_on == 0)
mdss_dsi_panel_reset(pdata, 1);
} else {
mdss_dsi_panel_reset(pdata, 0);
if (ctrl_pdata->power_data.num_vreg > 0) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable regs.rc=%d\n",
__func__, ret);
return ret;
}
} else {
if (mdss_dsi_use_vdd_supply) {
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
}
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdda_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
if (mdss_dsi_use_vdd_supply) {
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_io_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdda_vreg, 100);
if (ret < 0) {
pr_err("%s: vdda_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
}
return 0;
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
struct mdss_data_type *mdata = mdss_mdp_get_mdata();
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already on.\n", __func__, __LINE__);
return 0;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_info("%s+: ctrl=%p ndx=%d\n",
__func__, ctrl_pdata, ctrl_pdata->ndx);
pinfo = &pdata->panel_info;
mipi = &pdata->panel_info.mipi;
if (ctrl_pdata->partial_mode_enabled
&& !pdata->panel_info.panel_dead) {
mdss_dsi_ulps_config_sub(ctrl_pdata, 0, 1);
mdata->ulps = false;
pdata->panel_info.panel_power_on = 1;
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
} else {
if (ctrl_pdata->partial_mode_enabled
&& pdata->panel_info.panel_dead)
pr_warn("%s: Panel is dead, bring up DSI\n", __func__);
ret = mdss_dsi_panel_power_on(pdata, 1);
if (ret) {
pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret);
return ret;
}
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 1);
if (ret) {
pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
ret);
ret = mdss_dsi_panel_power_on(pdata, 0);
if (ret) {
pr_err("%s: Panel reset failed. rc=%d\n",
__func__, ret);
return ret;
}
pdata->panel_info.panel_power_on = 0;
return ret;
}
pdata->panel_info.panel_power_on = 1;
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
mdss_dsi_phy_init(pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_BUS_CLKS, 0);
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
__mdss_dsi_ctrl_setup(pdata);
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(pdata);
}
/*
* Issue hardware reset line after enabling the DSI clocks and data
* data lanes for LP11 init
*/
if (mipi->lp11_init)
mdss_dsi_panel_reset(pdata, 1);
if (mipi->init_delay)
usleep(mipi->init_delay);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
pr_info("%s-:\n", __func__);
return 0;
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int cur_power_state;
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
struct samsung_display_driver_data *vdd = NULL;
u32 reg_backup;
#endif
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
cur_power_state = pdata->panel_info.panel_power_state;
pr_info("%s+: ctrl=%p ndx=%d cur_power_state=%d\n", __func__,
ctrl_pdata, ctrl_pdata->ndx, cur_power_state);
pinfo = &pdata->panel_info;
mipi = &pdata->panel_info.mipi;
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
if (pinfo->esd_recovery.esd_irq_enable)
pinfo->esd_recovery.esd_irq_enable(true, false, (void *)pinfo);
#endif
if (mdss_dsi_is_panel_on_interactive(pdata)) {
pr_err("%s: panel already on\n", __func__);
goto end;
}
ret = mdss_dsi_panel_power_ctrl(pdata, MDSS_PANEL_POWER_ON);
if (ret) {
pr_err("%s:Panel power on failed. rc=%d\n", __func__, ret);
return ret;
}
if (cur_power_state != MDSS_PANEL_POWER_OFF) {
pr_debug("%s: dsi_on from panel low power state\n", __func__);
goto end;
}
/*
* Enable DSI clocks.
* This is also enable the DSI core power block and reset/setup
* DSI phy
*/
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 1);
mdss_dsi_sw_reset(ctrl_pdata, true);
/*
* Issue hardware reset line after enabling the DSI clocks and data
* data lanes for LP11 init
*/
if (mipi->lp11_init) {
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
vdd = check_valid_ctrl(ctrl_pdata);
if (!IS_ERR_OR_NULL(vdd) && vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init) {
/* LP11 */
reg_backup = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, 0x1F << 16);
wmb();
if (mipi->init_delay)
usleep(mipi->init_delay);
}
#endif
mdss_dsi_panel_reset(pdata, 1);
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
/* LP11 Restore */
if (!IS_ERR_OR_NULL(vdd) && vdd->dtsi_data[ctrl_pdata->ndx].samsung_lp11_init)
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac,
reg_backup);
#endif
}
if (mipi->init_delay)
usleep(mipi->init_delay);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, DSI_ALL_CLKS, 0);
pinfo->dsi_on_status = true;
end:
pr_err("%s-:\n", __func__);
return 0;
}
int mdss_dsi_panel_power_on(struct mdss_panel_data *pdata, int enable)
{
int ret;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s: enable=%d\n", __func__, enable);
// Z OLED power on start
if (enable) {
if (ctrl_pdata->power_data.num_vreg > 0) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable regulators.rc=%d\n",
__func__, ret);
return ret;
}
/*
* A small delay is needed here after enabling
* all regulators and before issuing panel reset
*/
msleep(20);
} else {
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_io_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdda_vreg, 100000);
if (ret < 0) {
pr_err("%s: vdda_vreg set opt mode failed.\n",
__func__);
return ret;
}
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)){
gpio_set_value((ctrl_pdata->disp_en_gpio), 1);
msleep(1);
} else
pr_err("%s:%d, disp_en_gpio is not valid\n",
__func__, __LINE__);
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
ret = regulator_enable(
(ctrl_pdata->shared_pdata).vdda_vreg);
if (ret) {
pr_err("%s: Failed to enable regulator.\n",
__func__);
return ret;
}
msleep(10);
}
// Z OLED power off start
} else {
msleep(20);
mdss_dsi_panel_reset(pdata, 0);
msleep(20);
if (ctrl_pdata->power_data.num_vreg > 0) {
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 0);
if (ret) {
pr_err("%s: Failed to disable regs.rc=%d\n",
__func__, ret);
return ret;
}
} else {
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdda_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
#if 0
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_io_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
return ret;
}
#endif
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)){
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);
msleep(1);
} else
pr_err("%s:%d, disp_en_gpio is not valid\n",
__func__, __LINE__);
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdd_io_vreg, 100);
if (ret < 0) {
pr_err("%s: vdd_io_vreg set opt mode failed.\n",
__func__);
return ret;
}
ret = regulator_set_optimum_mode(
(ctrl_pdata->shared_pdata).vdda_vreg, 100);
if (ret < 0) {
pr_err("%s: vdda_vreg set opt mode failed.\n",
__func__);
return ret;
}
}
}
pr_info("[Zee][OLED] mdss_dsi_panel_power %s\n", enable ? "on" : "off");
return 0;
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
u32 clk_rate;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
u32 hbp, hfp, vbp, vfp, hspw, vspw, width, height;
u32 ystride, bpp, data, dst_bpp;
u32 dummy_xres, dummy_yres;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
u32 hsync_period, vsync_period;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already on.\n", __func__, __LINE__);
return 0;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_debug("%s+: ctrl=%p ndx=%d\n",
__func__, ctrl_pdata, ctrl_pdata->ndx);
pinfo = &pdata->panel_info;
ret = msm_dss_enable_vreg(ctrl_pdata->power_data.vreg_config,
ctrl_pdata->power_data.num_vreg, 1);
if (ret) {
pr_err("%s:Failed to enable vregs. rc=%d\n", __func__, ret);
return ret;
}
pdata->panel_info.panel_power_on = 1;
if (!pdata->panel_info.mipi.lp11_init)
mdss_dsi_panel_reset(pdata, 1);
ret = mdss_dsi_bus_clk_start(ctrl_pdata);
if (ret) {
pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
ret);
mdss_dsi_panel_power_on(pdata, 0);
pdata->panel_info.panel_power_on = 0;
return ret;
}
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
mdss_dsi_phy_init(pdata);
mdss_dsi_bus_clk_stop(ctrl_pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, 1);
clk_rate = pdata->panel_info.clk_rate;
clk_rate = min(clk_rate, pdata->panel_info.clk_max);
dst_bpp = pdata->panel_info.fbc.enabled ?
(pdata->panel_info.fbc.target_bpp) : (pinfo->bpp);
hbp = mult_frac(pdata->panel_info.lcdc.h_back_porch, dst_bpp,
pdata->panel_info.bpp);
hfp = mult_frac(pdata->panel_info.lcdc.h_front_porch, dst_bpp,
pdata->panel_info.bpp);
vbp = mult_frac(pdata->panel_info.lcdc.v_back_porch, dst_bpp,
pdata->panel_info.bpp);
vfp = mult_frac(pdata->panel_info.lcdc.v_front_porch, dst_bpp,
pdata->panel_info.bpp);
hspw = mult_frac(pdata->panel_info.lcdc.h_pulse_width, dst_bpp,
pdata->panel_info.bpp);
vspw = pdata->panel_info.lcdc.v_pulse_width;
width = mult_frac(pdata->panel_info.xres, dst_bpp,
pdata->panel_info.bpp);
height = pdata->panel_info.yres;
if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
dummy_xres = pdata->panel_info.lcdc.xres_pad;
dummy_yres = pdata->panel_info.lcdc.yres_pad;
}
vsync_period = vspw + vbp + height + dummy_yres + vfp;
hsync_period = hspw + hbp + width + dummy_xres + hfp;
mipi = &pdata->panel_info.mipi;
if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x24,
((hspw + hbp + width + dummy_xres) << 16 |
(hspw + hbp)));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x28,
((vspw + vbp + height + dummy_yres) << 16 |
(vspw + vbp)));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
((vsync_period - 1) << 16)
| (hsync_period - 1));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x30, (hspw << 16));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x34, 0);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x38, (vspw << 16));
} else { /* command mode */
if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB888)
bpp = 3;
else if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB666)
bpp = 3;
else if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB565)
bpp = 2;
else
bpp = 3; /* Default format set to RGB888 */
ystride = width * bpp + 1;
/* DSI_COMMAND_MODE_MDP_STREAM_CTRL */
data = (ystride << 16) | (mipi->vc << 8) | DTYPE_DCS_LWRITE;
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x60, data);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x58, data);
/* DSI_COMMAND_MODE_MDP_STREAM_TOTAL */
data = height << 16 | width;
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x64, data);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x5C, data);
}
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(mipi, pdata);
/*
* Issue hardware reset line after enabling the DSI clocks and data
* data lanes for LP11 init
*/
if (pdata->panel_info.mipi.lp11_init)
mdss_dsi_panel_reset(pdata, 1);
if (pdata->panel_info.mipi.init_delay)
usleep(pdata->panel_info.mipi.init_delay);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, 0);
pr_debug("%s-:\n", __func__);
return 0;
}
static int mdss_dsi_panel_power_off(struct mdss_panel_data *pdata)
{
int ret = 0;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
int i = 0;
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
bool dsi_panel_pm_ctrl = true;
if (alpm_status_func(CHECK_CURRENT_STATUS)) {
dsi_panel_pm_ctrl = false;
pr_info("[ALPM_DEBUG] dsi_panel_pm_ctrl : %d\n", dsi_panel_pm_ctrl);
}
#endif
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
ret = -EINVAL;
goto end;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
#if !defined(CONFIG_SEC_KCCAT6_PROJECT)
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
if(dsi_panel_pm_ctrl)
#endif
{
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
}
}
#endif
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
if (dsi_panel_pm_ctrl && gpio_is_valid(ctrl_pdata->disp_en_gpio)){
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);/* VDDR :1.5*/
pr_info("%s: disp_en_gpio set low \n", __func__);
}
#else
if (gpio_is_valid(ctrl_pdata->disp_en_gpio)){
gpio_set_value((ctrl_pdata->disp_en_gpio), 0);/* VDDR :1.5*/
pr_info("%s: disp_en_gpio set low \n", __func__);
}
#endif
#if defined(CONFIG_SEC_KCCAT6_PROJECT)
usleep_range(1000,1000);
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
if(dsi_panel_pm_ctrl)
#endif
{
ret = regulator_disable(
(ctrl_pdata->shared_pdata).vdd_vreg);
if (ret) {
pr_err("%s: Failed to disable regulator.\n",
__func__);
}
}
#endif
usleep_range(4000, 4000);
/*
#if defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_S6E3HA2_CMD_WQHD_PT_PANEL) || defined(CONFIG_FB_MSM_MIPI_SAMSUNG_OCTA_S6E3HA2_CMD_WQXGA_PT_PANEL)
ctrl_pdata->panel_reset(pdata, 0);
#endif
*/
ret = mdss_dsi_panel_reset(pdata, 0);
if (ret) {
pr_warn("%s: Panel reset failed. rc=%d\n", __func__, ret);
ret = 0;
}
for (i = DSI_MAX_PM - 1; i >= 0; i--) {
/*
* Core power module will be disabled when the
* clocks are disabled
*/
if (DSI_CORE_PM == i)
continue;
#if defined(CONFIG_FB_MSM_MDSS_SAMSUNG)
if ((DSI_PANEL_PM == i) && !dsi_panel_pm_ctrl)
continue;
#endif
ret = msm_dss_enable_vreg(
ctrl_pdata->power_data[i].vreg_config,
ctrl_pdata->power_data[i].num_vreg, 0);
if (ret)
pr_err("%s: failed to disable vregs for %s\n",
__func__, __mdss_dsi_pm_name(i));
}
usleep_range(4000, 4000);
end:
return ret;
}
int mdss_dsi_on(struct mdss_panel_data *pdata)
{
int ret = 0;
u32 clk_rate;
struct mdss_panel_info *pinfo;
struct mipi_panel_info *mipi;
u32 hbp, hfp, vbp, vfp, hspw, vspw, width, height;
u32 ystride, bpp, data, dst_bpp;
u32 dummy_xres, dummy_yres;
struct mdss_dsi_ctrl_pdata *ctrl_pdata = NULL;
if (pdata == NULL) {
pr_err("%s: Invalid input data\n", __func__);
return -EINVAL;
}
if (pdata->panel_info.panel_power_on) {
pr_warn("%s:%d Panel already on.\n", __func__, __LINE__);
return 0;
}
ctrl_pdata = container_of(pdata, struct mdss_dsi_ctrl_pdata,
panel_data);
pr_info("%s+: ctrl=%p ndx=%d\n",
__func__, ctrl_pdata, ctrl_pdata->ndx);
pinfo = &pdata->panel_info;
ret = mdss_dsi_panel_power_on(pdata, 1);
if (ret) {
pr_err("%s: Panel power on failed\n", __func__);
return ret;
}
pdata->panel_info.panel_power_on = 1;
ret = mdss_dsi_enable_bus_clocks(ctrl_pdata);
if (ret) {
pr_err("%s: failed to enable bus clocks. rc=%d\n", __func__,
ret);
mdss_dsi_panel_power_on(pdata, 0);
return ret;
}
mdss_dsi_phy_sw_reset((ctrl_pdata->ctrl_base));
mdss_dsi_phy_init(pdata);
mdss_dsi_disable_bus_clocks(ctrl_pdata);
mdss_dsi_clk_ctrl(ctrl_pdata, 1);
clk_rate = pdata->panel_info.clk_rate;
clk_rate = min(clk_rate, pdata->panel_info.clk_max);
dst_bpp = pdata->panel_info.fbc.enabled ?
(pdata->panel_info.fbc.target_bpp) : (pinfo->bpp);
hbp = mult_frac(pdata->panel_info.lcdc.h_back_porch, dst_bpp,
pdata->panel_info.bpp);
hfp = mult_frac(pdata->panel_info.lcdc.h_front_porch, dst_bpp,
pdata->panel_info.bpp);
vbp = mult_frac(pdata->panel_info.lcdc.v_back_porch, dst_bpp,
pdata->panel_info.bpp);
vfp = mult_frac(pdata->panel_info.lcdc.v_front_porch, dst_bpp,
pdata->panel_info.bpp);
hspw = mult_frac(pdata->panel_info.lcdc.h_pulse_width, dst_bpp,
pdata->panel_info.bpp);
vspw = pdata->panel_info.lcdc.v_pulse_width;
width = mult_frac(pdata->panel_info.xres, dst_bpp,
pdata->panel_info.bpp);
#ifdef CONFIG_OLED_SUPPORT
height = pdata->panel_info.yres + pdata->panel_info.lcdc.yres_margin;
#else
height = pdata->panel_info.yres;
#endif
mipi = &pdata->panel_info.mipi;
if (pdata->panel_info.type == MIPI_VIDEO_PANEL) {
dummy_xres = pdata->panel_info.lcdc.xres_pad;
dummy_yres = pdata->panel_info.lcdc.yres_pad;
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x24,
((hspw + hbp + width + dummy_xres) << 16 |
(hspw + hbp)));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x28,
((vspw + vbp + height + dummy_yres) << 16 |
(vspw + vbp)));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x2C,
(vspw + vbp + height + dummy_yres +
vfp - 1) << 16 | (hspw + hbp +
width + dummy_xres + hfp - 1));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x30, (hspw << 16));
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x34, 0);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x38, (vspw << 16));
} else { /* command mode */
if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB888)
bpp = 3;
else if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB666)
bpp = 3;
else if (mipi->dst_format == DSI_CMD_DST_FORMAT_RGB565)
bpp = 2;
else
bpp = 3; /* Default format set to RGB888 */
ystride = width * bpp + 1;
/* DSI_COMMAND_MODE_MDP_STREAM_CTRL */
data = (ystride << 16) | (mipi->vc << 8) | DTYPE_DCS_LWRITE;
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x60, data);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x58, data);
/* DSI_COMMAND_MODE_MDP_STREAM_TOTAL */
data = height << 16 | width;
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x64, data);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0x5C, data);
}
mdss_dsi_sw_reset(pdata);
mdss_dsi_host_init(mipi, pdata);
if (mipi->force_clk_lane_hs) {
u32 tmp;
tmp = MIPI_INP((ctrl_pdata->ctrl_base) + 0xac);
tmp |= (1<<28);
MIPI_OUTP((ctrl_pdata->ctrl_base) + 0xac, tmp);
wmb();
}
#if defined(CONFIG_MACH_LGE)
#if defined(CONFIG_OLED_SUPPORT)
msleep(10);
mdss_dsi_panel_reset(pdata, 1);
msleep(20);
#else
/* LGE_CHANGE_S
* power sequence for LGD_FHD panel
* 2013-04-05, [email protected]
*/
#if defined (CONFIG_MACH_MSM8974_VU3_KR)
msleep(40);
#else
msleep(1);
#endif
mdss_dsi_panel_reset(pdata, 1);
#endif
#endif
if (pdata->panel_info.type == MIPI_CMD_PANEL)
mdss_dsi_clk_ctrl(ctrl_pdata, 0);
pr_debug("%s-:\n", __func__);
return 0;
}
