static void tegra132_memrange_init(struct memranges *map) { uint64_t start,end; const unsigned long devmem = MA_DEV | MA_S | MA_RW; const unsigned long cachedmem = MA_MEM | MA_NS | MA_RW; const unsigned long secure_mem = MA_MEM | MA_S | MA_RW; uintptr_t tz_base_mib; size_t tz_size_mib; memranges_init_empty(map); memory_in_range_below_4gb(&start,&end); /* Device memory below DRAM */ memranges_insert(map, 0, start * MiB, devmem); /* DRAM */ memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem); memory_in_range_above_4gb(&start,&end); memranges_insert(map, start * MiB, (end-start) * MiB, cachedmem); /* SRAM */ memranges_insert(map, TEGRA_SRAM_BASE, TEGRA_SRAM_SIZE, cachedmem); /* Add TZ carveout. */ carveout_range(CARVEOUT_TZ, &tz_base_mib, &tz_size_mib); memranges_insert(map, tz_base_mib * MiB, tz_size_mib * MiB, secure_mem); }
void fsp_memory_init(bool s3wake) { struct fsp_header hdr; enum cb_err status; struct cbfsf file_desc; struct region_device file_data; const char *name = CONFIG_FSP_M_CBFS; struct memranges memmap; struct range_entry freeranges[2]; if (CONFIG(ELOG_BOOT_COUNT) && !s3wake) boot_count_increment(); if (cbfs_boot_locate(&file_desc, name, NULL)) { printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name); die("FSPM not available!\n"); } cbfs_file_data(&file_data, &file_desc); /* Build up memory map of romstage address space including CAR. */ memranges_init_empty(&memmap, &freeranges[0], ARRAY_SIZE(freeranges)); memranges_insert(&memmap, (uintptr_t)_car_region_start, _car_relocatable_data_end - _car_region_start, 0); memranges_insert(&memmap, (uintptr_t)_program, REGION_SIZE(program), 0); if (!CONFIG(FSP_M_XIP)) status = load_fspm_mem(&hdr, &file_data, &memmap); else status = load_fspm_xip(&hdr, &file_data); if (status != CB_SUCCESS) die("Loading FSPM failed!\n"); /* Signal that FSP component has been loaded. */ prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL); do_fsp_memory_init(&hdr, s3wake, &memmap); }