int main()
{
init_platform();
XIOModule_Initialize(&gpo, XPAR_IOMODULE_0_DEVICE_ID); // Initialize the GPO module
microblaze_register_handler(XIOModule_DeviceInterruptHandler,
XPAR_IOMODULE_0_DEVICE_ID); // register the interrupt handler
XIOModule_Start(&gpo); // start the GPO module
XIOModule_Connect(&gpo, XIN_IOMODULE_FIT_1_INTERRUPT_INTR, timerTick,
NULL); // register timerTick() as our interrupt handler
XIOModule_Enable(&gpo, XIN_IOMODULE_FIT_1_INTERRUPT_INTR); // enable the interrupt
microblaze_enable_interrupts(); // enable global interrupts
u8 leds = 0;
while (1){
// write the LED value to port 1 (you can have up to 4 ports)
XIOModule_DiscreteWrite(&gpo, 1, leds++);
xil_printf("%d", leds);
xil_printf(",");
delay(500); // delay one half second
}
return 0;
}
// Enable interrupts by using a simple interrupt routine. If more complex
// interrupt routine is needed, you must create your own interrupt handler routine.
void sound_initInterupts()
{
microblaze_register_handler(sound_interrupt_handler, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR, XPAR_AXI_AC97_0_INTERRUPT_MASK);
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
}
void init_interrupt_controller()
{
XIntc *intcp;
intcp = &intc;
XIntc_Initialize(intcp, XPAR_INTC_0_DEVICE_ID);
XIntc_Start(intcp, XIN_REAL_MODE);
// Démarrage du gestionnaire d'interruption
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_register_handler((XInterruptHandler)XIntc_InterruptHandler, intcp);
// Configuration spécifique au core présent dans le système
init_network_timer_int();
init_ps2_int();
init_sound_int();
init_display_timer_int();
XIntc_Enable(intcp, XPAR_XPS_INTC_0_XPS_TIMER_0_INTERRUPT_INTR);
XIntc_Enable(intcp, XPAR_XPS_INTC_0_PS2CORE_0_PS2_INTERRUPT_INTR);
XIntc_Enable(intcp, XPAR_XPS_INTC_0_PLB_AC97_0_INTERRUPT_INTR);
XIntc_Enable(intcp, XPAR_INTC_0_LLTEMAC_0_VEC_ID);
//XIntc_SetIntrSvcOption(XPAR_INTC_0_BASEADDR,/*XIN_SVC_ALL_ISRS_OPTION*/XIN_SVC_SGL_ISR_OPTION);
}
void Initialize()
{
XGpio_Initialize(&Dips, XPAR_DIP_DEVICE_ID);
XGpio_SetDataDirection(&Dips, 1, 0xff);
XGpio_Initialize(&Btns, XPAR_BUTTON_DEVICE_ID);
XGpio_SetDataDirection(&Btns, 1, 0xff);
XIntc_Initialize(&intCtrl, XPAR_AXI_INTC_0_DEVICE_ID);
XGpio_InterruptEnable(&Btns, 1);
XGpio_InterruptGlobalEnable(&Btns);
XGpio_InterruptEnable(&Dips, 1);
XGpio_InterruptGlobalEnable(&Dips);
XIntc_Enable(&intCtrl, XPAR_AXI_INTC_0_BUTTON_IP2INTC_IRPT_INTR);
XIntc_Enable(&intCtrl, XPAR_AXI_INTC_0_DIP_IP2INTC_IRPT_INTR);
XIntc_Connect(&intCtrl, XPAR_AXI_INTC_0_BUTTON_IP2INTC_IRPT_INTR,
(XInterruptHandler)PushBtnHandler, (void *)0);
XIntc_Connect(&intCtrl, XPAR_AXI_INTC_0_DIP_IP2INTC_IRPT_INTR,
(XInterruptHandler)SwitchHandler,(void *)0);
microblaze_enable_interrupts();
microblaze_register_handler((XInterruptHandler)XIntc_InterruptHandler, (void *)&intCtrl);
XIntc_Start(&intCtrl, XIN_REAL_MODE);
}
static int
emac_setup_intr_system(XIntc *xintc_instance,
XEmac *xemac_instance,
Xuint16 xemac_device_id,
Xuint16 xemac_intr_id)
{
XStatus status;
/*
* Register an interrupt handler for the device interrupts with
* the interrupt controller.
*/
status = XIntc_Connect(xintc_instance,
xemac_intr_id,
(XInterruptHandler)XEmac_IntrHandlerFifo,
xemac_instance);
if (status != XST_SUCCESS) {
mbfw_printf("MBFW_ERROR: XIntc_Connect() failed with status 0x%x \r\n", status);
return XST_FAILURE;
}
/*
* Enable the interrupt for the Emac in the interrupt controller.
*/
XIntc_Enable(xintc_instance, xemac_intr_id);
microblaze_register_handler((XInterruptHandler)XIntc_InterruptHandler,
xintc_instance);
return XST_SUCCESS;
}
void platform_setup_interrupts()
{
XIntc *intcp;
intcp = &intc;
XIntc_Initialize(intcp, XPAR_XPS_INTC_0_DEVICE_ID);
XIntc_Start(intcp, XIN_REAL_MODE);
/* Start the interrupt controller */
XIntc_MasterEnable(XPAR_XPS_INTC_0_BASEADDR);
#ifdef __PPC__
Xil_ExceptionInit();
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
(XExceptionHandler)XIntc_DeviceInterruptHandler,
(void*) XPAR_XPS_INTC_0_DEVICE_ID);
#elif __MICROBLAZE__
microblaze_register_handler((XInterruptHandler)XIntc_InterruptHandler, intcp);
#endif
platform_setup_timer();
#ifdef XPAR_ETHERNET_MAC_IP2INTC_IRPT_MASK
/* Enable timer and EMAC interrupts in the interrupt controller */
XIntc_EnableIntr(XPAR_XPS_INTC_0_BASEADDR,
#ifdef __MICROBLAZE__
PLATFORM_TIMER_INTERRUPT_MASK |
#endif
XPAR_ETHERNET_MAC_IP2INTC_IRPT_MASK);
#endif
}
void initInterrupts()
{
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK
| XPAR_DMA_CONTROLLER_0_INTERRUPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
}
void interrupts_init() {
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
// Enable interrupts from FIT, GPIO block, and AC97
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK
| XPAR_AXI_AC97_0_INTERRUPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
}
void initButtonInterrupt(XIntc controller) {
btnIntCtrl = controller;
xil_printf("\r\nInitialising button interrupts...");
lBtnStateOld = 0x00000000;
XGpio_Initialize(&pshBtns, BTNS_DEVICE_ID);
XIntc_Connect(&controller, BTNS_IRPT_ID, PushBtnHandler, &pshBtns);
XIntc_Enable(&controller, BTNS_IRPT_ID);
microblaze_register_handler(XIntc_DeviceInterruptHandler, INTC_DEVICE_ID);
microblaze_enable_interrupts();
XIntc_Start(&controller, XIN_REAL_MODE);
xil_printf("done");
}
int btn_method(){
XStatus Status= XST_SUCCESS;
if(btn_initialize()!=XST_SUCCESS)
return XST_FAILURE;
Status = XIntc_Initialize(&intCtrl_Btn, INTC_DEVICE_ID);
if ( Status != XST_SUCCESS )
{
if( Status == XST_DEVICE_NOT_FOUND )
{
xil_printf("Interrupt Controller: XST_DEVICE_NOT_FOUND...\r\n");
}
else
{
xil_printf("Interrupt Controller: A different error from XST_DEVICE_NOT_FOUND...\r\n");
}
xil_printf("Interrupt controller: driver failed to be initialized...\r\n");
return XST_FAILURE;
}
xil_printf("Interrupt controller: driver initialized!\r\n");
Status = XIntc_Connect(&intCtrl_Btn, BTN_IR_ID, btn_handler, &Btn);
if ( Status != XST_SUCCESS )
{
xil_printf("Failed to connect the application handlers to the interrupt controller...\r\n");
return XST_FAILURE;
}
xil_printf("Connected to Interrupt Controller!\r\n");
XIntc_Enable(&intCtrl_Btn, BTN_IR_ID);
microblaze_register_handler((XInterruptHandler)XIntc_DeviceInterruptHandler,INTC_DEVICE_ID);//Because it is 0?
microblaze_enable_interrupts();
XGpio_InterruptEnable(&Btn,BTN_IR_MASK);
XGpio_InterruptGlobalEnable(&Btn);
Status = XIntc_Start(&intCtrl_Btn, XIN_REAL_MODE);
if (Status != XST_SUCCESS) {
xil_printf("Failed to start the interrupt controller...\r\n");
return XST_FAILURE;
}
print("Interrupt controller Started!\n\r ");
return XST_SUCCESS;
}
void start_intc(void) {
// Setting Interupt controller
xil_printf("\r\nSetting up Interrupt Controller:\r\n");
//Initialize exception handling
xil_printf(" Initialize exception handling\r\n");
microblaze_enable_exceptions();
// Register external interrupt handler
xil_printf(" Register external interrupt handler\r\n");
microblaze_register_handler((XInterruptHandler)XIntc_DeviceInterruptHandler,
(void *)XPAR_XPS_INTC_0_DEVICE_ID);
// // Register UART interrupt handler
// // xil_printf(" Register UART interrupt handler\r\n");
// XIntc_RegisterHandler(XPAR_INTC_0_BASEADDR,XPAR_INTC_0_RS232_INTERRUPT_INTR,
// (XInterruptHandler)uart_int_handler,(void *)XPAR_RS232_BASEADDR);
// Register OPB_FX2 interrupt handler
xil_printf(" Register I2C_SLAVE interrupt handler\r\n");
XIntc_RegisterHandler(XPAR_INTC_0_BASEADDR,XPAR_XPS_INTC_0_XPS_I2C_SLAVE_0_IP2INTC_IRPT_INTR,
(XInterruptHandler)i2c_slave_int_handler,(void *)XPAR_XPS_I2C_SLAVE_0_BASEADDR);
// Enable timer interrupts
// // xil_printf(" Register OPB_TIMER interrupt handler\r\n");
// XIntc_mMasterEnable(XPAR_OPB_TIMER_0_BASEADDR); // Start the interrupt controller
// XIntc_SetIntrSvcOption( XPAR_INTC_0_BASEADDR, XIN_SVC_ALL_ISRS_OPTION);
// Enable uart interrupt in the interrupt controller
xil_printf(" Enable interrupts in the interrupt controller\r\n");
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
// XPAR_RS232_INTERRUPT_MASK |
// XPAR_XPS_TIMER_0_INTERRUPT_MASK |
// XPAR_OPB_FX2_0_INTERRUPT_MASK |
XPAR_XPS_I2C_SLAVE_0_IP2INTC_IRPT_MASK);
xil_printf(" Start the interrupt controller\r\n");
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
// Enable uart interrupts
// // xil_printf(" Enable uart interrupt in Uartlite\r\n");
// XUartLite_mEnableIntr(XPAR_RS232_BASEADDR);
// xil_printf(" Enable all interrupts in XPS_FX2\r\n");
// Enable MB interrupts
// xil_printf(" Enable MB interrupts\r\n");
microblaze_enable_interrupts();
}
int interruptManager (unsigned int * framePointer0) {
init_platform();
// Initialize the GPIO peripherals.
int success;
// Used for CPU utilization. Uncomment if desired
// XTmrCtr_Initialize(instPtr, 0);
success = XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
// Reset the XAC97 Chip
XAC97_HardReset(XPAR_AXI_AC97_0_BASEADDR);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XAC97_mSetControl(AC97_ExtendedAudioStat, AC97_EXTENDED_AUDIO_CONTROL_VRA);
setVolLevel(AC97_VOL_MAX);
clearAllSounds();
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK | XPAR_AXI_AC97_0_INTERRUPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
// Uncomment for CPU utilization stats
/*XTmrCtr Timer;
XTmrCtr *instPtr = &Timer;
XTmrCtr_Initialize(instPtr, 0);
XTmrCtr_Start(instPtr, 0);*/
while(!isEndOfGame()); // Program never ends.
// Uncomment for CPU utilization stats
/*XTmrCtr_Stop(instPtr, 0);
int val = (int) XTmrCtr_GetValue(instPtr, 0);
xil_printf("%d\n\r", val);*/
clearAllSounds();
XAC97_ClearFifos(XPAR_AXI_AC97_0_BASEADDR);
drawGameOver();
cleanup_platform();
return 0;
}
void initInterrupts()
{
// Initialize the GPIO peripherals. NOTE: We wait to do this till after the HDMI to ensure that nothing happens before the HDMI is enabled.
XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
XGpio_Initialize(&gpswitches, XPAR_SLIDE_SWITCHES_8BITS_DEVICE_ID);
XGpio_SetDataDirection(&gpswitches, 1, 0x000000FF);
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_PIT_0_INTERRUPT_MASK
| XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK
| XPAR_AXI_AC97_0_INTERRUPT_MASK
| XPAR_PS2CTRL_0_INTERRUPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
}
int main (void) {
init_platform();
// Initialize the GPIO peripherals.
XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
pit_init();
pit_load_value(1000000); // init to 10 ms
pit_enable_load();
pit_enable_interrupts();
pit_enable_count();
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_PIT_0_MYINTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK));
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
// Tell stdin that it gets zero! none! (as far as buffering goes)
setvbuf(stdin, NULL, _IONBF, 0);
while(1){
// blocking call: wait until a character is present
char input = getchar();
// Handle the UART control of game
uartControl_handle(input);
}
cleanup_platform();
return 0;
}
void interrupts_init() {
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
// Enable interrupts from FIT, GPIO block, and AC97
// XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
// (XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK
// | XPAR_AXI_AC97_0_INTERRUPT_MASK));
// Enable interrupts from the PIT, GPIO block, and AC97
XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_PIT_0_MYINTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK
| XPAR_AXI_AC97_0_INTERRUPT_MASK | XPAR_DMA_CTRL_0_INTERRUPT_MASK));
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
pit_load_value(1000000);
pit_enable_load();
pit_enable_count();
pit_enable_interrupts();
microblaze_enable_interrupts();
}
int main (void) {
int old_count = 0;
gpio_init();
XGpio_DiscreteWrite(&led,1,0);
XGpio_DiscreteWrite(&ledPush,1,0x1);
xil_printf("-- Entering main() --\r\n");
XTmrCtr_Initialize(&XTC, XPAR_OPB_TIMER_1_DEVICE_ID );
XTmrCtr_SetOptions(&XTC, 0, XTC_DOWN_COUNT_OPTION | XTC_INT_MODE_OPTION |
XTC_AUTO_RELOAD_OPTION );
XTmrCtr_SetHandler(&XTC, TimerCounterHandler, &XTC);
microblaze_register_handler( (XInterruptHandler)XTmrCtr_InterruptHandler,
&XTC );
microblaze_enable_interrupts();
XTmrCtr_SetResetValue ( &XTC, 0, 50*1000000L );
XTmrCtr_Start( &XTC, 0 );
XGpio_DiscreteWrite(&ledPush,1,0x3);
while(1) {
if (gpio_check()) break;
if ( old_count != intr_count ) {
xil_printf(" TmrCtr update %d\r\n", intr_count );
XGpio_DiscreteWrite(&led,1,3);
XGpio_DiscreteWrite(&ledPush,1,0x10 | (intr_count&0xF));
old_count = intr_count;
}
}
if ( XTmrCtr_IsExpired( &XTC, 0 ) ) {
xil_printf(" TmrCtr Timed out\r\n" );
} else {
xil_printf(" TmrCtr un-Timeout\r\n" );
}
XTmrCtr_Stop(&XTC, 0 );
microblaze_disable_interrupts();
XGpio_DiscreteWrite(&ledPush,1,0x10);
xil_printf("-- Exiting main() --\r\n");
return 0;
}
int main (void) {
init_platform();
// Initialize the GPIO peripherals.
int success = XGpio_Initialize(&gpPB, XPAR_PUSH_BUTTONS_5BITS_DEVICE_ID);
// Set the push button peripheral to be inputs.
XGpio_SetDataDirection(&gpPB, 1, 0x0000001F);
// Enable the global GPIO interrupt for push buttons.
XGpio_InterruptGlobalEnable(&gpPB);
// Enable all interrupts in the push button peripheral.
XGpio_InterruptEnable(&gpPB, 0xFFFFFFFF);
microblaze_register_handler(interrupt_handler_dispatcher, NULL);
custom_XIntc_EnableIntr(XPAR_INTC_0_BASEADDR,
(XPAR_FIT_TIMER_0_INTERRUPT_MASK | XPAR_PUSH_BUTTONS_5BITS_IP2INTC_IRPT_MASK));
custom_XIntc_MasterEnable(XPAR_INTC_0_BASEADDR);
microblaze_enable_interrupts();
while(1); // Program never ends.
cleanup_platform();
return 0;
}
int main()
{
//init_platform();
static XGpio pshBtns;
static XIntc intCtrl;
Xuint32 Count_Samples;
Xuint32 Sample_L;
Xuint32 Sample_R;
lBtnStateOld = 0x00000000;
fsRunAction = 0;
/*
*Initialize the driver structs for the Push button and interrupt cores.
*This allows the API functions to be used with these cores.
*/
XGpio_Initialize(&pshBtns, BTNS_DEVICE_ID);
XIntc_Initialize(&intCtrl, INTC_DEVICE_ID);
/*
* Connect the function PushBtnHandler to the interrupt controller so that
* it is called whenever the Push button GPIO core signals an interrupt.
*/
XIntc_Connect(&intCtrl, BTNS_IRPT_ID, PushBtnHandler, &pshBtns);
/*
* Enable interrupts at the interrupt controller
*/
XIntc_Enable(&intCtrl, BTNS_IRPT_ID);
/*
* Register the interrupt controller with the microblaze
* processor and then start the Interrupt controller so that it begins
* listening to the interrupt core for triggers.
*/
microblaze_register_handler(XIntc_DeviceInterruptHandler, INTC_DEVICE_ID);
microblaze_enable_interrupts();
XIntc_Start(&intCtrl, XIN_REAL_MODE);
/*
* Enable the push button GPIO core to begin sending interrupts to the
* interrupt controller in response to changes in the button states
*/
XGpio_InterruptEnable(&pshBtns, lBtnChannel);
XGpio_InterruptGlobalEnable(&pshBtns);
/*
* Wait for AC97 to become ready
*/
while (!(AC97_Link_Is_Ready (AC97_BASEADDR)));
/*
* Set TAG to configure codec
*/
AC97_Set_Tag_And_Id (AC97_BASEADDR, 0xF800);
/*
* Enable audio output and set volume
*/
AC97_Unmute (AC97_BASEADDR, AC97_MASTER_VOLUME_OFFSET);
AC97_Unmute (AC97_BASEADDR, AC97_HEADPHONE_VOLUME_OFFSET);
AC97_Unmute (AC97_BASEADDR, AC97_PCM_OUT_VOLUME_OFFSET);
AC97_Set_Volume (AC97_BASEADDR, AC97_MASTER_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MAX);
AC97_Set_Volume (AC97_BASEADDR, AC97_HEADPHONE_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MIN);
AC97_Set_Volume (AC97_BASEADDR, AC97_PCM_OUT_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MAX);
while (1)
{
/**************************
* Play recorded sample
**************************/
if (fsRunAction & bitPlay)
{
/*
* Set AC'97 codec TAG to send and receive data in the PCM slots
*/
AC97_Set_Tag_And_Id (AC97_BASEADDR, 0x9800);
Count_Samples = 0;
Xil_Out32(LED_BASEADDR, bitPlayLED); //turn on LED
while ((Count_Samples/8) < lNumSamples)
{
/*
* Block execution until next frame is ready
*/
AC97_Wait_For_New_Frame (AC97_BASEADDR);
//<-------------------------------------------------------------
// Play 2 different audio clips based on SW7. Use code below to
// choose where in memory read the audio data from.
// Also, display the playing time on the UART.
// Hint: Use the variables "Counter_Examples" and #define lSampleRate
/*
* Read audio data from memory
*/
Sample_L = XIo_In32 (pAudioData_0 + Count_Samples);
Count_Samples = Count_Samples +4;
Sample_R = XIo_In32 (pAudioData_0 + Count_Samples);
Count_Samples = Count_Samples +4;
//<-------------------------------------------------------------
/*
* Send audio data to codec
*/
XIo_Out32 ((AC97_BASEADDR + AC97_PCM_OUT_L_OFFSET), Sample_L);
XIo_Out32 ((AC97_BASEADDR + AC97_PCM_OUT_R_OFFSET), Sample_R);
}
Xil_Out32(LED_BASEADDR, 0); //Turn off LED
fsRunAction = 0; //Forget any button presses that occurred
}
/**************************
* Output a square wave
**************************/
// if (fsRunAction & bitGenWave)
// {
// //generate square on left, right and then both channels
// GenSquare(AC97_BASEADDR, LEFT_CHANNEL, 1000, 500);
// GenSquare(AC97_BASEADDR, RIGHT_CHANNEL, 1000, 500);
// GenSquare(AC97_BASEADDR, BOTH_CHANNELS, 1000, 500);
// fsRunAction = 0;
// }
/**************************
* Record audio from input
**************************/
if (fsRunAction & bitRec)
{
AC97_Set_Tag_And_Id (AC97_BASEADDR, 0xF800); //Set to configure
/*
* Select input source, enable it, and then set the volume
*/
if (Xil_In32(SW_BASEADDR) & bitSw0)
{
AC97_Select_Input (AC97_BASEADDR, BOTH_CHANNELS,
AC97_LINE_IN_SELECT);
AC97_Unmute (AC97_BASEADDR, AC97_LINE_IN_VOLUME_OFFSET);
AC97_Set_Volume (AC97_BASEADDR, AC97_LINE_IN_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MAX);
}
else
{
AC97_Select_Input (AC97_BASEADDR, BOTH_CHANNELS,
AC97_MIC_SELECT);
AC97_Unmute (AC97_BASEADDR, AC97_MIC_VOLUME_OFFSET);
AC97_Set_Volume (AC97_BASEADDR, AC97_MIC_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MID);
}
//set record gain
AC97_Set_Volume (AC97_BASEADDR, AC97_RECORD_GAIN_OFFSET,
BOTH_CHANNELS, 0x00);
AC97_Set_Tag_And_Id (AC97_BASEADDR, 0x9800); //Set to Send/Receive data
Count_Samples = 0;
Xil_Out32(LED_BASEADDR, bitRecLED); //Turn on LED
while ((Count_Samples/8) < lNumSamples)
{
AC97_Wait_For_New_Frame (AC97_BASEADDR);
/*
* Read audio data from codec
*/
Sample_L = XIo_In32(AC97_BASEADDR + AC97_PCM_IN_L_OFFSET);
Sample_R = XIo_In32(AC97_BASEADDR + AC97_PCM_IN_R_OFFSET);
//<-------------------------------------------------------------
// Store 2 different audio clips based on SW7. Use code below to
// choose to store where each audio clip will be stored at.
// Also, display the recording time on the UART.
// Hint: Use the variables "Counter_Examples" and #define lSampleRate
/*
* Write audio data to memory
*/
XIo_Out32 (pAudioData_0 + Count_Samples, Sample_L);
Count_Samples = Count_Samples +4;
XIo_Out32 (pAudioData_0 + Count_Samples, Sample_R);
Count_Samples = Count_Samples +4;
//<-------------------------------------------------------------
}
//Set Tag and ID to configure the codec
AC97_Set_Tag_And_Id (AC97_BASEADDR, 0xF800);
/*
* Disable the input source
*/
if (Xil_In32(SW_BASEADDR) & bitSw0)
{
AC97_Mute (AC97_BASEADDR, AC97_LINE_IN_VOLUME_OFFSET);
}
else
{
AC97_Mute (AC97_BASEADDR, AC97_MIC_VOLUME_OFFSET);
}
Xil_Out32(LED_BASEADDR, 0); //Turn off LED
fsRunAction = 0;
}
}
//cleanup_platform();
return 0;
}
int timer_method()
{
XStatus Status;
Status = XST_SUCCESS;
Status = XIntc_Initialize(&intCtrl_Timer, TIMER_DEVICE_ID);
if ( Status != XST_SUCCESS )
{
if( Status == XST_DEVICE_NOT_FOUND )
{
xil_printf("Interrupt Controller: XST_DEVICE_NOT_FOUND...\r\n");
}
else
{
xil_printf("Interrupt Controller: A different error from XST_DEVICE_NOT_FOUND...\r\n");
}
xil_printf("Interrupt controller: driver failed to be initialized...\r\n");
return XST_FAILURE;
}
xil_printf("Interrupt controller: driver initialized!\r\n");
Status = XIntc_Connect(&intCtrl_Timer,TIMER_IR_ID,(XInterruptHandler)timer_handler, &Timer_tmrctr);
if ( Status != XST_SUCCESS )
{
xil_printf("Failed to connect the application handlers to the interrupt controller...\r\n");
return XST_FAILURE;
}
xil_printf("Connected to Interrupt Controller!\r\n");
Status = XIntc_Start(&intCtrl_Timer, XIN_REAL_MODE);
if ( Status != XST_SUCCESS )
{
xil_printf("Failed to start Interrupt Controller: ...\r\n");
return XST_FAILURE;
}
xil_printf("Interrupt Controller Started!\r\n");
XIntc_Enable(&intCtrl_Timer, TIMER_IR_ID );
Status = XTmrCtr_Initialize(&Timer_tmrctr, INTC_DEVICE_ID);
if ( Status != XST_SUCCESS )
{
xil_printf("Timer initialization failed...\r\n");
return XST_FAILURE;
}
xil_printf("Timer Initialized !\r\n");
/*
* Enable the interrupt of the timer counter so interrupts will occur
* and use auto reload mode such that the timer counter will reload
* itself automatically and continue repeatedly, without this option
* it would expire once only
*/
XTmrCtr_SetOptions(&Timer_tmrctr, 0, XTC_INT_MODE_OPTION | XTC_AUTO_RELOAD_OPTION);
/*
* Set a reset value for the timer counter such that it will expire
* eariler than letting it roll over from 0, the reset value is loaded
* into the timer counter when it is started
*/
XTmrCtr_SetResetValue(&Timer_tmrctr, 0, 0xFFFFFFFF-RESET_VALUE); // 0x17D7840 = 25*10^6 clk cycles @ 50MHz = 500ms
/*
* Register the intc device driver’s handler with the Standalone
* software platform’s interrupt table
*/
microblaze_register_handler((XInterruptHandler)XIntc_DeviceInterruptHandler,(void*)TIMER_DEVICE_ID);
microblaze_enable_interrupts();
/*
* Start the timer counter such that it's incrementing by default,
* then wait for it to timeout a number of times
*/
XTmrCtr_Start(&Timer_tmrctr, 0);
xil_printf("Timer Started!\r\n");
return XST_SUCCESS;
}
int main() {
init_platform();
static XGpio pshBtns;
static XIntc intCtrl;
Xuint32 Sample_L;
Xuint32 Sample_R;
pAudioData = (DDR2_BASEADDR + 0x02000000);
pFFTData = (pAudioData + lNumSamples);
lBtnStateOld = 0x00000000;
fsRunAction = 0;
/*
*Initialize the driver structs for the Push button and interrupt cores.
*This allows the API functions to be used with these cores.
*/
XGpio_Initialize(&pshBtns, BTNS_DEVICE_ID);
XIntc_Initialize(&intCtrl, INTC_DEVICE_ID);
/*
* Connect the function PushBtnHandler to the interrupt controller so that
* it is called whenever the Push button GPIO core signals an interrupt.
*/
XIntc_Connect(&intCtrl, BTNS_IRPT_ID, PushBtnHandler, &pshBtns);
/*
* Enable interrupts at the interrupt controller
*/
XIntc_Enable(&intCtrl, BTNS_IRPT_ID);
/*
* Register the interrupt controller with the microblaze
* processor and then start the Interrupt controller so that it begins
* listening to the interrupt core for triggers.
*/
microblaze_register_handler(XIntc_DeviceInterruptHandler, INTC_DEVICE_ID);
microblaze_enable_interrupts();
XIntc_Start(&intCtrl, XIN_REAL_MODE);
/*
* Enable the push button GPIO core to begin sending interrupts to the
* interrupt controller in response to changes in the button states
*/
XGpio_InterruptEnable(&pshBtns, lBtnChannel);
XGpio_InterruptGlobalEnable(&pshBtns);
/*
* Wait for AC97 to become ready
*/
while (!(AC97_Link_Is_Ready(AC97_BASEADDR)))
;
/*
* Set TAG to configure codec
*/
AC97_Set_Tag_And_Id(AC97_BASEADDR, 0xF800);
/*
* Enable audio output and set volume
*/
AC97_Unmute(AC97_BASEADDR, AC97_MASTER_VOLUME_OFFSET);
AC97_Unmute(AC97_BASEADDR, AC97_HEADPHONE_VOLUME_OFFSET);
AC97_Unmute(AC97_BASEADDR, AC97_PCM_OUT_VOLUME_OFFSET);
AC97_Set_Volume(AC97_BASEADDR, AC97_MASTER_VOLUME_OFFSET, BOTH_CHANNELS,
VOLUME_MAX);
AC97_Set_Volume(AC97_BASEADDR, AC97_HEADPHONE_VOLUME_OFFSET, BOTH_CHANNELS,
VOLUME_MIN);
AC97_Set_Volume(AC97_BASEADDR, AC97_PCM_OUT_VOLUME_OFFSET, BOTH_CHANNELS,
VOLUME_MAX);
while (1) {
/**************************
* Play recorded sample
**************************/
if (sampleMax != 0) {
if (fsRunAction & bitPlay) {
/*
* Set AC'97 codec TAG to send and receive data in the PCM slots
*/
AC97_Set_Tag_And_Id(AC97_BASEADDR, 0x9800);
Count_Samples = 0;
// Xil_Out32(LED_BASEADDR, bitPlayLED); //turn on LED
int showLED = 0;
while ((Count_Samples / 8) < lNumSamples) {
/*
* Block execution until next frame is ready
*/
AC97_Wait_For_New_Frame(AC97_BASEADDR);
/*
* Read audio data from memory
*/
Sample_L = XIo_In32 (pAudioData + Count_Samples);
Count_Samples = Count_Samples + 4;
Sample_R = XIo_In32 (pAudioData + Count_Samples);
Count_Samples = Count_Samples + 4;
/* our code */
/* if(Count_Samples < 100) { */
// printf("Left: %i",(int)Sample_L);
// printf("Right: %i",(int)Sample_R);
/* } */
if (showLED % 4000 == 0) {
/* middleLeft /= 8000;
middleRight /= 8000; */
// Xil_Out32(LED_BASEADDR, Sample_L & AC97_META_MASK);
// printf("Left: %d",(int)Sample_L);
// printf("Right: %d",(int)Sample_R);
setVolumeLEDs(Sample_L & AC97_DATA_MASK,
Sample_R & AC97_DATA_MASK);
/* middleLeft = 0;
middleRight = 0;
} else {
middleLeft += Sample_L;
middleRight += Sample_R; */
}
/*
* Send audio data to codec
*/XIo_Out32 ((AC97_BASEADDR + AC97_PCM_OUT_L_OFFSET), Sample_L);
XIo_Out32 ((AC97_BASEADDR + AC97_PCM_OUT_R_OFFSET), Sample_R);
showLED++;
}
Xil_Out32(LED_BASEADDR, 0); //Turn off LED
fsRunAction = 0; //Forget any button presses that occurred
}
}
/**************************
* Output a square wave
**************************/
if (fsRunAction & bitGenWave) {
//generate square on left, right and then both channels
GenSquare(AC97_BASEADDR, LEFT_CHANNEL, 1000, 500);
GenSquare(AC97_BASEADDR, RIGHT_CHANNEL, 1000, 500);
GenSquare(AC97_BASEADDR, BOTH_CHANNELS, 1000, 500);
fsRunAction = 0;
}
/**************************
* LEDTest
**************************/
if (fsRunAction & bitLEDTest) {
/* Xil_Out32(LED_BASEADDR, volumeLED0);
sleepTimer(1000);
Xil_Out32(LED_BASEADDR, volumeLED1);
sleepTimer(1000);
Xil_Out32(LED_BASEADDR, volumeLED2);
sleepTimer(1000);
Xil_Out32(LED_BASEADDR, volumeLED3);
sleepTimer(1000);
Xil_Out32(LED_BASEADDR, volumeLED4);
sleepTimer(5000);
Xil_Out32(LED_BASEADDR, volumeLED5);
sleepTimer(5000);
Xil_Out32(LED_BASEADDR, volumeLED6);
sleepTimer(5000);
Xil_Out32(LED_BASEADDR, volumeLED7);
sleepTimer(5000);
Xil_Out32(LED_BASEADDR, 0);
Xil_Out32(LED_BASEADDR, allLEDs);
sleepTimer(5000);
Xil_Out32(LED_BASEADDR, 0);
fsRunAction = 0;*/
Xil_Out32(LED_BASEADDR, volumeLED7);
fftSample(pAudioData, lNumSamples, 0);
Xil_Out32(LED_BASEADDR, 0);
// fftSample(pFFTData, pAudioData, lNumSamples, 1);
// addOriginMeta();
// if (compareValues(pAudioData, pFFTData)) {
// Xil_Out32(LED_BASEADDR, allLEDs);
// sleepTimer(5000);
// Xil_Out32(LED_BASEADDR, 0);
// Xil_Out32(LED_BASEADDR, allLEDs);
// sleepTimer(5000);
// Xil_Out32(LED_BASEADDR, 0);
// } else {
// Xil_Out32(LED_BASEADDR, volumeLED0);
// sleepTimer(1000);
// Xil_Out32(LED_BASEADDR, volumeLED1);
// sleepTimer(1000);
// Xil_Out32(LED_BASEADDR, volumeLED2);
// sleepTimer(1000);
// Xil_Out32(LED_BASEADDR, volumeLED3);
// sleepTimer(1000);
// Xil_Out32(LED_BASEADDR, volumeLED4);
// }
fsRunAction = 0;
}
/**************************
* Record audio from input
**************************/
if (fsRunAction & bitRec) {
AC97_Set_Tag_And_Id(AC97_BASEADDR, 0xF800); //Set to configure
/*
* Select input source, enable it, and then set the volume
*/
if (Xil_In32(SW_BASEADDR) & bitSw0) {
AC97_Select_Input(AC97_BASEADDR, BOTH_CHANNELS,
AC97_LINE_IN_SELECT);
AC97_Unmute(AC97_BASEADDR, AC97_LINE_IN_VOLUME_OFFSET);
AC97_Set_Volume(AC97_BASEADDR, AC97_LINE_IN_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MAX);
} else {
AC97_Select_Input(AC97_BASEADDR, BOTH_CHANNELS, AC97_MIC_SELECT);
AC97_Unmute(AC97_BASEADDR, AC97_MIC_VOLUME_OFFSET);
AC97_Set_Volume(AC97_BASEADDR, AC97_MIC_VOLUME_OFFSET,
BOTH_CHANNELS, VOLUME_MID);
}
//set record gain
AC97_Set_Volume(AC97_BASEADDR, AC97_RECORD_GAIN_OFFSET,
BOTH_CHANNELS, 0x00);
AC97_Set_Tag_And_Id(AC97_BASEADDR, 0x9800); //Set to Send/Receive data
Count_Samples = 0;
Xil_Out32(LED_BASEADDR, bitRecLED); //Turn on LED
middle = 0;
sampleMax = MIN_UINT;
countSamples = 0;
sampleMin = MAX_UINT;
while ((Count_Samples / 8) < lNumSamples) {
AC97_Wait_For_New_Frame(AC97_BASEADDR);
/*
* Read audio data from codec
*/
Sample_L = XIo_In32(AC97_BASEADDR + AC97_PCM_IN_L_OFFSET);
Sample_R = XIo_In32(AC97_BASEADDR + AC97_PCM_IN_R_OFFSET);
/*
* our code
*/
captureSampleReference(Sample_L & AC97_DATA_MASK,
Sample_R & AC97_DATA_MASK);
/*
* Write audio data to memory
*/
XIo_Out32 (pAudioData + Count_Samples, Sample_L);
Count_Samples = Count_Samples + 4;
XIo_Out32 (pAudioData + Count_Samples, Sample_R);
Count_Samples = Count_Samples + 4;
}
//Set Tag and ID to configure the codec
AC97_Set_Tag_And_Id(AC97_BASEADDR, 0xF800);
/*
* Disable the input source
*/
if (Xil_In32(SW_BASEADDR) & bitSw0) {
AC97_Mute(AC97_BASEADDR, AC97_LINE_IN_VOLUME_OFFSET);
} else {
AC97_Mute(AC97_BASEADDR, AC97_MIC_VOLUME_OFFSET);
}
middle = middle / countSamples;
Xil_Out32(LED_BASEADDR, 0); //Turn off LED
fsRunAction = 0;
}
}
cleanup_platform();
return 0;
}
/**
*
* This function setups the interrupt system so interrupts can occur for the
* TEMAC. This function is application-specific since the actual system may or
* may not have an interrupt controller. The TEMAC could be directly connected
* to a processor without an interrupt controller. The user should modify this
* function to fit the application.
*
* @param IntcInstancePtr is a pointer to the instance of the Intc component.
* @param TemacInstancePtr is a pointer to the instance of the Temac
* component.
* @param TemacIntrId is the Interrupt ID and is typically
* XPAR_<INTC_instance>_<TEMAC_instance>_IP2INTC_IRPT_INTR
* value from xparameters.h.
*
* @return XST_SUCCESS if successful, otherwise XST_FAILURE.
*
* @note None.
*
******************************************************************************/
static int TemacSetupIntrSystem(XIntc *IntcInstancePtr,
XLlTemac *TemacInstancePtr,
XLlDma *DmaInstancePtr,
u16 TemacIntrId,
u16 DmaRxIntrId,
u16 DmaTxIntrId)
{
XLlDma_BdRing * TxRingPtr = &XLlDma_GetTxRing(DmaInstancePtr);
XLlDma_BdRing * RxRingPtr = &XLlDma_GetRxRing(DmaInstancePtr);
int Status;
#ifndef TESTAPP_GEN
/*
* Initialize the interrupt controller and connect the ISR
*/
Status = XIntc_Initialize(IntcInstancePtr, INTC_DEVICE_ID);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Unable to intialize the interrupt controller");
return XST_FAILURE;
}
#endif
Status = XIntc_Connect(IntcInstancePtr, TemacIntrId,
(XInterruptHandler)
TemacErrorHandler,
TemacInstancePtr);
Status |= XIntc_Connect(IntcInstancePtr, DmaTxIntrId,
(XInterruptHandler) TxIntrHandler,
TxRingPtr);
Status |= XIntc_Connect(IntcInstancePtr, DmaRxIntrId,
(XInterruptHandler) RxIntrHandler,
RxRingPtr);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Unable to connect ISR to interrupt controller");
return XST_FAILURE;
}
#ifndef TESTAPP_GEN
/*
* Start the interrupt controller
*/
Status = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE);
if (Status != XST_SUCCESS) {
TemacUtilErrorTrap("Error starting intc");
return XST_FAILURE;
}
#endif
/*
* Enable interrupts from the hardware
*/
XIntc_Enable(IntcInstancePtr, TemacIntrId);
XIntc_Enable(IntcInstancePtr, DmaTxIntrId);
XIntc_Enable(IntcInstancePtr, DmaRxIntrId);
#ifndef TESTAPP_GEN
#ifdef __PPC__
/*
* Initialize the PPC exception table
*/
XExc_Init();
/*
* Register the interrupt controller with the exception table
*/
XExc_RegisterHandler(XEXC_ID_NON_CRITICAL_INT,
(XExceptionHandler)
XIntc_InterruptHandler,
IntcInstancePtr);
/*
* Enable non-critical exceptions
*/
XExc_mEnableExceptions(XEXC_NON_CRITICAL);
#else
/*
* Connect the interrupt controller interrupt handler to the hardware
* interrupt handling logic in the microblaze processor.
*/
microblaze_register_handler((XInterruptHandler)
XIntc_InterruptHandler, IntcInstancePtr);
/*
* Enable interrupts in the Microblaze
*/
microblaze_enable_interrupts();
#endif
#endif
return XST_SUCCESS;
}
int main()
{
init_platform();
//verbose = 1;
xil_printf("\n\rLoading Sounds and initializing hardware...\n\r");
loadWaveFiles();
initializeAC97();
xil_printf("Playing Sound\r\n");
microblaze_enable_interrupts();
microblaze_register_handler((XInterruptHandler) AC97_InterruptHandler, NULL);
XAC97_mSetControl(XPAR_AXI_AC97_0_BASEADDR, AC97_ENABLE_IN_FIFO_INTERRUPT);
XIntc_EnableIntr(XPAR_INTC_SINGLE_BASEADDR, XPAR_AXI_AC97_0_INTERRUPT_MASK);
XIntc_MasterEnable(XPAR_INTC_SINGLE_BASEADDR);
//xil_printf("Current Wave = %08x, CurrentAddress = %08x, CurrentStopAddress =%08x\r\n", CurrentWave, CurrentWave->ddrCurrentAddress, CurrentWave->ddrStopAddress );
while(1){
xil_printf("Please Select a Sound Effect (0-9)\r\n");
char ch;
read(0,&ch, 1);
switch(ch){
case '0':
playWaveFile(&DarthVader);
break;
case '1':
playWaveFile(&BaseHit);
break;
case '2':
playWaveFile(&InvHit);
break;
case '3':
playWaveFile(&UFO);
break;
case '4':
playWaveFile(&UFOHit);
break;
case '5':
playWaveFile(&Shot);
break;
case '6':
playWaveFile(&Walk1);
break;
case '7':
playWaveFile(&Walk2);
break;
case '8':
playWaveFile(&Walk3);
break;
case '9':
playWaveFile(&Walk4);
break;
}
}
//Xuint32 Current_Mode = Check_Initial_Mode (XPAR_QUAD_SPI_IF_0_BASEADDR);
//u32 testResult = Quad_SPI_Flash_Test (XPAR_QUAD_SPI_IF_0_BASEADDR);
//xil_printf("Quad_SPI_Flash Test Result %08X.\r\n", testResult);
//u8 ReadByte = Read_Flash_8(XPAR_QUAD_SPI_IF_0_BASEADDR, 0x00000000);
//xil_printf("I read Byte %2X, from the SPI Flash.\r\n", ReadByte);
//u32 FLASH_ID = Manufact_ID (XPAR_QUAD_SPI_IF_0_BASEADDR);
//xil_printf("Flash ID is: %08x.\r\n", FLASH_ID);
//for(i = 0; i<256; i++){
// data[i]=i;
// }
//Page_Program (XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0, 256, data);
//Fast_Read(XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0x00C00000, 256, 10, data1);
//Fast_Read(XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0x00C00000, 256, 10, data2);
//Page_Program (XPAR_QUAD_SPI_IF_0_BASEADDR, 2, Current_Mode, 2, 0, 256, data);
// for(i = 0; i<256; i++){
// xil_printf("%02x %02x\r\n", data1[i], data2[i]);
//}
//while(1) XAC97_WriteFifo(XPAR_AC97_PLB_CONTROLLER_0_BASEADDR, 0x0);
//xil_printf("Final i: %d", i);
cleanup_platform();
return 0;
}
