static CARD8
chipsMmioReadST01(vgaHWPtr hwp)
{
    if (hwp->IOBase == VGA_IOBASE_MONO)
	return minb(CHIPS_MMIO_MONO_STAT_1);
    else
	return minb(CHIPS_MMIO_COLOR_STAT_1);
}
static void
chipsMmioDisablePalette(vgaHWPtr hwp)
{
    if (hwp->IOBase == VGA_IOBASE_MONO)
	(void) minb(CHIPS_MMIO_MONO_STAT_1);
    else
	(void) minb(CHIPS_MMIO_COLOR_STAT_1);
    moutb(CHIPS_MMIO_ATTR_INDEX, 0x20);
    hwp->paletteEnabled = FALSE;
}
static CARD8
chipsMmioReadCrtc(vgaHWPtr hwp, CARD8 index)
{
    if (hwp->IOBase == VGA_IOBASE_MONO) {
	moutb(CHIPS_MMIO_MONO_CRTC_INDEX, index);
    	return minb(CHIPS_MMIO_MONO_CRTC_DATA);
    } else {
	moutb(CHIPS_MMIO_COLOR_CRTC_INDEX, index);
    	return minb(CHIPS_MMIO_COLOR_CRTC_DATA);
    }
}
Example #4
0
static void
chipsMmioEnablePalette(vgaHWPtr hwp)
{
    CARD8 tmp;

    if (hwp->IOBase == VGA_IOBASE_MONO)
	tmp = minb(CHIPS_MMIO_MONO_STAT_1);
    else
	tmp = minb(CHIPS_MMIO_COLOR_STAT_1);
    moutb(CHIPS_MMIO_ATTR_INDEX, 0x00);
    hwp->paletteEnabled = TRUE;
}
static CARD8
chipsMmioReadAttr(vgaHWPtr hwp, CARD8 index)
{
    if (hwp->paletteEnabled)
	index &= ~0x20;
    else
	index |= 0x20;

    if (hwp->IOBase == VGA_IOBASE_MONO)
	(void) minb(CHIPS_MMIO_MONO_STAT_1);
    else
	(void) minb(CHIPS_MMIO_COLOR_STAT_1);
    moutb(CHIPS_MMIO_ATTR_INDEX, index);
    return minb(CHIPS_MMIO_ATTR_DATA_R);
}
static void
chipsMmioWriteAttr(vgaHWPtr hwp, CARD8 index, CARD8 value)
{
    if (hwp->paletteEnabled)
	index &= ~0x20;
    else
	index |= 0x20;

    if (hwp->IOBase == VGA_IOBASE_MONO)
	(void) minb(CHIPS_MMIO_MONO_STAT_1);
    else
	(void) minb(CHIPS_MMIO_COLOR_STAT_1);
    moutb(CHIPS_MMIO_ATTR_INDEX, index);
    moutb(CHIPS_MMIO_ATTR_DATA_W, value);
}
int main()
{
	int a,b;
	int n;

	while(scanf("%d%d%d",&n,&a,&b)!=EOF)
	{
		printf("%d\n",(n-1)/a+(n-1)/b-(n-1)/minb(a,b));
	}

	return 0;
}
static CARD8  
chipsMmioReadFCR(vgaHWPtr hwp)
{
    return minb(CHIPS_MMIO_FEATURE_R);
}
static CARD8
chipsMmioReadST00(vgaHWPtr hwp)
{
    return minb(CHIPS_MMIO_STAT_0);
}
static CARD8
chipsMmioReadDacData(vgaHWPtr hwp)
{
    return minb(CHIPS_MMIO_DAC_DATA);
}
static CARD8
chipsMmioReadDacMask(vgaHWPtr hwp)
{
    return minb(CHIPS_MMIO_DAC_MASK);
}
uint8_t DIA_DVDffParam(COMPRES_PARAMS *incoming)
{
	

	int ret;
	FFcodecSetting *conf=(FFcodecSetting *)incoming->extraSettings;
	ADM_assert(incoming->extraSettingsLen==sizeof(FFcodecSetting));

diaMenuEntry wideM[]={
  {0,QT_TR_NOOP("4:3")},
  {1,QT_TR_NOOP("16:9")}};
diaMenuEntry matrixM[]={
  {0,QT_TR_NOOP("Default")},
  {1,QT_TR_NOOP("TMPGEnc")},
  {2,QT_TR_NOOP("Anime")},
  {3,QT_TR_NOOP("KVCD")}
};
diaMenuEntry interM[]={
  {0,QT_TR_NOOP("Progressive")},
  {1,QT_TR_NOOP("Interlaced TFF")},
  {2,QT_TR_NOOP("Interlaced BFF")}
};
diaMenuEntry vbvM[3]=
{
	{40,"VCD 40 kB"},
	{112,"SVCD 112 kB"},
	{224,"DVD 224 kB"}
};

                      
         diaElemBitrate bitrate(incoming,NULL);
         diaElemUInteger maxb(&(conf->maxBitrate),QT_TR_NOOP("Ma_x. bitrate:"),100,9000);
         diaElemUInteger minb(&(conf->minBitrate),QT_TR_NOOP("Mi_n. bitrate:"),0,9000);
         diaElemToggle    xvid(&(conf->use_xvid_ratecontrol),QT_TR_NOOP("_Use Xvid rate control"));
         
         diaElemMenu      vbv(&(conf->bufferSize),QT_TR_NOOP("_Buffer size:"),3,vbvM);
         
         diaElemMenu      widescreen(&(conf->widescreen),QT_TR_NOOP("Aspect _ratio:"),2,wideM);
         diaElemMenu      matrix(&(conf->user_matrix),QT_TR_NOOP("_Matrices:"),4,matrixM);
         diaElemUInteger  gop(&(conf->gop_size),QT_TR_NOOP("_GOP size:"),1,30);
         
uint32_t inter;
          if(!conf->interlaced) inter=0;
            else if(conf->bff) inter=2;
                else inter=1;
         diaElemMenu      interW(&inter,QT_TR_NOOP("_Interlacing:"),3,interM);
  
      diaElem *elems[9]={&bitrate,&maxb,&minb,&xvid,&vbv,&widescreen,&interW,&matrix,&gop};
    
  if( diaFactoryRun(QT_TR_NOOP("libavcodec MPEG-2 Configuration"),9,elems))
  {
    switch(inter)
    {
      case 0: conf->interlaced=0;conf->bff=0;break;
      case 1: conf->interlaced=1;conf->bff=0;break;
      case 2: conf->interlaced=1;conf->bff=1;break;
      default: ADM_assert(0);
    }
    return 1;
  }
  return 0;
}	
static CARD8
chipsMmioReadSeq(vgaHWPtr hwp, CARD8 index)
{
    moutb(CHIPS_MMIO_SEQ_INDEX, index);
    return minb(CHIPS_MMIO_SEQ_DATA);
}
static CARD8
chipsMmioReadGr(vgaHWPtr hwp, CARD8 index)
{
    moutb(CHIPS_MMIO_GRAPH_INDEX, index);
    return minb(CHIPS_MMIO_GRAPH_DATA);
}
Example #15
0
static char TDFXReadControlMMIO(TDFXPtr pTDFX, int addr, char index) {
    moutb(pTDFX->MMIOBase[0], addr, index);
    return minb(pTDFX->MMIOBase[0], addr+1);
}
Example #16
0
static char I740ReadControlMMIO(I740Ptr pI740, int addr, unsigned char index) {
  moutb(addr, index);
  return minb(addr+1);
}
Example #17
0
static char I740ReadStandardMMIO(I740Ptr pI740, int addr) {
  return minb(addr);
}
static CARD8
chipsMmioReadMiscOut(vgaHWPtr hwp)
{
    return minb(CHIPS_MMIO_MISC_OUT_R);
}