static int mipi_cmd_nt35516_wvga_pt_init(void)
{
int ret;
if (msm_fb_detect_client("mipi_cmd_nt35516_qhd"))
return 0;
pinfo.xres = 540;
pinfo.yres = 960;
pinfo.type = MIPI_CMD_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
pinfo.lcdc.h_back_porch = 3;//50;
pinfo.lcdc.h_front_porch = 2;//50;
pinfo.lcdc.h_pulse_width = 5;//20;
pinfo.lcdc.v_back_porch = 3;//11;
pinfo.lcdc.v_front_porch = 2;//10;
pinfo.lcdc.v_pulse_width = 5;
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
pinfo.lcdc.hsync_skew = 0;
pinfo.bl_max = 31;
pinfo.bl_min = 1;
pinfo.fb_num = 2;
pinfo.clk_rate = 399000000;
//pinfo.is_3d_panel = FB_TYPE_3D_PANEL;
pinfo.lcd.vsync_enable = TRUE;
pinfo.lcd.hw_vsync_mode = TRUE;
pinfo.lcd.refx100 = 6000; /* adjust refx100 to prevent tearing */
pinfo.lcd.v_back_porch = 3;//11;
pinfo.lcd.v_front_porch = 2;//10;
pinfo.lcd.v_pulse_width = 5;
pinfo.mipi.mode = DSI_CMD_MODE;
pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.data_lane0 = TRUE;
//pinfo.mipi.esc_byte_ratio = 4;
#if defined(NOVATEK_TWO_LANE)
pinfo.mipi.data_lane1 = TRUE;
#endif
pinfo.mipi.t_clk_post = 0x22;
pinfo.mipi.t_clk_pre = 0x3f;
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.te_sel = 1; /* TE from vsycn gpio */
pinfo.mipi.interleave_max = 1;
pinfo.mipi.insert_dcs_cmd = TRUE;
pinfo.mipi.wr_mem_continue = 0x3c;
pinfo.mipi.wr_mem_start = 0x2c;
pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db;
//pinfo.mipi.dlane_swap = 0x01;//must set this, otherwise, boe lcd can't be on
pinfo.mipi.tx_eot_append = 0x01; /* append EOT at the endz*/
pinfo.mipi.rx_eot_ignore = 0x0;
ret = mipi_nt35516_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_QHD_PT);
if (ret)
pr_err("%s: failed to register device!\n", __func__);
return ret;
}
static int mipi_cmd_nt35516_qhd_pt_init(void)
{
int ret;
if (msm_fb_detect_client("mipi_cmd_nt35516_qhd"))
return 0;
pinfo.xres = 540;
pinfo.yres = 960;
pinfo.type = MIPI_CMD_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
pinfo.lcdc.h_back_porch = 100;
pinfo.lcdc.h_front_porch = 100;
pinfo.lcdc.h_pulse_width = 8;
pinfo.lcdc.v_back_porch = 20;
pinfo.lcdc.v_front_porch = 20;
pinfo.lcdc.v_pulse_width = 1;
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
pinfo.lcdc.hsync_skew = 0;
pinfo.bl_max = 20;
pinfo.bl_min = 0;
pinfo.fb_num = 2;
pinfo.clk_rate = 499000000;
//pinfo.lcd.vsync_enable = TRUE;
//pinfo.lcd.hw_vsync_mode = TRUE;
pinfo.lcd.refx100 = 6100; /* adjust refx100 to prevent tearing */
pinfo.mipi.mode = DSI_CMD_MODE;
pinfo.mipi.dst_format = DSI_CMD_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB;
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
pinfo.mipi.t_clk_post = 0x20;
pinfo.mipi.t_clk_pre = 0x2F;
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_SW_TE;
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
pinfo.mipi.te_sel = 1; /* TE from vsync gpio */
pinfo.mipi.interleave_max = 1;
pinfo.mipi.insert_dcs_cmd = TRUE;
pinfo.mipi.wr_mem_continue = 0x3c;
pinfo.mipi.wr_mem_start = 0x2c;
pinfo.mipi.dsi_phy_db = &dsi_cmd_mode_phy_db;
pinfo.mipi.tx_eot_append = 0x01;
pinfo.mipi.rx_eot_ignore = 0x0;
pinfo.mipi.dlane_swap = 0x01;
ret = mipi_nt35516_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_QHD_PT);
if (ret)
pr_err("%s: failed to register device!\n", __func__);
return ret;
}
static int __init mipi_video_nt35516_wvga_pt_init(void)
{
int ret;
printk("%s : mipi_nt35516 enter\n",__func__);
if (msm_fb_detect_client("mipi_video_nt35516_qhd"))
return 0;
//tydrv pengwei added for read chip id
#ifdef DRV_READ_LCDID
msleep(2);
lcd_id_flag = tyq_lcd_read_id(LCD_ID);
// tp_id_flag = tyq_lcd_read_id(TP_ID);
// printk("+++++++lcd_id_flag=%d,tp_id_flag=%d+++++++++++++++++++++++++++++++++\n",lcd_id_flag,tp_id_flag);
#endif
pinfo.xres = 540;
pinfo.yres = 960;
pinfo.type = MIPI_VIDEO_PANEL;
pinfo.pdest = DISPLAY_1;
pinfo.wait_cycle = 0;
pinfo.bpp = 24;
if(lcd_id_flag) //tydrv pengwei for truly
{
pinfo.lcdc.h_back_porch = 55; //55
pinfo.lcdc.h_front_porch = 105; //105
pinfo.lcdc.h_pulse_width = 8;//8
pinfo.lcdc.v_back_porch = 15; //15
pinfo.lcdc.v_front_porch = 20; //20
pinfo.lcdc.v_pulse_width = 1; //1
}
else //tydrv pengwei for tianma
{
pinfo.lcdc.h_back_porch = 55; //55
pinfo.lcdc.h_front_porch = 25; //105
pinfo.lcdc.h_pulse_width = 8;//8
pinfo.lcdc.v_back_porch = 2; //15
pinfo.lcdc.v_front_porch = 4; //20
pinfo.lcdc.v_pulse_width = 2; //1
}
pinfo.lcdc.border_clr = 0; /* blk */
pinfo.lcdc.underflow_clr = 0xff; /* blue */
/* number of dot_clk cycles HSYNC active edge
is delayed from VSYNC active edge */
pinfo.lcdc.hsync_skew = 0;
pinfo.clk_rate = 482000000;
pinfo.bl_max = 255;
pinfo.bl_min = 1;
pinfo.fb_num = 2;
pinfo.mipi.mode = DSI_VIDEO_MODE;
pinfo.mipi.pulse_mode_hsa_he = TRUE; /* send HSA and HE following
VS/VE packet */
pinfo.mipi.hfp_power_stop = FALSE; /* LP-11 during the HFP period */
pinfo.mipi.hbp_power_stop = FALSE; /* LP-11 during the HBP period */
pinfo.mipi.hsa_power_stop = FALSE; /* LP-11 during the HSA period */
/* LP-11 or let Command Mode Engine send packets in
HS or LP mode for the BLLP of the last line of a frame */
pinfo.mipi.eof_bllp_power_stop = TRUE;
/* LP-11 or let Command Mode Engine send packets in
HS or LP mode for packets sent during BLLP period */
pinfo.mipi.bllp_power_stop = TRUE;
pinfo.mipi.traffic_mode = DSI_BURST_MODE;
pinfo.mipi.dst_format = DSI_VIDEO_DST_FORMAT_RGB888;
pinfo.mipi.vc = 0;
pinfo.mipi.rgb_swap = DSI_RGB_SWAP_RGB; /* RGB */
pinfo.mipi.data_lane0 = TRUE;
pinfo.mipi.data_lane1 = TRUE;
pinfo.mipi.t_clk_post = 0xa1;
pinfo.mipi.t_clk_pre = 0x0f;
pinfo.mipi.stream = 0; /* dma_p */
pinfo.mipi.mdp_trigger = DSI_CMD_TRIGGER_NONE;
pinfo.mipi.dma_trigger = DSI_CMD_TRIGGER_SW;
//pengwei modify 20121226 for app
#if 1
pinfo.mipi.frame_rate = 58;
#else
pinfo.mipi.frame_rate = 60;
#endif
pinfo.mipi.dsi_phy_db = &dsi_video_mode_phy_db;
//pinfo.mipi.dlane_swap = 0x01;
pinfo.mipi.tx_eot_append = 0x01; /* append EOT at the end
of data burst */
ret = mipi_nt35516_device_register(&pinfo, MIPI_DSI_PRIM,
MIPI_DSI_PANEL_QHD_PT);
if (ret)
pr_err("%s: failed to register device!\n", __func__);
printk("%s ok !__+++++++++++++++\n",__func__);
return ret;
}
