int main(void)
{
unsigned last_branch = 0;
enum mips_exception err;
Elf32_Sym *sym;
const char *symname;
int opcode;
/* Prepare the code */
l2_memory = sbrk(MEMSZ);
if(!l2_memory)
BREAK(1);
mips_init();
pcpu = mips_init_cpu(l2_memory, MEMSZ, STKSZ);
if(mips_elf_load(pcpu, l2_elf, l2_elf_size) < 0)
BREAK(2);
/* Execute it */
while(1) {
if(pcpu->delay_slot)
last_branch = pcpu->delay_slot-4;
/* Print all labels as they are encountered. */
if((sym = mips_elf_find_address(pcpu, pcpu->pc)) &&
(sym->st_value == pcpu->pc) &&
(symname = mips_elf_get_symname(pcpu, sym))) {
printaddr("PC=", pcpu->pc);
printaddr(",last_branch=", last_branch);
print_char('\n');
}
if((err = mips_execute(pcpu)) == MIPS_E_OK)
continue;
if(err == MIPS_E_BREAK)
break;
/* Expected exceptions must exactly match PC. */
if((sym = mips_elf_find_address(pcpu, pcpu->pc)) &&
(sym->st_value == pcpu->pc) &&
(symname = mips_elf_get_symname(pcpu, sym)) &&
(beginswith(symname, "EXN") == 0)) {
pcpu->pc += 8;
} else {
break;
}
}
print_string("L1 FINISHED: exception="); print_int(err);
print_string(", code="); print_int(mips_break_code(pcpu, &opcode));
print_string(", "); printaddr("last_branch=", last_branch);
print_char('\n');
printaddr("PC=", pcpu->pc);
print_char('\n');
return 0;
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
char **argv = (char **)a1;
char **envp = (char **)a2;
int i;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
mips_pcpu0_init();
/*
* XXXRW: Support for the gxemul real-time clock required in order to
* usefully determine our emulated timer frequency. Go with something
* classic as the default in the mean time.
*/
platform_counter_freq = MIPS_DEFAULT_HZ;
mips_timer_early_init(platform_counter_freq);
cninit();
printf("entry: platform_start()\n");
bootverbose = 1;
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", argv[i]);
printf("\n");
if (envp != NULL) {
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", envp[i], envp[i+1]);
} else {
printf("no envp.\n");
}
}
realmem = btoc(GXEMUL_MP_DEV_READ(GXEMUL_MP_DEV_MEMORY));
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
int32_t *argv = (int32_t*)a1;
int32_t *envp = (int32_t*)a2;
unsigned int memsize = a3;
int i;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
mips_pcpu0_init();
platform_counter_freq = malta_cpu_freq();
mips_timer_early_init(platform_counter_freq);
init_static_kenv(boot1_env, sizeof(boot1_env));
cninit();
printf("entry: platform_start()\n");
bootverbose = 1;
/*
* YAMON uses 32bit pointers to strings so
* convert them to proper type manually
*/
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", (char*)(intptr_t)argv[i]);
printf("\n");
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", (char*)(intptr_t)envp[i],
(char*)(intptr_t)envp[i+1]);
printf("memsize = %08x\n", memsize);
}
realmem = btoc(memsize);
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
int main(int argc, char **argv)
{
char *base, *params, *key;
struct mips_cpu *pcpu;
Elf32_Sym *s_params, *s_time;
unsigned long long TIME;
if((argc != 3) && (argc != 4)) {
fprintf(stderr, "USAGE: %s ELF PARAMS [KEY]\n", argv[0]);
exit(1);
}
params = argv[2];
key = argc == 4 ? argv[3] : NULL;
if(!(base = malloc(MEMSZ))) {
perror("malloc");
exit(1);
}
mips_init();
pcpu = mips_init_cpu(base, MEMSZ, STKSZ);
prepare_cpu(pcpu, argv[1], key);
if(!(s_params = mips_elf_find_symbol(pcpu, "PARAMS")) ||
!(s_time = mips_elf_find_symbol(pcpu, "TIME"))) {
fprintf(stderr, "ERROR: 'PARAMS' and/or 'TIME' symbols not found\n");
exit(1);
}
if((s_params->st_size % 4) || !s_params->st_size) {
fprintf(stderr, "ERROR: 'PARAMS' has invalid size %u\n", s_params->st_size);
exit(1);
}
if(s_time->st_size != 8) {
fprintf(stderr, "ERROR: 'TIME' has size %u != 8\n", s_time->st_size);
exit(1);
}
parse_params(pcpu, s_params, params);
execute_loop(pcpu);
TIME = mips_peek_uw(pcpu, s_time->st_value+4); /* high word */
TIME = (TIME << 32) | mips_peek_uw(pcpu, s_time->st_value); /* low word */
printf("%llu\n", TIME);
return 0;
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
int error;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
/* Initialize pcpu stuff */
mips_pcpu0_init();
#ifdef CFE
/*
* Initialize CFE firmware trampolines. This must be done
* before any CFE APIs are called, including writing
* to the CFE console.
*
* CFE passes the following values in registers:
* a0: firmware handle
* a2: firmware entry point
* a3: entry point seal
*/
if (a3 == CFE_EPTSEAL)
cfe_init(a0, a2);
#endif
/* Init BCM platform data */
if ((error = bcm_init_platform_data(&bcm_platform_data)))
panic("bcm_init_platform_data() failed: %d", error);
platform_counter_freq = bcm_get_cpufreq(bcm_get_platform());
/* CP0 ticks every two cycles */
mips_timer_early_init(platform_counter_freq / 2);
cninit();
mips_init();
mips_timer_init_params(platform_counter_freq, 1);
}
int main(int argc, const char **argv) {
uint8_t safety = 0;
uint32_t offset = 0;
const char *fname = NULL;
uint32_t i;
struct rte runtime;
for (i=1;i<argc;i++) {
if (!strcmp(argv[i],"-o")) {
i++;
if (i==argc || !sscanf(argv[i],"%x",&offset)) {
fprintf(stderr,"-o should be followed by an offset specified in hex.\n");
exit(MIPS_EXITCODE);
}
} else if (!strcmp(argv[i],"-s")) {
safety = 1;
} else if (!fname) {
fname = argv[i];
} else {
fname = NULL;
break;
}
}
if (!fname) {
fprintf(stderr,"Usage: mips-twoints <filename> [-o offset]\n");
exit(MIPS_EXITCODE);
}
runtime = mips_init(fname,offset);
fprintf(stderr,"Enter value for register 1: ");
if (!scanf(" %d",&runtime.registers[1])) {
fprintf(stderr,"Expected an integer argument for register 1.\n");
goto error;
}
fprintf(stderr,"Enter value for register 2: ");
if (!scanf(" %d",&runtime.registers[2])) {
fprintf(stderr,"Expected an integer argument for register 2.\n");
goto error;
}
runtime.safemode = safety;
mips_run(runtime);
return 0;
error:
free(runtime.memory);
exit(MIPS_EXITCODE);
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
char **argv = (char **)a1;
char **envp = (char **)a2;
unsigned int memsize = a3;
int i;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
mips_pcpu0_init();
platform_counter_freq = malta_cpu_freq();
mips_timer_early_init(platform_counter_freq);
cninit();
printf("entry: platform_start()\n");
bootverbose = 1;
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", argv[i]);
printf("\n");
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", envp[i], envp[i+1]);
printf("memsize = %08x\n", memsize);
}
realmem = btoc(memsize);
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
int32 psf_command(int32 command, int32 parameter)
{
union cpuinfo mipsinfo;
uint32 lengthMS, fadeMS;
switch (command)
{
case COMMAND_RESTART:
SPUclose();
memcpy(psx_ram, initial_ram, 2*1024*1024);
memcpy(psx_scratch, initial_scratch, 0x400);
mips_init();
mips_reset(NULL);
psx_hw_init();
SPUinit();
SPUopen();
lengthMS = psfTimeToMS(c->inf_length);
fadeMS = psfTimeToMS(c->inf_fade);
if (lengthMS == 0)
{
lengthMS = ~0;
}
setlength(lengthMS, fadeMS);
mipsinfo.i = initialPC;
mips_set_info(CPUINFO_INT_PC, &mipsinfo);
mipsinfo.i = initialSP;
mips_set_info(CPUINFO_INT_REGISTER + MIPS_R29, &mipsinfo);
mips_set_info(CPUINFO_INT_REGISTER + MIPS_R30, &mipsinfo);
mipsinfo.i = initialGP;
mips_set_info(CPUINFO_INT_REGISTER + MIPS_R28, &mipsinfo);
mips_execute(5000);
return AO_SUCCESS;
}
return AO_FAIL;
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
struct bcm_socinfo *socinfo;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
/* Initialize pcpu stuff */
mips_pcpu0_init();
socinfo = bcm_get_socinfo();
platform_counter_freq = socinfo->cpurate * 1000 * 1000; /* BCM4718 is 480MHz */
mips_timer_early_init(platform_counter_freq);
#ifdef CFE
/*
* Initialize CFE firmware trampolines before
* we initialize the low-level console.
*
* CFE passes the following values in registers:
* a0: firmware handle
* a2: firmware entry point
* a3: entry point seal
*/
if (a3 == CFE_EPTSEAL)
cfe_init(a0, a2);
#endif
cninit();
mips_init();
/* BCM471x timer is 1/2 of Clk */
mips_timer_init_params(platform_counter_freq, 1);
}
void
platform_start(__register_t a0 __unused, __register_t a1 __unused,
__register_t a2 __unused, __register_t a3 __unused)
{
vm_offset_t kernend;
uint64_t platform_counter_freq = 175 * 1000 * 1000;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
/* Initialize pcpu stuff */
mips_pcpu0_init();
cninit();
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
/*
* Make sure that kseg0 is mapped cacheable-coherent
*/
kseg0_map_coherent();
/* clear the BSS and SBSS segments */
memset(&edata, 0, (vm_offset_t)&end - (vm_offset_t)&edata);
mips_postboot_fixup();
sb_intr_init(0);
sb_timecounter_init();
/* Initialize pcpu stuff */
mips_pcpu0_init();
#ifdef CFE
/*
* Initialize CFE firmware trampolines before
* we initialize the low-level console.
*
* CFE passes the following values in registers:
* a0: firmware handle
* a2: firmware entry point
* a3: entry point seal
*/
if (a3 == CFE_EPTSEAL)
cfe_init(a0, a2);
#endif
cninit();
mips_init();
mips_timer_init_params(sb_cpu_speed(), 0);
}
void
platform_start(__register_t a0 __unused, __register_t a1 __unused,
__register_t a2 __unused, __register_t a3 __unused)
{
vm_offset_t kernend;
int argc = a0, i;//, res;
uint32_t timer_clk;
char **argv = (char **)MIPS_PHYS_TO_KSEG0(a1);
char **envp = (char **)MIPS_PHYS_TO_KSEG0(a2);
void *dtbp;
phandle_t chosen;
char buf[2048];
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
/* Initialize pcpu stuff */
mips_pcpu0_init();
dtbp = &fdt_static_dtb;
if (OF_install(OFW_FDT, 0) == FALSE)
while (1);
if (OF_init((void *)dtbp) != 0)
while (1);
mtk_soc_try_early_detect();
if ((timer_clk = mtk_soc_get_timerclk()) == 0)
timer_clk = 1000000000; /* no such speed yet */
mips_timer_early_init(timer_clk);
/* initialize console so that we have printf */
boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */
boothowto |= (RB_VERBOSE);
cninit();
init_static_kenv(boot1_env, sizeof(boot1_env));
/*
* Get bsdbootargs from FDT if specified.
*/
chosen = OF_finddevice("/chosen");
if (OF_getprop(chosen, "bsdbootargs", buf, sizeof(buf)) != -1)
_parse_bootargs(buf);
printf("FDT DTB at: 0x%08x\n", (uint32_t)dtbp);
printf("CPU clock: %4dMHz\n", mtk_soc_get_cpuclk()/(1000*1000));
printf("Timer clock: %4dMHz\n", timer_clk/(1000*1000));
printf("UART clock: %4dMHz\n\n", mtk_soc_get_uartclk()/(1000*1000));
printf("U-Boot args (from %d args):\n", argc - 1);
if (argc == 1)
printf("\tNone\n");
for (i = 1; i < argc; i++) {
char *n = "argv ", *arg;
if (i > 99)
break;
if (argv[i])
{
arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(argv[i]);
printf("\targv[%d] = %s\n", i, arg);
sprintf(n, "argv%d", i);
kern_setenv(n, arg);
}
}
printf("Environment:\n");
for (i = 0; envp[i] && MIPS_IS_VALID_PTR(envp[i]); i++) {
char *n, *arg;
arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]);
if (! MIPS_IS_VALID_PTR(arg))
continue;
printf("\t%s\n", arg);
n = strsep(&arg, "=");
if (arg == NULL)
kern_setenv(n, "1");
else
kern_setenv(n, arg);
}
mips_init();
mips_timer_init_params(timer_clk, 0);
}
void
platform_start(__register_t a0 __unused, __register_t a1 __unused,
__register_t a2 __unused, __register_t a3 __unused)
{
vm_offset_t kernend;
uint64_t platform_counter_freq = PLATFORM_COUNTER_FREQ;
int i;
int argc = a0;
char **argv = (char **)MIPS_PHYS_TO_KSEG0(a1);
char **envp = (char **)MIPS_PHYS_TO_KSEG0(a2);
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
/* Initialize pcpu stuff */
mips_pcpu0_init();
/* initialize console so that we have printf */
boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */
boothowto |= (RB_VERBOSE);
cninit();
init_static_kenv(boot1_env, sizeof(boot1_env));
printf("U-Boot args (from %d args):\n", argc - 1);
if (argc == 1)
printf("\tNone\n");
for (i = 1; i < argc; i++) {
char *n = "argv ", *arg;
if (i > 99)
break;
if (argv[i])
{
arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(argv[i]);
printf("\targv[%d] = %s\n", i, arg);
sprintf(n, "argv%d", i);
setenv(n, arg);
}
}
printf("Environment:\n");
for (i = 0; envp[i] ; i++) {
char *n, *arg;
arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]);
printf("\t%s\n", arg);
n = strsep(&arg, "=");
if (arg == NULL)
setenv(n, "1");
else
setenv(n, arg);
}
mips_init();
mips_timer_init_params(platform_counter_freq, 2);
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
struct bootinfo *bootinfop;
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
char **argv = (char **)a1;
char **envp = (char **)a2;
long memsize;
#ifdef FDT
char buf[2048]; /* early stack supposedly big enough */
vm_offset_t dtbp = 0;
phandle_t chosen;
void *kmdp;
int dtb_needs_swap = 0; /* error */
size_t dtb_size = 0;
#ifndef FDT_DTB_STATIC_ONLY
struct fdt_header *dtb_rom, *dtb;
uint32_t *swapptr;
#endif
int fdt_source = FDT_SOURCE_NONE;
#endif
int i;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
mips_pcpu0_init();
/*
* Over time, we've changed out boot-time binary interface for the
* kernel. Miniboot simply provides a 'memsize' in a3, whereas the
* FreeBSD boot loader provides a 'bootinfo *' in a3. While slightly
* grody, we support both here by detecting 'pointer-like' values in
* a3 and assuming physical memory can never be that big.
*
* XXXRW: Pull more values than memsize out of bootinfop -- e.g.,
* module information.
*/
if (a3 >= 0x9800000000000000ULL) {
bootinfop = (void *)a3;
memsize = bootinfop->bi_memsize;
preload_metadata = (caddr_t)bootinfop->bi_modulep;
} else {
bootinfop = NULL;
memsize = a3;
}
kmdp = preload_search_by_type("elf kernel");
/*
* Configure more boot-time parameters passed in by loader.
*/
boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
init_static_kenv(MD_FETCH(kmdp, MODINFOMD_ENVP, char *), 0);
#ifdef FDT
#ifndef FDT_DTB_STATIC_ONLY
/*
* Find the dtb passed in by the boot loader (currently fictional).
*
* Prefer a dtb provided as a module to one from bootinfo as we may
* have loaded an alternative one or created a modified version.
*/
dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
if (dtbp == (vm_offset_t)NULL &&
bootinfop != NULL && bootinfop->bi_dtb != (bi_ptr_t)NULL) {
dtbp = bootinfop->bi_dtb;
fdt_source = FDT_SOURCE_LOADER;
}
/* Try to find an FDT directly in the hardware */
if (dtbp == (vm_offset_t)NULL) {
dtb_rom = (void*)(intptr_t)0x900000007f010000;
if (dtb_rom->magic == FDT_MAGIC) {
dtb_needs_swap = 0;
dtb_size = dtb_rom->totalsize;
} else if (dtb_rom->magic == bswap32(FDT_MAGIC)) {
dtb_needs_swap = 1;
dtb_size = bswap32(dtb_rom->totalsize);
}
if (dtb_size != 0) {
/* Steal a bit of memory... */
dtb = (void *)kernel_kseg0_end;
/* Round alignment from linker script. */
kernel_kseg0_end += roundup2(dtb_size, 64 / 8);
memcpy(dtb, dtb_rom, dtb_size);
if (dtb_needs_swap)
for (swapptr = (uint32_t *)dtb;
swapptr < (uint32_t *)dtb + (dtb_size/sizeof(*dtb));
swapptr++)
*swapptr = bswap32(*swapptr);
dtbp = (vm_offset_t)dtb;
fdt_source = FDT_SOURCE_ROM;
}
}
#endif /* !FDT_DTB_STATIC_ONLY */
#if defined(FDT_DTB_STATIC)
/*
* In case the device tree blob was not retrieved (from metadata) try
* to use the statically embedded one.
*/
if (dtbp == (vm_offset_t)NULL) {
dtbp = (vm_offset_t)&fdt_static_dtb;
fdt_source = FDT_SOURCE_STATIC;
}
#endif
if (OF_install(OFW_FDT, 0) == FALSE)
while (1);
if (OF_init((void *)dtbp) != 0)
while (1);
/*
* Get bootargs from FDT if specified.
*/
chosen = OF_finddevice("/chosen");
if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1)
_parse_bootargs(buf);
#endif
/*
* XXXRW: We have no way to compare wallclock time to cycle rate on
* BERI, so for now assume we run at the MALTA default (100MHz).
*/
platform_counter_freq = MIPS_DEFAULT_HZ;
mips_timer_early_init(platform_counter_freq);
cninit();
printf("entry: platform_start()\n");
#ifdef FDT
if (dtbp != (vm_offset_t)NULL) {
printf("Using FDT at %p from ", (void *)dtbp);
switch (fdt_source) {
case FDT_SOURCE_LOADER:
printf("loader");
break;
case FDT_SOURCE_ROM:
printf("ROM");
break;
case FDT_SOURCE_STATIC:
printf("kernel");
break;
default:
printf("unknown source %d", fdt_source);
break;
}
printf("\n");
}
if (dtb_size != 0 && dtb_needs_swap)
printf("FDT was byteswapped\n");
#endif
bootverbose = 1;
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", argv[i]);
printf("\n");
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", envp[i], envp[i+1]);
if (bootinfop != NULL)
printf("bootinfo found at %p\n", bootinfop);
printf("memsize = %p\n", (void *)memsize);
}
realmem = btoc(memsize);
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
struct bootinfo *bootinfop;
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
char **argv = (char **)a1;
char **envp = (char **)a2;
long memsize;
#ifdef FDT
char buf[2048]; /* early stack supposedly big enough */
vm_offset_t dtbp;
phandle_t chosen;
void *kmdp;
#endif
int i;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
mips_pcpu0_init();
/*
* Over time, we've changed out boot-time binary interface for the
* kernel. Miniboot simply provides a 'memsize' in a3, whereas the
* FreeBSD boot loader provides a 'bootinfo *' in a3. While slightly
* grody, we support both here by detecting 'pointer-like' values in
* a3 and assuming physical memory can never be that back.
*
* XXXRW: Pull more values than memsize out of bootinfop -- e.g.,
* module information.
*/
if (a3 >= 0x9800000000000000ULL) {
bootinfop = (void *)a3;
memsize = bootinfop->bi_memsize;
preload_metadata = (caddr_t)bootinfop->bi_modulep;
} else {
bootinfop = NULL;
memsize = a3;
}
#ifdef FDT
/*
* Find the dtb passed in by the boot loader (currently fictional).
*/
kmdp = preload_search_by_type("elf kernel");
dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
#if defined(FDT_DTB_STATIC)
/*
* In case the device tree blob was not retrieved (from metadata) try
* to use the statically embedded one.
*/
if (dtbp == (vm_offset_t)NULL)
dtbp = (vm_offset_t)&fdt_static_dtb;
#else
#error "Non-static FDT not yet supported on BERI"
#endif
if (OF_install(OFW_FDT, 0) == FALSE)
while (1);
if (OF_init((void *)dtbp) != 0)
while (1);
/*
* Configure more boot-time parameters passed in by loader.
*/
boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
init_static_kenv(MD_FETCH(kmdp, MODINFOMD_ENVP, char *), 0);
/*
* Get bootargs from FDT if specified.
*/
chosen = OF_finddevice("/chosen");
if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1)
_parse_bootargs(buf);
#endif
/*
* XXXRW: We have no way to compare wallclock time to cycle rate on
* BERI, so for now assume we run at the MALTA default (100MHz).
*/
platform_counter_freq = MIPS_DEFAULT_HZ;
mips_timer_early_init(platform_counter_freq);
cninit();
printf("entry: platform_start()\n");
bootverbose = 1;
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", argv[i]);
printf("\n");
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", envp[i], envp[i+1]);
if (bootinfop != NULL)
printf("bootinfo found at %p\n", bootinfop);
printf("memsize = %p\n", (void *)memsize);
}
realmem = btoc(memsize);
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
char **argv = (char **)a1;
char **envp = (char **)a2;
unsigned int memsize = a3;
int i;
/* clear the BSS and SBSS segments */
kernend = round_page((vm_offset_t)&end);
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
cninit();
printf("entry: platform_start()\n");
bootverbose = 1;
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", argv[i]);
printf("\n");
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", envp[i], envp[i+1]);
printf("memsize = %08x\n", memsize);
}
realmem = btoc(memsize);
mips_init();
do {
#if defined(TICK_USE_YAMON_FREQ)
/*
* If we are running on a board which uses YAMON firmware,
* then query CPU pipeline clock from the syscon object.
* If unsuccessful, use hard-coded default.
*/
platform_counter_freq = yamon_getcpufreq();
if (platform_counter_freq == 0)
platform_counter_freq = MIPS_DEFAULT_HZ;
#elif defined(TICK_USE_MALTA_RTC)
/*
* If we are running on a board with the MC146818 RTC,
* use it to determine CPU pipeline clock frequency.
*/
u_int64_t counterval[2];
/* Set RTC to binary mode. */
writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD));
/* Busy-wait for falling edge of RTC update. */
while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
;
while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
;
counterval[0] = mips_rd_count();
/* Busy-wait for falling edge of RTC update. */
while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0))
;
while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0))
;
counterval[1] = mips_rd_count();
platform_counter_freq = counterval[1] - counterval[0];
#endif
} while(0);
mips_timer_init_params(platform_counter_freq, 0);
}
int32 psf_start(uint8 *buffer, uint32 length)
{
uint8 *file, *lib_decoded, *lib_raw_file, *alib_decoded;
uint32 offset, plength, PC, SP, GP, lengthMS, fadeMS;
uint64 file_len, lib_len, lib_raw_length, alib_len;
corlett_t *lib;
int i;
union cpuinfo mipsinfo;
// clear PSX work RAM before we start scribbling in it
memset(psx_ram, 0, 2*1024*1024);
// printf("Length = %d\n", length);
// Decode the current GSF
if (corlett_decode(buffer, length, &file, &file_len, &c) != AO_SUCCESS)
{
return AO_FAIL;
}
// printf("file_len %d reserve %d\n", file_len, c->res_size);
// check for PSX EXE signature
if (strncmp((char *)file, "PS-X EXE", 8))
{
return AO_FAIL;
}
#if DEBUG_LOADER
offset = file[0x18] | file[0x19]<<8 | file[0x1a]<<16 | file[0x1b]<<24;
printf("Text section start: %x\n", offset);
offset = file[0x1c] | file[0x1d]<<8 | file[0x1e]<<16 | file[0x1f]<<24;
printf("Text section size: %x\n", offset);
printf("Region: [%s]\n", &file[0x4c]);
printf("refresh: [%s]\n", c->inf_refresh);
#endif
if (c->inf_refresh[0] == '5')
{
psf_refresh = 50;
}
if (c->inf_refresh[0] == '6')
{
psf_refresh = 60;
}
PC = file[0x10] | file[0x11]<<8 | file[0x12]<<16 | file[0x13]<<24;
GP = file[0x14] | file[0x15]<<8 | file[0x16]<<16 | file[0x17]<<24;
SP = file[0x30] | file[0x31]<<8 | file[0x32]<<16 | file[0x33]<<24;
#if DEBUG_LOADER
printf("Top level: PC %x GP %x SP %x\n", PC, GP, SP);
#endif
// Get the library file, if any
if (c->lib[0] != 0)
{
uint64 tmp_length;
#if DEBUG_LOADER
printf("Loading library: %s\n", c->lib);
#endif
if (ao_get_lib(c->lib, &lib_raw_file, &tmp_length) != AO_SUCCESS)
{
return AO_FAIL;
}
lib_raw_length = tmp_length;
if (corlett_decode(lib_raw_file, lib_raw_length, &lib_decoded, &lib_len, &lib) != AO_SUCCESS)
{
free(lib_raw_file);
return AO_FAIL;
}
// Free up raw file
free(lib_raw_file);
if (strncmp((char *)lib_decoded, "PS-X EXE", 8))
{
printf("Major error! PSF was OK, but referenced library is not!\n");
free(lib);
return AO_FAIL;
}
#if DEBUG_LOADER
offset = lib_decoded[0x18] | lib_decoded[0x19]<<8 | lib_decoded[0x1a]<<16 | lib_decoded[0x1b]<<24;
printf("Text section start: %x\n", offset);
offset = lib_decoded[0x1c] | lib_decoded[0x1d]<<8 | lib_decoded[0x1e]<<16 | lib_decoded[0x1f]<<24;
printf("Text section size: %x\n", offset);
printf("Region: [%s]\n", &lib_decoded[0x4c]);
printf("refresh: [%s]\n", lib->inf_refresh);
#endif
// if the original file had no refresh tag, give the lib a shot
if (psf_refresh == -1)
{
if (lib->inf_refresh[0] == '5')
{
psf_refresh = 50;
}
if (lib->inf_refresh[0] == '6')
{
psf_refresh = 60;
}
}
PC = lib_decoded[0x10] | lib_decoded[0x11]<<8 | lib_decoded[0x12]<<16 | lib_decoded[0x13]<<24;
GP = lib_decoded[0x14] | lib_decoded[0x15]<<8 | lib_decoded[0x16]<<16 | lib_decoded[0x17]<<24;
SP = lib_decoded[0x30] | lib_decoded[0x31]<<8 | lib_decoded[0x32]<<16 | lib_decoded[0x33]<<24;
#if DEBUG_LOADER
printf("Library: PC %x GP %x SP %x\n", PC, GP, SP);
#endif
// now patch the file into RAM
offset = lib_decoded[0x18] | lib_decoded[0x19]<<8 | lib_decoded[0x1a]<<16 | lib_decoded[0x1b]<<24;
offset &= 0x3fffffff; // kill any MIPS cache segment indicators
plength = lib_decoded[0x1c] | lib_decoded[0x1d]<<8 | lib_decoded[0x1e]<<16 | lib_decoded[0x1f]<<24;
#if DEBUG_LOADER
printf("library offset: %x plength: %d\n", offset, plength);
#endif
memcpy(&psx_ram[offset/4], lib_decoded+2048, plength);
// Dispose the corlett structure for the lib - we don't use it
free(lib);
}
// now patch the main file into RAM OVER the libraries (but not the aux lib)
offset = file[0x18] | file[0x19]<<8 | file[0x1a]<<16 | file[0x1b]<<24;
offset &= 0x3fffffff; // kill any MIPS cache segment indicators
plength = file[0x1c] | file[0x1d]<<8 | file[0x1e]<<16 | file[0x1f]<<24;
// Philosoma has an illegal "plength". *sigh*
if (plength > (file_len-2048))
{
plength = file_len-2048;
}
memcpy(&psx_ram[offset/4], file+2048, plength);
// load any auxiliary libraries now
for (i = 0; i < 8; i++)
{
if (c->libaux[i][0] != 0)
{
uint64 tmp_length;
#if DEBUG_LOADER
printf("Loading aux library: %s\n", c->libaux[i]);
#endif
if (ao_get_lib(c->libaux[i], &lib_raw_file, &tmp_length) != AO_SUCCESS)
{
return AO_FAIL;
}
lib_raw_length = tmp_length;
if (corlett_decode(lib_raw_file, lib_raw_length, &alib_decoded, &alib_len, &lib) != AO_SUCCESS)
{
free(lib_raw_file);
return AO_FAIL;
}
// Free up raw file
free(lib_raw_file);
if (strncmp((char *)alib_decoded, "PS-X EXE", 8))
{
printf("Major error! PSF was OK, but referenced library is not!\n");
free(lib);
return AO_FAIL;
}
#if DEBUG_LOADER
offset = alib_decoded[0x18] | alib_decoded[0x19]<<8 | alib_decoded[0x1a]<<16 | alib_decoded[0x1b]<<24;
printf("Text section start: %x\n", offset);
offset = alib_decoded[0x1c] | alib_decoded[0x1d]<<8 | alib_decoded[0x1e]<<16 | alib_decoded[0x1f]<<24;
printf("Text section size: %x\n", offset);
printf("Region: [%s]\n", &alib_decoded[0x4c]);
#endif
// now patch the file into RAM
offset = alib_decoded[0x18] | alib_decoded[0x19]<<8 | alib_decoded[0x1a]<<16 | alib_decoded[0x1b]<<24;
offset &= 0x3fffffff; // kill any MIPS cache segment indicators
plength = alib_decoded[0x1c] | alib_decoded[0x1d]<<8 | alib_decoded[0x1e]<<16 | alib_decoded[0x1f]<<24;
memcpy(&psx_ram[offset/4], alib_decoded+2048, plength);
// Dispose the corlett structure for the lib - we don't use it
free(lib);
}
}
free(file);
// free(lib_decoded);
// Finally, set psfby tag
strcpy(psfby, "n/a");
if (c)
{
int i;
for (i = 0; i < MAX_UNKNOWN_TAGS; i++)
{
if (!strcasecmp(c->tag_name[i], "psfby"))
strcpy(psfby, c->tag_data[i]);
}
}
mips_init();
mips_reset(NULL);
// set the initial PC, SP, GP
#if DEBUG_LOADER
printf("Initial PC %x, GP %x, SP %x\n", PC, GP, SP);
printf("Refresh = %d\n", psf_refresh);
#endif
mipsinfo.i = PC;
mips_set_info(CPUINFO_INT_PC, &mipsinfo);
// set some reasonable default for the stack
if (SP == 0)
{
SP = 0x801fff00;
}
mipsinfo.i = SP;
mips_set_info(CPUINFO_INT_REGISTER + MIPS_R29, &mipsinfo);
mips_set_info(CPUINFO_INT_REGISTER + MIPS_R30, &mipsinfo);
mipsinfo.i = GP;
mips_set_info(CPUINFO_INT_REGISTER + MIPS_R28, &mipsinfo);
#if DEBUG_LOADER && 1
{
FILE *f;
f = fopen("psxram.bin", "wb");
fwrite(psx_ram, 2*1024*1024, 1, f);
fclose(f);
}
#endif
psx_hw_init();
SPUinit();
SPUopen();
lengthMS = psfTimeToMS(c->inf_length);
fadeMS = psfTimeToMS(c->inf_fade);
#if DEBUG_LOADER
printf("length %d fade %d\n", lengthMS, fadeMS);
#endif
if (lengthMS == 0)
{
lengthMS = ~0;
}
setlength(lengthMS, fadeMS);
// patch illegal Chocobo Dungeon 2 code - CaitSith2 put a jump in the delay slot from a BNE
// and rely on Highly Experimental's buggy-ass CPU to rescue them. Verified on real hardware
// that the initial code is wrong.
if (c->inf_game)
{
if (!strcmp(c->inf_game, "Chocobo Dungeon 2"))
{
if (psx_ram[0xbc090/4] == LE32(0x0802f040))
{
psx_ram[0xbc090/4] = LE32(0);
psx_ram[0xbc094/4] = LE32(0x0802f040);
psx_ram[0xbc098/4] = LE32(0);
}
}
}
// psx_ram[0x118b8/4] = LE32(0); // crash 2 hack
// backup the initial state for restart
memcpy(initial_ram, psx_ram, 2*1024*1024);
memcpy(initial_scratch, psx_scratch, 0x400);
initialPC = PC;
initialGP = GP;
initialSP = SP;
mips_execute(5000);
return AO_SUCCESS;
}
void
platform_start(__register_t a0, __register_t a1, __register_t a2,
__register_t a3)
{
vm_offset_t kernend;
uint64_t platform_counter_freq;
int argc = a0;
char **argv = (char **)a1;
char **envp = (char **)a2;
unsigned int memsize = a3;
#ifdef FDT
char buf[2048]; /* early stack supposedly big enough */
vm_offset_t dtbp;
phandle_t chosen;
void *kmdp;
#endif
int i;
/* clear the BSS and SBSS segments */
kernend = (vm_offset_t)&end;
memset(&edata, 0, kernend - (vm_offset_t)(&edata));
mips_postboot_fixup();
mips_pcpu0_init();
#ifdef FDT
/*
* Find the dtb passed in by the boot loader (currently fictional).
*/
kmdp = preload_search_by_type("elf kernel");
if (kmdp != NULL)
dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
else
dtbp = (vm_offset_t)NULL;
#if defined(FDT_DTB_STATIC)
/*
* In case the device tree blob was not retrieved (from metadata) try
* to use the statically embedded one.
*/
if (dtbp == (vm_offset_t)NULL)
dtbp = (vm_offset_t)&fdt_static_dtb;
#else
#error "Non-static FDT not yet supported on BERI"
#endif
if (OF_install(OFW_FDT, 0) == FALSE)
while (1);
if (OF_init((void *)dtbp) != 0)
while (1);
/*
* Get bootargs from FDT if specified.
*/
chosen = OF_finddevice("/chosen");
if (OF_getprop(chosen, "bootargs", buf, sizeof(buf)) != -1)
_parse_bootargs(buf);
#endif
/*
* XXXRW: We have no way to compare wallclock time to cycle rate on
* BERI, so for now assume we run at the MALTA default (100MHz).
*/
platform_counter_freq = MIPS_DEFAULT_HZ;
mips_timer_early_init(platform_counter_freq);
cninit();
printf("entry: platform_start()\n");
bootverbose = 1;
if (bootverbose) {
printf("cmd line: ");
for (i = 0; i < argc; i++)
printf("%s ", argv[i]);
printf("\n");
printf("envp:\n");
for (i = 0; envp[i]; i += 2)
printf("\t%s = %s\n", envp[i], envp[i+1]);
printf("memsize = %08x\n", memsize);
}
realmem = btoc(memsize);
mips_init();
mips_timer_init_params(platform_counter_freq, 0);
}
