msr_t rdmsr(int addr)
{
uint32_t buf[2];
msr_t msr = { 0xffffffff, 0xffffffff };
if (lseek(fd_msr, (off_t) addr, SEEK_SET) == -1) {
msg_perr("Could not lseek() MSR: %s\n", strerror(errno));
close(fd_msr);
exit(1);
}
if (read(fd_msr, buf, 8) == 8) {
msr.lo = buf[0];
msr.hi = buf[1];
return msr;
}
if (errno != EIO) {
// A severe error.
msg_perr("Could not read() MSR: %s\n", strerror(errno));
close(fd_msr);
exit(1);
}
return msr;
}
static uint16_t wbsio_get_spibase(uint16_t port)
{
uint8_t id;
uint16_t flashport = 0;
w836xx_ext_enter(port);
id = sio_read(port, 0x20);
if (id != 0xa0) {
msg_perr("\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
goto done;
}
if (0 == (sio_read(port, 0x24) & 2)) {
msg_perr("\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
goto done;
}
sio_write(port, 0x07, 0x06);
if (0 == (sio_read(port, 0x30) & 1)) {
msg_perr("\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
goto done;
}
flashport = (sio_read(port, 0x62) << 8) | sio_read(port, 0x63);
done:
w836xx_ext_leave(port);
return flashport;
}
static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool readonly, bool autocleanup,
bool round)
{
void *virt_addr;
uintptr_t offset = 0;
if (len == 0) {
msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr);
return ERROR_PTR;
}
if (round)
offset = round_to_page_boundaries(&phys_addr, &len);
if (readonly)
virt_addr = sys_physmap_ro_cached(phys_addr, len);
else
virt_addr = sys_physmap_rw_uncached(phys_addr, len);
if (ERROR_PTR == virt_addr) {
if (NULL == descr)
descr = "memory";
msg_perr("Error accessing %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n",
descr, len, PRIxPTR_WIDTH, phys_addr);
msg_perr(MEM_DEV " mmap failed: %s\n", strerror(errno));
#ifdef __linux__
if (EINVAL == errno) {
msg_perr("In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),\n");
msg_perr("CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.\n");
msg_perr("Please check if either is enabled in your kernel before reporting a failure.\n");
msg_perr("You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but\n");
msg_perr("disabling the other option unfortunately requires a kernel recompile. Sorry!\n");
}
#elif defined (__OpenBSD__)
msg_perr("Please set securelevel=-1 in /etc/rc.securelevel "
"and reboot, or reboot into\n"
"single user mode.\n");
#endif
return ERROR_PTR;
}
if (autocleanup) {
struct undo_physmap_data *d = malloc(sizeof(struct undo_physmap_data));
if (d == NULL) {
msg_perr("%s: Out of memory!\n", __func__);
physunmap(virt_addr, len);
return ERROR_PTR;
}
d->virt_addr = virt_addr;
d->len = len;
if (register_shutdown(undo_physmap, d) != 0) {
msg_perr("%s: Could not register shutdown function!\n", __func__);
physunmap(virt_addr, len);
return ERROR_PTR;
}
}
return virt_addr + offset;
}
int serialport_write(const unsigned char *buf, unsigned int writecnt)
{
#if IS_WINDOWS
DWORD tmp = 0;
#else
ssize_t tmp = 0;
#endif
unsigned int empty_writes = 250; /* results in a ca. 125ms timeout */
while (writecnt > 0) {
#if IS_WINDOWS
WriteFile(sp_fd, buf, writecnt, &tmp, NULL);
#else
tmp = write(sp_fd, buf, writecnt);
#endif
if (tmp == -1) {
msg_perr("Serial port write error!\n");
return 1;
}
if (!tmp) {
msg_pdbg2("Empty write\n");
empty_writes--;
internal_delay(500);
if (empty_writes == 0) {
msg_perr("Serial port is unresponsive!\n");
return 1;
}
}
writecnt -= tmp;
buf += tmp;
}
return 0;
}
static int pickit2_shutdown(void *data)
{
/* Set all pins to float and turn voltages off */
uint8_t command[CMD_LENGTH] = {
CMD_EXEC_SCRIPT,
8,
SCR_SET_PINS,
3, /* Bit-0=1(PDC In), Bit-1=1(PGD In), Bit-2=0(PDC LL), Bit-3=0(PGD LL) */
SCR_SET_AUX,
1, /* Bit-0=1(Aux In), Bit-1=0(Aux LL) */
SCR_MCLR_GND_OFF,
SCR_VPP_OFF,
SCR_VDD_OFF,
SCR_BUSY_LED_OFF,
CMD_END_OF_BUFFER
};
int ret = usb_interrupt_write(pickit2_handle, ENDPOINT_OUT, (char *)command, CMD_LENGTH, DFLT_TIMEOUT);
if (ret != CMD_LENGTH) {
msg_perr("Command Shutdown failed (%s)!\n", usb_strerror());
ret = 1;
}
if (usb_release_interface(pickit2_handle, 0) != 0) {
msg_perr("Could not release USB interface!\n");
ret = 1;
}
if (usb_close(pickit2_handle) != 0) {
msg_perr("Could not close USB device!\n");
ret = 1;
}
return ret;
}
/* IT8502 employs a scratch ram when flash is being updated. Call the following
* two functions before/after flash erase/program. */
void it85xx_enter_scratch_rom()
{
int ret;
int tries;
msg_pdbg("%s():%d was called ...\n", __FUNCTION__, __LINE__);
if (it85xx_scratch_rom_reenter > 0) return;
#if 0
/* FIXME: this a workaround for the bug that SMBus signal would
* interfere the EC firmware update. Should be removed if
* we find out the root cause. */
ret = system("stop powerd >&2");
if (ret) {
msg_perr("Cannot stop powerd.\n");
}
#endif
for (tries = 0; tries < MAX_TRY; ++tries) {
/* Wait until IBF (input buffer) is not full. */
if (wait_for(KB_IBF, 0, MAX_TIMEOUT,
"* timeout at waiting for IBF==0.\n",
__FUNCTION__, __LINE__))
continue;
/* Copy EC firmware to SRAM. */
OUTB(0xb4, LEGACY_KBC_PORT_CMD);
/* Confirm EC has taken away the command. */
if (wait_for(KB_IBF, 0, MAX_TIMEOUT,
"* timeout at taking command.\n",
__FUNCTION__, __LINE__))
continue;
/* Waiting for OBF (output buffer) has data.
* Note sometimes the replied command might be stolen by kernel
* ISR so that it is okay as long as the command is 0xFA. */
if (wait_for(KB_OBF, KB_OBF, MAX_TIMEOUT, NULL, NULL, 0))
msg_pdbg("%s():%d * timeout at waiting for OBF.\n",
__FUNCTION__, __LINE__);
if ((ret = INB(LEGACY_KBC_PORT_DATA)) == 0xFA) {
break;
} else {
msg_perr("%s():%d * not run on SRAM ret=%d\n",
__FUNCTION__, __LINE__, ret);
continue;
}
}
if (tries < MAX_TRY) {
/* EC already runs on SRAM */
it85xx_scratch_rom_reenter++;
msg_pdbg("%s():%d * SUCCESS.\n", __FUNCTION__, __LINE__);
} else {
msg_perr("%s():%d * Max try reached.\n",
__FUNCTION__, __LINE__);
}
}
void it85xx_exit_scratch_rom()
{
#if 0
int ret;
#endif
int tries;
msg_pdbg("%s():%d was called ...\n", __FUNCTION__, __LINE__);
if (it85xx_scratch_rom_reenter <= 0) return;
for (tries = 0; tries < MAX_TRY; ++tries) {
/* Wait until IBF (input buffer) is not full. */
if (wait_for(KB_IBF, 0, MAX_TIMEOUT,
"* timeout at waiting for IBF==0.\n",
__FUNCTION__, __LINE__))
continue;
/* Exit SRAM. Run on flash. */
OUTB(0xFE, LEGACY_KBC_PORT_CMD);
/* Confirm EC has taken away the command. */
if (wait_for(KB_IBF, 0, MAX_TIMEOUT,
"* timeout at taking command.\n",
__FUNCTION__, __LINE__)) {
/* We cannot ensure if EC has exited update mode.
* If EC is in normal mode already, a further 0xFE
* command will reboot system. So, exit loop here. */
tries = MAX_TRY;
break;
}
break;
}
if (tries < MAX_TRY) {
it85xx_scratch_rom_reenter = 0;
msg_pdbg("%s():%d * SUCCESS.\n", __FUNCTION__, __LINE__);
} else {
msg_perr("%s():%d * Max try reached.\n",
__FUNCTION__, __LINE__);
}
#if 0
/* FIXME: this a workaround for the bug that SMBus signal would
* interfere the EC firmware update. Should be removed if
* we find out the root cause. */
ret = system("start powerd >&2");
if (ret) {
msg_perr("Cannot start powerd again.\n");
}
#endif
}
static int compare_internal_fifo_pointer(uint8_t want)
{
uint8_t have = mmio_readb(sb600_spibar + 0xd) & 0x07;
want %= FIFO_SIZE_OLD;
if (have != want) {
msg_perr("AMD SPI FIFO pointer corruption! Pointer is %d, wanted %d\n", have, want);
msg_perr("Something else is accessing the flash chip and causes random corruption.\n"
"Please stop all applications and drivers and IPMI which access the flash chip.\n");
return 1;
} else {
msg_pspew("AMD SPI FIFO pointer is %d, wanted %d\n", have, want);
return 0;
}
}
static void *physmap_common(const char *descr, unsigned long phys_addr, size_t len, int mayfail, int readonly)
{
void *virt_addr;
if (len == 0) {
msg_pspew("Not mapping %s, zero size at 0x%08lx.\n",
descr, phys_addr);
return ERROR_PTR;
}
if ((getpagesize() - 1) & len) {
msg_perr("Mapping %s at 0x%08lx, unaligned size 0x%lx.\n",
descr, phys_addr, (unsigned long)len);
}
if ((getpagesize() - 1) & phys_addr) {
msg_perr("Mapping %s, 0x%lx bytes at unaligned 0x%08lx.\n",
descr, (unsigned long)len, phys_addr);
}
if (readonly) {
virt_addr = sys_physmap_ro_cached(phys_addr, len);
} else {
virt_addr = sys_physmap_rw_uncached(phys_addr, len);
}
if (ERROR_PTR == virt_addr) {
if (NULL == descr)
descr = "memory";
msg_perr("Error accessing %s, 0x%lx bytes at 0x%08lx\n", descr, (unsigned long)len, phys_addr);
perror(MEM_DEV " mmap failed");
#ifdef __linux__
if (EINVAL == errno) {
msg_perr("In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),\n");
msg_perr("CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.\n");
msg_perr("Please check if either is enabled in your kernel before reporting a failure.\n");
msg_perr("You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but\n");
msg_perr("disabling the other option unfortunately requires a kernel recompile. Sorry!\n");
}
#elif defined (__OpenBSD__)
msg_perr("Please set securelevel=-1 in /etc/rc.securelevel "
"and reboot, or reboot into \n");
msg_perr("single user mode.\n");
#endif
if (!mayfail)
exit(3);
}
return virt_addr;
}
static int jlink_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr)
{
uint32_t length;
uint8_t *buffer;
length = writecnt + readcnt;
if (length > JTAG_MAX_TRANSFER_SIZE)
return SPI_INVALID_LENGTH;
buffer = malloc(length);
if (!buffer) {
msg_perr("Memory allocation failed.\n");
return SPI_GENERIC_ERROR;
}
/* Reverse all bytes because the device transfers data LSB first. */
reverse_bytes(buffer, writearr, writecnt);
memset(buffer + writecnt, 0x00, readcnt);
if (!assert_cs()) {
free(buffer);
return SPI_PROGRAMMER_ERROR;
}
int ret;
ret = jaylink_jtag_io(jaylink_devh, buffer, buffer, buffer, length * 8, JAYLINK_JTAG_VERSION_2);
if (ret != JAYLINK_OK) {
msg_perr("jaylink_jag_io() failed: %s.\n", jaylink_strerror(ret));
free(buffer);
return SPI_PROGRAMMER_ERROR;
}
if (!deassert_cs()) {
free(buffer);
return SPI_PROGRAMMER_ERROR;
}
/* Reverse all bytes because the device transfers data LSB first. */
reverse_bytes(readarr, buffer + writecnt, readcnt);
free(buffer);
return 0;
}
int ogp_spi_init(void)
{
struct pci_dev *dev = NULL;
char *type;
type = extract_programmer_param("rom");
if (!type) {
msg_perr("Please use flashrom -p ogp_spi:rom=... to specify "
"which flashchip you want to access.\n");
return 1;
} else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) {
ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL;
ogp_reg_siso = OGA1_XP10_BPROM_SI;
ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR;
ogp_reg_sck = OGA1_XP10_BPROM_SCK;
} else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) {
ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL;
ogp_reg_siso = OGA1_XP10_CPROM_SI;
ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR;
ogp_reg_sck = OGA1_XP10_CPROM_SCK;
} else {
msg_perr("Invalid or missing rom= parameter.\n");
free(type);
return 1;
}
free(type);
if (rget_io_perms())
return 1;
dev = pcidev_init(ogp_spi, PCI_BASE_ADDRESS_0);
if (!dev)
return 1;
uint32_t io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0);
if (!io_base_addr)
return 1;
ogp_spibar = rphysmap("OGP registers", io_base_addr, 4096);
if (ogp_spibar == ERROR_PTR)
return 1;
if (register_spi_bitbang_master(&bitbang_spi_master_ogp))
return 1;
return 0;
}
int serialport_read(unsigned char *buf, unsigned int readcnt)
{
#if IS_WINDOWS
DWORD tmp = 0;
#else
ssize_t tmp = 0;
#endif
while (readcnt > 0) {
#if IS_WINDOWS
ReadFile(sp_fd, buf, readcnt, &tmp, NULL);
#else
tmp = read(sp_fd, buf, readcnt);
#endif
if (tmp == -1) {
msg_perr("Serial port read error!\n");
return 1;
}
if (!tmp)
msg_pdbg2("Empty read\n");
readcnt -= tmp;
buf += tmp;
}
return 0;
}
int undo_pci_write(void *p)
{
struct undo_pci_write_data *data = p;
if (pacc == NULL) {
msg_perr("%s: Tried to undo PCI writes without a valid PCI context!\n"
"Please report a bug at [email protected]\n", __func__);
return 1;
}
msg_pdbg("Restoring PCI config space for %02x:%02x:%01x reg 0x%02x\n",
data->dev.bus, data->dev.dev, data->dev.func, data->reg);
switch (data->type) {
case pci_write_type_byte:
pci_write_byte(&data->dev, data->reg, data->bytedata);
break;
case pci_write_type_word:
pci_write_word(&data->dev, data->reg, data->worddata);
break;
case pci_write_type_long:
pci_write_long(&data->dev, data->reg, data->longdata);
break;
}
/* p was allocated in register_undo_pci_write. */
free(p);
return 0;
}
/* Might be useful for other USB devices as well. static for now. */
static int parse_voltage(char *voltage)
{
char *tmp = NULL;
int i;
int millivolt = 0, fraction = 0;
if (!voltage || !strlen(voltage)) {
msg_perr("Empty voltage= specified.\n");
return -1;
}
millivolt = (int)strtol(voltage, &tmp, 0);
voltage = tmp;
/* Handle "," and "." as decimal point. Everything after it is assumed
* to be in decimal notation.
*/
if ((*voltage == '.') || (*voltage == ',')) {
voltage++;
for (i = 0; i < 3; i++) {
fraction *= 10;
/* Don't advance if the current character is invalid,
* but continue multiplying.
*/
if ((*voltage < '0') || (*voltage > '9'))
continue;
fraction += *voltage - '0';
voltage++;
}
/* Throw away remaining digits. */
voltage += strspn(voltage, "0123456789");
}
/* The remaining string must be empty or "mV" or "V". */
tolower_string(voltage);
/* No unit or "V". */
if ((*voltage == '\0') || !strncmp(voltage, "v", 1)) {
millivolt *= 1000;
millivolt += fraction;
} else if (!strncmp(voltage, "mv", 2) ||
!strncmp(voltage, "millivolt", 9)) {
/* No adjustment. fraction is discarded. */
} else {
/* Garbage at the end of the string. */
msg_perr("Garbage voltage= specified.\n");
return -1;
}
return millivolt;
}
/* Uses msg_perr to print the last system error.
* Prints "Error: " followed first by \c msg and then by the description of the last error retrieved via
* strerror() or FormatMessage() and ending with a linebreak. */
static void msg_perr_strerror(const char *msg)
{
msg_perr("Error: %s", msg);
#if IS_WINDOWS
char *lpMsgBuf;
DWORD nErr = GetLastError();
FormatMessage(FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_FROM_SYSTEM, NULL, nErr,
MAKELANGID(LANG_NEUTRAL, SUBLANG_DEFAULT), (LPTSTR) &lpMsgBuf, 0, NULL);
msg_perr(lpMsgBuf);
/* At least some formatted messages contain a line break at the end. Make sure to always print one */
if (lpMsgBuf[strlen(lpMsgBuf)-1] != '\n')
msg_perr("\n");
LocalFree(lpMsgBuf);
#else
msg_perr("%s\n", strerror(errno));
#endif
}
static int pickit2_set_spi_voltage(int millivolt)
{
double voltage_selector;
switch (millivolt) {
case 0:
/* Admittedly this one is an assumption. */
voltage_selector = 0;
break;
case 1800:
voltage_selector = 1.8;
break;
case 2500:
voltage_selector = 2.5;
break;
case 3500:
voltage_selector = 3.5;
break;
default:
msg_perr("Unknown voltage %i mV! Aborting.\n", millivolt);
return 1;
}
msg_pdbg("Setting SPI voltage to %u.%03u V\n", millivolt / 1000,
millivolt % 1000);
uint8_t command[CMD_LENGTH] = {
CMD_SET_VDD,
voltage_selector * 2048 + 672,
(voltage_selector * 2048 + 672) / 256,
voltage_selector * 36,
CMD_SET_VPP,
0x40,
voltage_selector * 18.61,
voltage_selector * 13,
CMD_END_OF_BUFFER
};
int ret = usb_interrupt_write(pickit2_handle, ENDPOINT_OUT, (char *)command, CMD_LENGTH, DFLT_TIMEOUT);
if (ret != CMD_LENGTH) {
msg_perr("Command Set Voltage failed (%s)!\n", usb_strerror());
return 1;
}
return 0;
}
static int compare_internal_fifo_pointer(uint8_t want)
{
uint8_t tmp;
tmp = mmio_readb(sb600_spibar + 0xd) & 0x07;
want &= 0x7;
if (want != tmp) {
msg_perr("FIFO pointer corruption! Pointer is %d, wanted %d\n", tmp, want);
msg_perr("Something else is accessing the flash chip and "
"causes random corruption.\nPlease stop all "
"applications and drivers and IPMI which access the "
"flash chip.\n");
return 1;
} else {
msg_pspew("SB600 FIFO pointer is %d, wanted %d\n", tmp, want);
return 0;
}
}
static int pcidev_shutdown(void *data)
{
if (pacc == NULL) {
msg_perr("%s: Tried to cleanup an invalid PCI context!\n"
"Please report a bug at [email protected]\n", __func__);
return 1;
}
pci_cleanup(pacc);
return 0;
}
void physunmap_unaligned(void *virt_addr, size_t len)
{
/* No need to check for zero size, such mappings would have yielded ERROR_PTR. */
if (virt_addr == ERROR_PTR) {
msg_perr("Trying to unmap a nonexisting mapping!\n"
"Please report a bug at [email protected]\n");
return;
}
sys_physunmap_unaligned(virt_addr, len);
}
static int undo_physmap(void *data)
{
if (data == NULL) {
msg_perr("%s: tried to physunmap without valid data!\n", __func__);
return 1;
}
struct undo_physmap_data *d = data;
physunmap(d->virt_addr, d->len);
free(data);
return 0;
}
int ogp_spi_init(void)
{
char *type;
type = extract_programmer_param("rom");
if (!type) {
msg_perr("Please use flashrom -p ogp_spi:rom=... to specify "
"which flashchip you want to access.\n");
return 1;
} else if (!strcasecmp(type, "bprom") || !strcasecmp(type, "bios")) {
ogp_reg_sel = OGA1_XP10_BPROM_REG_SEL;
ogp_reg_siso = OGA1_XP10_BPROM_SI;
ogp_reg__ce = OGA1_XP10_BPROM_CE_BAR;
ogp_reg_sck = OGA1_XP10_BPROM_SCK;
} else if (!strcasecmp(type, "cprom") || !strcasecmp(type, "s3")) {
ogp_reg_sel = OGA1_XP10_CPROM_REG_SEL;
ogp_reg_siso = OGA1_XP10_CPROM_SI;
ogp_reg__ce = OGA1_XP10_CPROM_CE_BAR;
ogp_reg_sck = OGA1_XP10_CPROM_SCK;
} else {
msg_perr("Invalid or missing rom= parameter.\n");
return 1;
}
get_io_perms();
io_base_addr = pcidev_init(PCI_VENDOR_ID_OGP, PCI_BASE_ADDRESS_0,
ogp_spi);
ogp_spibar = physmap("OGP registers", io_base_addr, 4096);
/* no delay for now. */
if (bitbang_spi_init(&bitbang_spi_master_ogp, 0))
return 1;
buses_supported = CHIP_BUSTYPE_SPI;
spi_controller = SPI_CONTROLLER_OGP;
return 0;
}
/* This function copies the struct registered_master parameter. */
int register_master(struct registered_master *mst)
{
if (registered_master_count >= MASTERS_MAX) {
msg_perr("Tried to register more than %i master "
"interfaces.\n", MASTERS_MAX);
return ERROR_FLASHROM_LIMIT;
}
registered_masters[registered_master_count] = *mst;
registered_master_count++;
return 0;
}
/* Returns 0 upon success, a negative number upon errors. */
static int mstarddc_spi_shutdown(void *data)
{
// Reset, disables ISP mode
if (mstarddc_doreset == 1) {
uint8_t cmd = MSTARDDC_SPI_RESET;
if (write(mstarddc_fd, &cmd, 1) < 0) {
msg_perr("Error sending reset command: errno %d.\n",
errno);
return -1;
}
} else {
msg_pinfo("Info: Reset command was not sent. "
"Either the noreset=1 option was used, "
"or an error occured.\n");
}
if (close(mstarddc_fd) < 0) {
msg_perr("Error closing device: errno %d.\n", errno);
return -1;
}
return 0;
}
static bool deassert_cs(void)
{
int ret;
if (reset_cs) {
ret = jaylink_set_reset(jaylink_devh);
if (ret != JAYLINK_OK) {
msg_perr("jaylink_set_reset() failed: %s.\n", jaylink_strerror(ret));
return false;
}
} else {
ret = jaylink_jtag_set_trst(jaylink_devh);
if (ret != JAYLINK_OK) {
msg_perr("jaylink_jtag_set_trst() failed: %s.\n", jaylink_strerror(ret));
return false;
}
}
return true;
}
/* Get I/O permissions with automatic permission release on shutdown. */
int rget_io_perms(void)
{
#if IS_X86 && !(defined(__DJGPP__) || defined(__LIBPAYLOAD__))
#if defined (__sun)
if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {
#elif IS_BSD
if ((io_fd = open("/dev/io", O_RDWR)) < 0) {
#elif IS_LINUX || IS_MACOSX
if (iopl(3) != 0) {
#endif
msg_perr("ERROR: Could not get I/O privileges (%s).\n"
"You need to be root.\n", strerror(errno));
#if defined (__OpenBSD__)
msg_perr("Please set securelevel=-1 in /etc/rc.securelevel and reboot, or reboot into \n");
msg_perr("single user mode.\n");
#endif
return 1;
} else {
register_shutdown(release_io_perms, NULL);
}
#else
/* DJGPP and libpayload environments have full PCI port I/O permissions by default. */
/* PCI port I/O support is unimplemented on PPC/MIPS and unavailable on ARM. */
#endif
return 0;
}
void mmio_writeb(uint8_t val, void *addr)
{
*(volatile uint8_t *) addr = val;
sync_primitive();
}
void mmio_writew(uint16_t val, void *addr)
{
*(volatile uint16_t *) addr = val;
sync_primitive();
}
int close_logfile(void)
{
if (!logfile)
return 0;
/* No need to call fflush() explicitly, fclose() already does that. */
if (fclose(logfile)) {
/* fclose returned an error. Stop writing to be safe. */
logfile = NULL;
msg_perr("Closing the log file returned error %s\n", strerror(errno));
return 1;
}
logfile = NULL;
return 0;
}
int register_opaque_programmer(const struct opaque_programmer *pgm)
{
struct registered_programmer rpgm;
if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
msg_perr("%s called with incomplete programmer definition. "
"Please report a bug at [email protected]\n",
__func__);
return ERROR_FLASHROM_BUG;
}
rpgm.buses_supported = BUS_PROG;
rpgm.opaque = *pgm;
return register_programmer(&rpgm);
}
int pci_init_common(void)
{
if (pacc != NULL) {
msg_perr("%s: Tried to allocate a new PCI context, but there is still an old one!\n"
"Please report a bug at [email protected]\n", __func__);
return 1;
}
pacc = pci_alloc(); /* Get the pci_access structure */
pci_init(pacc); /* Initialize the PCI library */
if (register_shutdown(pcidev_shutdown, NULL))
return 1;
pci_scan_bus(pacc); /* We want to get the list of devices */
return 0;
}
int wrmsr(int addr, msr_t msr)
{
struct amdmsr_req args;
args.addr = addr;
args.val = (((uint64_t)msr.hi) << 32) | msr.lo;
if (ioctl(fd_msr, WRMSR, &args) < 0) {
msg_perr("Error while executing WRMSR ioctl: %s\n", strerror(errno));
close(fd_msr);
exit(1);
}
return 0;
}
int wrmsr(int addr, msr_t msr)
{
cpu_msr_args_t args;
args.msr = addr;
args.data = (((uint64_t)msr.hi) << 32) | msr.lo;
if (ioctl(fd_msr, CPU_WRMSR, &args) < 0) {
msg_perr("Error while executing CPU_WRMSR ioctl: %s\n", strerror(errno));
close(fd_msr);
exit(1);
}
return 0;
}
