void __msm_gpiomux_write(unsigned gpio, struct gpiomux_setting val) { unsigned tlmm_config; unsigned tlmm_disable = 0; void __iomem *out_reg; unsigned offset; uint32_t bits; int rc; tlmm_config = (val.drv << 17) | (val.pull << 15) | ((gpio & 0x3ff) << 4) | val.func; if (val.func == GPIOMUX_FUNC_GPIO) { tlmm_config |= (val.dir > GPIOMUX_IN ? BIT(14) : 0); msm_gpio_find_out(gpio, &out_reg, &offset); bits = readl(out_reg); if (val.dir == GPIOMUX_OUT_HIGH) writel(bits | BIT(offset), out_reg); else writel(bits & ~BIT(offset), out_reg); } rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX, &tlmm_config, &tlmm_disable); if (rc) pr_err("%s: unexpected proc_comm failure %d: %08x %08x\n", __func__, rc, tlmm_config, tlmm_disable); }
static void Tpsc(TpsPumpRes_t *pstRes, u32 n, bool Dir) { void __iomem *reg; unsigned long irq_flags; u32 i, offset, delay, loops; msm_gpio_find_out(pstRes->Id, ®, &offset); delay = Dir ? 20 : 200; //printk("Tpsc n:%d, d:%d\n", n, Dir); spin_lock_irqsave(&atom_lock, irq_flags); loops = loops_per_jiffy/(1000000/HZ); loops *= delay; for (i = 0; i < n; i++) { msm_gpio_set_bit(offset, reg); // delay 1us msm_gpio_clr_bit(offset, reg); __delay(loops); } msm_gpio_set_bit(offset, reg); spin_unlock_irqrestore(&atom_lock, irq_flags); udelay(1000); }