static void msm_mpm_set(bool wakeset) { uint32_t *irqs; unsigned int reg; int i; irqs = wakeset ? msm_mpm_wake_irq : msm_mpm_enabled_irq; for (i = 0; i < MSM_MPM_REG_WIDTH; i++) { reg = MSM_MPM_REQUEST_REG_ENABLE; msm_mpm_write(reg, i, irqs[i]); reg = MSM_MPM_REQUEST_REG_DETECT_CTL; msm_mpm_write(reg, i, msm_mpm_detect_ctl[i]); reg = MSM_MPM_REQUEST_REG_POLARITY; msm_mpm_write(reg, i, msm_mpm_polarity[i]); reg = MSM_MPM_REQUEST_REG_CLEAR; msm_mpm_write(reg, i, 0xffffffff); } /* Ensure that the set operation is complete before sending the * interrupt */ mb(); msm_mpm_send_interrupt(); }
static void msm_mpm_clear(void) { int i; for (i = 0; i < MSM_MPM_REG_WIDTH; i++) { msm_mpm_write(MSM_MPM_REQUEST_REG_ENABLE, i, 0); msm_mpm_write(MSM_MPM_REQUEST_REG_CLEAR, i, 0xffffffff); } mb(); msm_mpm_send_interrupt(); }
static void msm_mpm_clear(void) { int i; for (i = 0; i < MSM_MPM_REG_WIDTH; i++) { msm_mpm_write(MSM_MPM_REQUEST_REG_ENABLE, i, 0); msm_mpm_write(MSM_MPM_REQUEST_REG_CLEAR, i, 0xffffffff); } /* Ensure the clear is complete before sending the interrupt */ mb(); msm_mpm_send_interrupt(); }
static void msm_mpm_set(bool wakeset) { uint32_t *irqs; unsigned int reg; int i; irqs = wakeset ? msm_mpm_wake_irq : msm_mpm_enabled_irq; for (i = 0; i < MSM_MPM_REG_WIDTH; i++) { reg = MSM_MPM_REQUEST_REG_ENABLE; msm_mpm_write(reg, i, irqs[i]); reg = MSM_MPM_REQUEST_REG_DETECT_CTL; msm_mpm_write(reg, i, msm_mpm_detect_ctl[i]); reg = MSM_MPM_REQUEST_REG_POLARITY; msm_mpm_write(reg, i, msm_mpm_polarity[i]); reg = MSM_MPM_REQUEST_REG_CLEAR; msm_mpm_write(reg, i, 0xffffffff); } msm_mpm_write_barrier(); msm_mpm_send_interrupt(); }
static void msm_mpm_set(bool wakeset) { uint32_t *irqs; unsigned int reg; int i; irqs = wakeset ? msm_mpm_wake_irq : msm_mpm_enabled_irq; for (i = 0; i < MSM_MPM_REG_WIDTH; i++) { reg = MSM_MPM_REQUEST_REG_ENABLE; msm_mpm_write(reg, i, irqs[i]); reg = MSM_MPM_REQUEST_REG_DETECT_CTL; msm_mpm_write(reg, i, msm_mpm_detect_ctl[i]); reg = MSM_MPM_REQUEST_REG_POLARITY; msm_mpm_write(reg, i, msm_mpm_polarity[i]); reg = MSM_MPM_REQUEST_REG_CLEAR; msm_mpm_write(reg, i, 0xffffffff); #if 0 /* print debug about gpio 69 which is the 13th bit for interrupt on mpm */ if (irqs == msm_mpm_wake_irq && i == 1) { printk(KERN_ERR "QCT %s 0x%x\n", __func__, irqs[i]); printk(KERN_ERR "QCT %s 0x%x\n", __func__, msm_mpm_detect_ctl[i]); printk(KERN_ERR "QCT %s 0x%x\n", __func__, msm_mpm_polarity[i]); } #endif } /* Ensure that the set operation is complete before sending the * interrupt */ mb(); msm_mpm_send_interrupt(); }