static int mt76x2_eeprom_load(struct mt76x2_dev *dev) { void *efuse; int len = MT7662_EEPROM_SIZE; bool found; int ret; ret = mt76_eeprom_init(&dev->mt76, len); if (ret < 0) return ret; found = ret; if (found) found = !mt76x2_check_eeprom(dev); dev->mt76.otp.data = devm_kzalloc(dev->mt76.dev, len, GFP_KERNEL); dev->mt76.otp.size = len; if (!dev->mt76.otp.data) return -ENOMEM; efuse = dev->mt76.otp.data; if (mt76x2_get_efuse_data(dev, efuse, len)) goto out; if (found) { mt76x2_apply_cal_free_data(dev, efuse); } else { /* FIXME: check if efuse data is complete */ found = true; memcpy(dev->mt76.eeprom.data, efuse, len); } out: if (!found) return -ENOENT; return 0; }
int mt76_init_hardware(struct mt76_dev *dev) { static const u16 beacon_offsets[16] = { /* 1024 byte per beacon */ 0xc000, 0xc400, 0xc800, 0xcc00, 0xd000, 0xd400, 0xd800, 0xdc00, /* BSS idx 8-15 not used for beacons */ 0xc000, 0xc000, 0xc000, 0xc000, 0xc000, 0xc000, 0xc000, 0xc000, }; u32 val; int ret; dev->beacon_offsets = beacon_offsets; tasklet_init(&dev->pre_tbtt_tasklet, mt76_pre_tbtt_tasklet, (unsigned long) dev); dev->chainmask = 0x202; val = mt76_rr(dev, MT_WPDMA_GLO_CFG); val &= MT_WPDMA_GLO_CFG_DMA_BURST_SIZE | MT_WPDMA_GLO_CFG_BIG_ENDIAN | MT_WPDMA_GLO_CFG_HDR_SEG_LEN; val |= MT_WPDMA_GLO_CFG_TX_WRITEBACK_DONE; mt76_wr(dev, MT_WPDMA_GLO_CFG, val); mt76_reset_wlan(dev, true); mt76_power_on(dev); ret = mt76_eeprom_init(dev); if (ret) return ret; ret = mt76_mac_reset(dev, true); if (ret) return ret; ret = mt76_dma_init(dev); if (ret) return ret; set_bit(MT76_STATE_INITIALIZED, &dev->state); ret = mt76_mac_start(dev); if (ret) return ret; ret = mt76_mcu_init(dev); if (ret) return ret; mt76_mac_stop(dev, false); dev->rxfilter = mt76_rr(dev, MT_RX_FILTR_CFG); return 0; }