static void mv_enter_standby(void)
{
u32 reg;
static MV_U32 pwrUpDelay = 0;
pr_debug("kw2_standby: Entering STANDBY mode.\n");
if (pwrUpDelay == 0)
pwrUpDelay = mvBoardPwrUpDelayGet();
count_standby++;
save_kw2_cpu_win_state();
/* Prepare resume PC */
MV_REG_WRITE(PMU_CPU_BOOT_ADDR, virt_to_phys(kw2_cpu_resume));
MV_REG_WRITE(PMU_PWR_UP_DELAY, pwrUpDelay);
MV_REG_WRITE(PMU_CPU_STATUS_MASK, 0x00310000);
/* L2 Power down enable */
if (mvCpuL2Exists())
MV_REG_BIT_SET(PMU_L2C_CTRL_AND_CONF, BIT20);
/* CPU Power down enable */
MV_REG_BIT_SET(PMU_CPU_CTRL_AND_CONF, BIT20);
/* CPU Power down request */
MV_REG_BIT_SET(PMU_CPU_CTRL_AND_CONF, BIT16);
/* Suspend the CPU only */
if (kw2_cpu_suspend() == 0)
cpu_init();
restore_kw2_cpu_win_state();
reg = MV_REG_READ(PMU_CPU_STATUS_MASK);
reg &= ~0x3310000;
MV_REG_WRITE(PMU_CPU_STATUS_MASK, reg);
pr_debug("kw2_standby: Exiting STANDBY mode.\n");
}
void misc_init_r_env(void){
char *env;
char tmp_buf[10];
unsigned int malloc_len;
DECLARE_GLOBAL_DATA_PTR;
// char buff[256];
#if 0
unsigned int flashSize =0 , secSize =0, ubootSize =0;
#if defined(MV_BOOTSIZE_4M)
flashSize = _4M;
#elif defined(MV_BOOTSIZE_8M)
flashSize = _8M;
#elif defined(MV_BOOTSIZE_16M)
flashSize = _16M;
#elif defined(MV_BOOTSIZE_32M)
flashSize = _32M;
#elif defined(MV_BOOTSIZE_64M)
flashSize = _64M;
#endif
#if defined(MV_SEC_64K)
secSize = _64K;
ubootSize = _512K;
#elif defined(MV_SEC_128K)
secSize = _128K;
ubootSize = _128K * 5;
#elif defined(MV_SEC_256K)
secSize = _256K;
ubootSize = _256K * 3;
#endif
if ((0 == flashSize) || (0 == secSize) || (0 == ubootSize))
{
env = getenv("console");
if(!env)
setenv("console","console=ttyS0,115200");
}
else
#endif
env = getenv("console");
if(!env) {
if (mvBoardIdGet() == RD_88F6510_SFU_ID)
setenv("console","console=ttyS0,115200 mv_port1_config=disconnected");
else
setenv("console","console=ttyS0,115200");
}
/*#if defined(MV_SPI_BOOT)
sprintf(buff,"console=ttyS0,115200 mtdparts=spi_flash:0x%x@0(uboot)ro,0x%x@0x%x(root)",
0x100000, flash->size - 0x100000, 0x100000);
env = getenv("console");
if(!env)
setenv("console",buff);
#endif*/
// #if defined(MV_NAND_BOOT)
// sprintf(buff,"console=ttyS0,115200 mtdparts=nand_mtd:0x%x@0(uboot)ro,0x%x@0x%x(root)",
// 0x100000, nand_info[0].size - 0x100000, 0x100000);
// env = getenv("console");
// if(!env)
// setenv("console",buff);
//env = getenv("nandEnvBase");
//strcpy(env, "");
// sprintf(buff, "0x%x", nandEnvBase);
// setenv("nandEnvBase", buff);
// #endif
#if 0
/* Linux open port support */
env = getenv("mainlineLinux");
if(env && ((strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0)))
setenv("mainlineLinux","yes");
else
setenv("mainlineLinux","no");
env = getenv("mainlineLinux");
if(env && ((strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0)))
{
/* arch number for open port Linux */
env = getenv("arcNumber");
if(!env )
{
/* arch number according to board ID */
int board_id = mvBoardIdGet();
switch(board_id){
case(DB_88F6281A_BP_ID):
sprintf(tmp_buf,"%d", DB_88F6281_BP_MLL_ID);
board_id = DB_88F6281_BP_MLL_ID;
break;
case(RD_88F6192A_ID):
sprintf(tmp_buf,"%d", RD_88F6192_MLL_ID);
board_id = RD_88F6192_MLL_ID;
break;
case(RD_88F6281A_ID):
sprintf(tmp_buf,"%d", RD_88F6281_MLL_ID);
board_id = RD_88F6281_MLL_ID;
break;
case(DB_CUSTOMER_ID):
break;
default:
sprintf(tmp_buf,"%d", board_id);
board_id = board_id;
break;
}
gd->bd->bi_arch_number = board_id;
setenv("arcNumber", tmp_buf);
}
else
{
gd->bd->bi_arch_number = simple_strtoul(env, NULL, 10);
}
}
#endif
/* update the CASset env parameter */
env = getenv("CASset");
if(!env )
{
#ifdef MV_MIN_CAL
setenv("CASset","min");
#else
setenv("CASset","max");
#endif
}
/* Monitor extension */
#ifdef MV_INCLUDE_MONT_EXT
env = getenv("enaMonExt");
if(/* !env || */ ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) )
setenv("enaMonExt","yes");
else
#endif
setenv("enaMonExt","no");
#if defined (MV_INC_BOARD_NOR_FLASH)
env = getenv("enaFlashBuf");
if (((strcmp(env,"no") == 0) || (strcmp(env,"No") == 0)))
setenv("enaFlashBuf","no");
else
setenv("enaFlashBuf","yes");
#endif
/* CPU streaming */
env = getenv("enaCpuStream");
if(!env || ( (strcmp(env,"no") == 0) || (strcmp(env,"No") == 0) ) )
setenv("enaCpuStream","no");
else
setenv("enaCpuStream","yes");
/* Write allocation */
env = getenv("enaWrAllo");
if( !env || ( ((strcmp(env,"no") == 0) || (strcmp(env,"No") == 0) )))
setenv("enaWrAllo","no");
else
setenv("enaWrAllo","yes");
/* Pex mode */
env = getenv("pexMode");
if( env && ( ((strcmp(env,"EP") == 0) || (strcmp(env,"ep") == 0) )))
setenv("pexMode","EP");
else
setenv("pexMode","RC");
env = getenv("disL2Cache");
if((mvCpuL2Exists() == MV_TRUE) && (!env || (strcmp(env,"no") == 0) || (strcmp(env,"No") == 0)))
setenv("disL2Cache","no");
else
setenv("disL2Cache","yes");
env = getenv("setL2CacheWT");
if(!env || ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) )
setenv("setL2CacheWT","yes");
else
setenv("setL2CacheWT","no");
env = getenv("disL2Prefetch");
if(!env || ( (strcmp(env,"yes") == 0) || (strcmp(env,"Yes") == 0) ) ) {
setenv("disL2Prefetch","yes");
/* ICache Prefetch */
env = getenv("enaICPref");
if( env && ( ((strcmp(env,"no") == 0) || (strcmp(env,"No") == 0) )))
setenv("enaICPref","no");
else
setenv("enaICPref","yes");
/* DCache Prefetch */
env = getenv("enaDCPref");
if( env && ( ((strcmp(env,"no") == 0) || (strcmp(env,"No") == 0) )))
setenv("enaDCPref","no");
else
setenv("enaDCPref","yes");
} else {
setenv("disL2Prefetch","no");
setenv("enaICPref","no");
setenv("enaDCPref","no");
}
env = getenv("sata_dma_mode");
if( env && ((strcmp(env,"No") == 0) || (strcmp(env,"no") == 0) ) )
setenv("sata_dma_mode","no");
else
setenv("sata_dma_mode","yes");
/* Malloc length */
env = getenv("MALLOC_len");
malloc_len = simple_strtoul(env, NULL, 10) << 20;
if(malloc_len == 0) {
sprintf(tmp_buf,"%d",CONFIG_SYS_MALLOC_LEN>>20);
setenv("MALLOC_len",tmp_buf);
}
