void set_pcie_enable_bits(device_t dev, u32 reg_pos, u32 mask, u32 val) { u32 reg_old, reg; reg = reg_old = nb_read_index(dev, NBPCIE_INDEX, reg_pos); reg &= ~mask; reg |= val; if (reg != reg_old) { nb_write_index(dev, NBPCIE_INDEX, reg_pos, reg); } }
static u32 nbmc_read_index(pci_devfn_t nb_dev, u32 index) { return nb_read_index((nb_dev), NBMC_INDEX, (index)); }
static u32 htiu_read_index(pci_devfn_t nb_dev, u32 index) { return nb_read_index((nb_dev), NBHTIU_INDEX, (index)); }
static u32 nbmisc_read_index(device_t nb_dev, u32 index) { return nb_read_index((nb_dev), NBMISC_INDEX, (index)); }
u32 nbpcie_ind_read_index(device_t nb_dev, u32 index) { return nb_read_index((nb_dev), NBPCIE_INDEX, (index)); }
u32 nbmc_read_index(device_t nb_dev, u32 index) { return nb_read_index((nb_dev), NBMC_INDEX, (index)); }
u32 htiu_read_index(device_t nb_dev, u32 index) { return nb_read_index((nb_dev), NBHTIU_INDEX, (index)); }