/*
* IPIs are 'fast' interrupts, so we deal with them directly from our
* signal handler.
*
* WARNING: Signals are not physically disabled here so we have to enter
* our critical section before bumping gd_intr_nesting_level or another
* interrupt can come along and get really confused.
*/
static
void
ipisig(int nada, siginfo_t *info, void *ctxp)
{
globaldata_t gd = mycpu;
thread_t td = gd->gd_curthread;
if (td->td_critcount == 0) {
++td->td_critcount;
++gd->gd_intr_nesting_level;
atomic_swap_int(&gd->gd_npoll, 0);
lwkt_process_ipiq();
--gd->gd_intr_nesting_level;
--td->td_critcount;
} else {
need_ipiq();
}
}
/*
* IPIs are 'fast' interrupts, so we deal with them directly from our
* signal handler.
*
* WARNING: Signals are not physically disabled here so we have to enter
* our critical section before bumping gd_intr_nesting_level or another
* interrupt can come along and get really confused.
*/
static
void
ipisig(int nada, siginfo_t *info, void *ctxp)
{
globaldata_t gd = mycpu;
thread_t td = gd->gd_curthread;
int save;
save = errno;
if (td->td_critcount == 0) {
crit_enter_raw(td);
++gd->gd_cnt.v_ipi;
++gd->gd_intr_nesting_level;
atomic_swap_int(&gd->gd_npoll, 0);
lwkt_process_ipiq();
--gd->gd_intr_nesting_level;
crit_exit_raw(td);
} else {
need_ipiq();
}
errno = save;
}
