/** * @brief This function is generic interrupt handler * * @param[in] p_reg pointer to timer registers * @param[in] timer_id specifies the timer id * * @return NRF_SUCCESS on success, otherwise an error code. */ static void nrf_drv_timer_interrupt_handle(NRF_TIMER_Type * p_reg, uint32_t timer_id) { uint32_t i; for(i=0; i<TIMER_CHANNEL_NUMBER; i++) { nrf_timer_events_t event = (nrf_timer_events_t)((uint32_t)NRF_TIMER_EVENTS_COMPARE0 + (i*sizeof(uint32_t))); if (nrf_timer_event_check(p_reg, event) && nrf_timer_int_enable_check(p_reg, (nrf_timer_int_mask_t)((uint32_t)NRF_TIMER_INT_COMPARE0_MASK << i))) { nrf_timer_event_clear(p_reg, event); (m_timer_event_handlers[timer_id])(event); } } }
void us_ticker_set_interrupt(timestamp_t timestamp) { core_util_critical_section_enter(); const uint32_t counter_mask = ((1ULL << US_TICKER_COUNTER_BITS) - 1); nrf_timer_cc_write(NRF_TIMER1, NRF_TIMER_CC_CHANNEL0, timestamp & counter_mask); if (!nrf_timer_int_enable_check(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0))) { nrf_timer_event_clear(NRF_TIMER1, NRF_TIMER_EVENT_COMPARE0); nrf_timer_int_enable(NRF_TIMER1, nrf_timer_compare_int_get(NRF_TIMER_CC_CHANNEL0)); } core_util_critical_section_exit(); }
static void irq_handler(NRF_TIMER_Type * p_reg, timer_control_block_t * p_cb, uint8_t channel_count) { uint8_t i; for (i = 0; i < channel_count; ++i) { nrf_timer_event_t event = nrf_timer_compare_event_get(i); nrf_timer_int_mask_t int_mask = nrf_timer_compare_int_get(i); if (nrf_timer_event_check(p_reg, event) && nrf_timer_int_enable_check(p_reg, int_mask)) { nrf_timer_event_clear(p_reg, event); p_cb->handler(event, p_cb->context); } } }