int8_t tdma_init (uint8_t mode, uint8_t chan, uint16_t my_mac)
{
tx_reserve = -1;
tdma_rx_failure_cnt = 0;
tdma_mode = mode;
tdma_tx_slots = 0;
sync_status=0;
tdma_slots_per_cycle = TDMA_DEFAULT_SLOTS_PER_CYCLE;
tdma_rx_pkt_signal = nrk_signal_create ();
if (tdma_rx_pkt_signal == NRK_ERROR) {
nrk_kprintf (PSTR ("TDMA ERROR: creating rx signal failed\r\n"));
nrk_kernel_error_add (NRK_SIGNAL_CREATE_ERROR, nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
tdma_tx_pkt_done_signal = nrk_signal_create ();
if (tdma_tx_pkt_done_signal == NRK_ERROR) {
nrk_kprintf (PSTR ("TDMA ERROR: creating tx signal failed\r\n"));
nrk_kernel_error_add (NRK_SIGNAL_CREATE_ERROR, nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
tdma_enable_signal = nrk_signal_create ();
if (tdma_enable_signal == NRK_ERROR) {
nrk_kprintf (PSTR ("TDMA ERROR: creating enable signal failed\r\n"));
nrk_kernel_error_add (NRK_SIGNAL_CREATE_ERROR, nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
// Set the one main rx buffer
tdma_rx_pkt_set_buffer (tdma_rx_buf, TDMA_MAX_PKT_SIZE);
tdma_rx_buf_empty = 1;
tx_data_ready = 0;
// Setup the radio
rf_init (&tdma_rfRxInfo, chan, 0xffff, my_mac);
tdma_chan = chan;
tdma_my_mac = my_mac;
//FASTSPI_SETREG (CC2420_RSSI, 0xE580); // CCA THR=-25
//FASTSPI_SETREG (CC2420_TXCTRL, 0x80FF); // TX TURNAROUND = 128 us
//FASTSPI_SETREG (CC2420_RXCTRL1, 0x0A56);
// default cca thresh of -45
rf_set_cca_thresh (-45);
asm volatile ("":::"memory");
tdma_running = 1;
tdma_is_enabled = 1;
return NRK_OK;
}
uint8_t init_periodic(uint8_t priority, periodic_func_t **funcs)
{
uint8_t num_tasks = 0;
LOG("init: prio "); LOGP("%u\r\n", priority);
func_signal = nrk_signal_create();
if (func_signal == NRK_ERROR)
ABORT("create sig: func\r\n");
functions = funcs;
num_tasks++;
PERIODIC_TASK.task = periodic_task;
PERIODIC_TASK.Ptos = (void *) &periodic_task_stack[STACKSIZE_PERIODIC - 1];
PERIODIC_TASK.Pbos = (void *) &periodic_task_stack[0];
PERIODIC_TASK.prio = priority;
PERIODIC_TASK.FirstActivation = TRUE;
PERIODIC_TASK.Type = BASIC_TASK;
PERIODIC_TASK.SchType = PREEMPTIVE;
PERIODIC_TASK.period.secs = 0;
PERIODIC_TASK.period.nano_secs = 0;
PERIODIC_TASK.cpu_reserve.secs = 0;
PERIODIC_TASK.cpu_reserve.nano_secs = 0;
PERIODIC_TASK.offset.secs = 0;
PERIODIC_TASK.offset.nano_secs = 0;
nrk_activate_task (&PERIODIC_TASK);
return num_tasks;
}
uint8_t init_rftop(uint8_t priority)
{
uint8_t num_tasks = 0;
LOG("init: prio "); LOGP("%u\r\n", priority);
discover_signal = nrk_signal_create();
if (discover_signal == NRK_ERROR)
ABORT("create sig: discover\r\n");
num_tasks++;
DISCOVER_TASK.task = discover_task;
DISCOVER_TASK.Ptos = (void *) &discover_task_stack[STACKSIZE_DISCOVER - 1];
DISCOVER_TASK.Pbos = (void *) &discover_task_stack[0];
DISCOVER_TASK.prio = priority;
DISCOVER_TASK.FirstActivation = TRUE;
DISCOVER_TASK.Type = BASIC_TASK;
DISCOVER_TASK.SchType = PREEMPTIVE;
DISCOVER_TASK.period.secs = DISCOVER_TASK_PERIOD_S;
DISCOVER_TASK.period.nano_secs = 0;
DISCOVER_TASK.cpu_reserve.secs = 0;
DISCOVER_TASK.cpu_reserve.nano_secs = 0;
DISCOVER_TASK.offset.secs = 10;
DISCOVER_TASK.offset.nano_secs = 0;
nrk_activate_task (&DISCOVER_TASK);
ASSERT(num_tasks == NUM_TASKS_RFTOP);
return num_tasks;
}
/**
* isa_init()
*
* This function sets up the low level link layer parameters.
* This starts the main timer routine that will then automatically
* trigger whenever a packet might be sent or received.
* This should be called before ANY scheduling information is set
* since it will clear some default values.
*
*/
uint8_t isa_init (isa_node_mode_t mode, uint8_t id, uint8_t src_id)
{
uint8_t i;
/* Generate signals */
isa_rx_pkt_signal=nrk_signal_create();
if(isa_rx_pkt_signal==NRK_ERROR){
nrk_kprintf(PSTR("ISA ERROR: creating rx signal failed\r\n"));
nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
isa_tx_done_signal=nrk_signal_create();
if(isa_tx_done_signal==NRK_ERROR){
nrk_kprintf(PSTR("ISA ERROR: creating tx signal failed\r\n"));
nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
// No buffer to start with
isa_rfRxInfo.pPayload = NULL;
isa_rfRxInfo.max_length = 0;
/*FIXME Actually we dont need to always run the high speed timer */
_nrk_high_speed_timer_start();
/* clear everything out */
global_cycle = 0;
global_slot = MAX_ISA_GLOBAL_SLOTS;
_isa_sync_ok = 0;
_isa_join_ok = 0;
slot_expired = 0;
isa_node_mode = mode;
isa_id = id;//change
isa_clk_src_id=src_id; //change
isa_rx_data_ready = 0;
isa_tx_data_ready = 0;
isa_param.mobile_sync_timeout = 100;
isa_param.rx_timeout = 8000; // 8000 *.125us = 1ms
isa_param.tx_guard_time = TX_GUARD_TIME;
isa_param.channel = 15;
isa_param.mac_addr = 0x1980;
for (i = 0; i < ISA_SLOTS_PER_FRAME; i++) {
isa_sched[i] = 0;
}
isa_tdma_rx_mask = 0;
isa_tdma_tx_mask = 0;
/* Setup the cc2420 chip */
rf_init (&isa_rfRxInfo, isa_param.channel, 0x2420, isa_param.mac_addr);
AFTER_FIRST_SYNC = 1;
/* Setup fisrt hopping channel */
#ifdef CHANNEL_HOPPING
slowIndex=0;
if(id!=0){
channelIndex = src_id;
currentChannel = slottedPattern[channelIndex];
}else{
channelIndex = 0;
currentChannel = slottedPattern[channelIndex];
}
isa_set_channel(currentChannel);
#endif
#ifdef JOIN_PROCESS
if(mode==ISA_GATEWAY){
for(i=22;i<=24;i++){
isa_tx_info[i].pPayload = join_pkt_buf;
isa_tx_info[i].length = PKT_DATA_START+1; // pass le pointer
isa_tx_info[i].DHDR = configDHDR();
isa_tx_data_ready |= ((uint32_t) 1 << i); // set the flag
}
}
#endif
return NRK_OK;
}
int8_t bmac_init (uint8_t chan)
{
bmac_running=0;
tx_reserve=-1;
cca_active=true;
rx_failure_cnt=0;
#ifdef NRK_SW_WDT
#ifdef BMAC_SW_WDT_ID
_bmac_check_period.secs=30;
_bmac_check_period.nano_secs=0;
nrk_sw_wdt_init(BMAC_SW_WDT_ID, &_bmac_check_period, NULL );
nrk_sw_wdt_start(BMAC_SW_WDT_ID);
#endif
#endif
_bmac_check_period.secs=0;
_bmac_check_period.nano_secs=BMAC_DEFAULT_CHECK_RATE_MS*NANOS_PER_MS;
// SIGNAL
/* bmac_rx_pkt_signal=nrk_signal_create();
if(bmac_rx_pkt_signal==NRK_ERROR)
{
printf("BMAC ERROR: creating rx signal failed\r\n");
// nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID); // commented out by madhur: error implementation has not been checked yet
return NRK_ERROR;
}
*/ bmac_tx_pkt_done_signal=nrk_signal_create();
if(bmac_tx_pkt_done_signal==NRK_ERROR)
{
printf("BMAC ERROR: creating tx signal failed\r\n");
//nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
bmac_enable_signal=nrk_signal_create();
if(bmac_enable_signal==NRK_ERROR)
{
printf("BMAC ERROR: creating enable signal failed\r\n");
// nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
tx_data_ready=0;
// Set the one main rx buffer
rx_buf_empty=0;
bmac_rfRxInfo.pPayload = NULL;
bmac_rfRxInfo.max_length = 0;
// Setup the MRF24J40 chip
rf_init (&bmac_rfRxInfo, chan, 0xffff, 0);
g_chan=chan;
/*
FASTSPI_SETREG(CC2420_RSSI, 0xE580); // CCA THR=-25
FASTSPI_SETREG(CC2420_TXCTRL, 0x80FF); // TX TURNAROUND = 128 us
FASTSPI_SETREG(CC2420_RXCTRL1, 0x0A56);
*/
// default cca thresh of -45
//rf_set_cca_thresh(-45);
rf_set_cca_thresh(-45);
// Disable checking address field
rf_addr_decode_disable();
bmac_running=1;
is_enabled=1;
return NRK_OK;
}
int main ()
{
uint8_t v_TempCnt_u8r, v_Dummy_u8r, v_RdLcycmode_u8r;
nrk_setup_ports();
nrk_setup_uart(UART_BAUDRATE_115K2);
nrk_kprintf( PSTR("Starting up...\r\n") );
//////////////////////////////////////////////////
F_ChkIntEntry_U8R = 0;
nrk_led_clr(BLUE_LED);
nrk_led_clr(GREEN_LED);
nrk_led_clr(ORANGE_LED);
nrk_led_clr(RED_LED);
for(v_TempCnt_u8r=0;v_TempCnt_u8r<100;v_TempCnt_u8r++)
V_TxBuff_U8R[v_TempCnt_u8r]=v_TempCnt_u8r+'a';
V_RdPtr_U32R = 0;
slip_tx(&V_TxBuff_U8R[V_RdPtr_U32R],C_SlipPktSize,&V_TxBuff_U8R[C_CircBuffSize-1],C_CircBuffSize);
signal_one=nrk_signal_create();
sei();
DDRD &= ~(_BV(PORTD3)); //Making INT3 pin as input
EIMSK = 0x00;
EICRA = 0x80;
EIMSK = 0x08;
printf("#");
//Set ADE in normal power mode PM0=1 (PE2), PM!=0 (PE3)
DDRE |= _BV(PORTE2) | _BV(PORTE3);
PORTE |= _BV(PORTE2);
PORTE &= ~(_BV(PORTE3));
while(F_ChkIntEntry_U8R==0);
while(EIMSK !=0);
//Enable SPI Master, Set Clock rate fck/4
SPCR = 0x01;
SPCR |= _BV(SPE) | _BV(MSTR) | _BV(CPOL) | _BV(CPHA);
PORTB |= _BV(PORTB0);//default state of SS should be low
v_RdLcycmode_u8r=0;
//This segment below is added because it was observed that the 7878
//SPI or the ATMEL SPI takes some time to start. So waiting till
//some register gives its default value
printf("Wait..");
while(v_RdLcycmode_u8r!=0x78)
v_RdLcycmode_u8r = ade_read8(LCYCMODE);
printf("\r\n7878 Ready");
if(ade_init() < 0)
printf("\nInit failed");
else
printf("\nInit Success");
V_Status1RdWr_U32R = ade_read32(STATUS1);
ade_write32(STATUS1, V_Status1RdWr_U32R);
/////////////////////////////////////////////////
nrk_init();
nrk_time_set(0,0);
nrk_create_taskset ();
nrk_start();
return 0;
}
/**
* isa_init()
*
* This function sets up the low level link layer parameters.
* This starts the main timer routine that will then automatically
* trigger whenever a packet might be sent or received.
* This should be called before ANY scheduling information is set
* since it will clear some default values.
*
*/
uint8_t isa_init (isa_node_mode_t mode, uint8_t id)
{
uint8_t i;
/* Generate signals */
isa_rx_pkt_signal=nrk_signal_create();
if(isa_rx_pkt_signal==NRK_ERROR){
nrk_kprintf(PSTR("ISA ERROR: creating rx signal failed\r\n"));
nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
isa_tx_done_signal=nrk_signal_create();
if(isa_tx_done_signal==NRK_ERROR){
nrk_kprintf(PSTR("ISA ERROR: creating tx signal failed\r\n"));
nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
// No buffer to start with
isa_rfRxInfo.pPayload = NULL;
isa_rfRxInfo.max_length = 0;
/*FIXME Actually we dont need to always run the high speed timer */
_nrk_high_speed_timer_start();
/* clear everything out */
global_cycle = 0;
global_slot = MAX_ISA_GLOBAL_SLOTS;
_isa_sync_ok = 0;
slot_expired = 0;
isa_node_mode = mode;
isa_id = id;//change
isa_rx_data_ready = 0;
isa_tx_data_ready = 0;
isa_param.mobile_sync_timeout = 100;
isa_param.rx_timeout = 8000; // 8000 *.125us = 1ms
isa_param.tx_guard_time = TX_GUARD_TIME;
isa_param.channel = 12;
isa_param.mac_addr = 0x1980;
for (i = 0; i < ISA_SLOTS_PER_FRAME; i++) {
isa_sched[i] = 0;
}
isa_tdma_rx_mask = 0;
isa_tdma_tx_mask = 0;
/* Setup the cc2420 chip */
rf_init (&isa_rfRxInfo, isa_param.channel, 0x2420, isa_param.mac_addr);
AFTER_FIRST_SYNC = 1;
/* Setup fisrt hopping channel */
#ifdef CHANNEL_HOPPING
if(id!=0){
channelIndex = id-1;
currentChannel = channelPattern[channelIndex];
}else{
channelIndex = 0;
currentChannel = channelPattern[channelIndex];
}
#endif
return NRK_OK;
}
/**
* nrk_init();
* * - Init TCBlist - linked list of empty TCBs
* - Init global variables
* - Init event list
* - Create idle task
*/
void nrk_init()
{
uint8_t i;
// unsigned char *stkc;
nrk_task_type IdleTask;
nrk_wakeup_signal = nrk_signal_create();
if(nrk_wakeup_signal==NRK_ERROR) nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,0);
//if((volatile)TCCR1B!=0) nrk_kernel_error_add(NRK_STACK_OVERFLOW,0);
#ifndef NRK_SOFT_REBOOT_ON_ERROR
i=_nrk_startup_error();
if((i&0x1)!=0) nrk_kernel_error_add(NRK_BAD_STARTUP,0);
#ifndef IGNORE_EXT_RST_ERROR
if((i&0x2)!=0) nrk_kernel_error_add(NRK_EXT_RST_ERROR,0);
#endif
#ifndef IGNORE_BROWN_OUT_ERROR
if((i&0x4)!=0) nrk_kernel_error_add(NRK_BOD_ERROR,0);
#endif
//if((i&0x8)!=0) nrk_kernel_error_add(NRK_BAD_STARTUP,0);
//if(_nrk_startup_ok()==0) nrk_kernel_error_add(NRK_BAD_STARTUP,0);
#endif
#ifdef NRK_STARTUP_VOLTAGE_CHECK
if(nrk_voltage_status()==0) nrk_kernel_error_add(NRK_LOW_VOLTAGE,0);
#endif
#ifdef NRK_REBOOT_ON_ERROR
#ifndef NRK_WATCHDOG
while(1)
{
nrk_kprintf( PSTR("KERNEL CONFIG CONFLICT: NRK_REBOOT_ON_ERROR needs watchdog!\r\n") );
for (i = 0; i < 100; i++)
nrk_spin_wait_us (1000);
}
#endif
#endif
#ifdef NRK_WATCHDOG
if(nrk_watchdog_check()==NRK_ERROR)
{
nrk_watchdog_disable();
nrk_kernel_error_add(NRK_WATCHDOG_ERROR,0);
}
nrk_watchdog_enable();
#endif
// nrk_stack_pointer_init();
/*
#ifdef KERNEL_STK_ARRAY
stkc = (uint16_t*)&nrk_kernel_stk[NRK_KERNEL_STACKSIZE-1];
nrk_kernel_stk[0]=STK_CANARY_VAL;
nrk_kernel_stk_ptr = &nrk_kernel_stk[NRK_KERNEL_STACKSIZE-1];
#else
stkc = NRK_KERNEL_STK_TOP-NRK_KERNEL_STACKSIZE;
*stkc = STK_CANARY_VAL;
stkc = NRK_KERNEL_STK_TOP;
nrk_kernel_stk_ptr = NRK_KERNEL_STK_TOP;
#endif
*stkc++ = (uint16_t)((uint16_t)_nrk_timer_tick>>8);
*stkc = (uint16_t)((uint16_t)_nrk_timer_tick&0xFF);
*/
// printf( "Init kernel_entry= %d %d\n",kernel_entry[1], kernel_entry[0] );
nrk_cur_task_prio = 0;
nrk_cur_task_TCB = NULL;
nrk_high_ready_TCB = NULL;
nrk_high_ready_prio = 0;
#ifdef NRK_STATS_TRACKER
nrk_stats_reset();
#endif
#ifdef NRK_MAX_RESERVES
// Setup the reserve structures
_nrk_reserve_init();
#endif
_nrk_resource_cnt=0; //NRK_MAX_RESOURCE_CNT;
for(i=0;i<NRK_MAX_RESOURCE_CNT;i++)
{
nrk_sem_list[i].count=-1;
nrk_sem_list[i].value=-1;
nrk_sem_list[i].resource_ceiling=-1;
//nrk_resource_count[i]=-1;
//nrk_resource_value[i]=-1;
//nrk_resource_ceiling[i]=-1;
}
for (i= 0; i<NRK_MAX_TASKS; i++)
{
nrk_task_TCB[i].task_prio = TCB_EMPTY_PRIO;
nrk_task_TCB[i].task_ID = -1;
}
// Setup a double linked list of Ready Tasks
for (i=0;i<NRK_MAX_TASKS;i++)
{
_nrk_readyQ[i].Next = &_nrk_readyQ[i+1];
_nrk_readyQ[i+1].Prev = &_nrk_readyQ[i];
}
_nrk_readyQ[0].Prev = NULL;
_nrk_readyQ[NRK_MAX_TASKS].Next = NULL;
_head_node = NULL;
_free_node = &_nrk_readyQ[0];
nrk_task_set_entry_function( &IdleTask, nrk_idle_task);
nrk_task_set_stk( &IdleTask, nrk_idle_task_stk, NRK_TASK_IDLE_STK_SIZE);
nrk_idle_task_stk[0]=STK_CANARY_VAL;
//IdleTask.task_ID = NRK_IDLE_TASK_ID;
IdleTask.prio = 0;
IdleTask.period.secs = 0;
IdleTask.period.nano_secs = 0;
IdleTask.cpu_reserve.secs = 0;
IdleTask.cpu_reserve.nano_secs = 0;
IdleTask.offset.secs = 0;
IdleTask.offset.nano_secs = 0;
IdleTask.FirstActivation = TRUE;
IdleTask.Type = IDLE_TASK;
IdleTask.SchType = PREEMPTIVE;
nrk_activate_task(&IdleTask);
}
void nrk_init()
{
uint8_t i;
// unsigned char *stkc;
nrk_task_type IdleTask;
nrk_wakeup_signal = nrk_signal_create();
if(nrk_wakeup_signal==NRK_ERROR) nrk_kernel_error_add(NRK_SIGNAL_CREATE_ERROR,0);
//if((volatile)TCCR1B!=0) nrk_kernel_error_add(NRK_STACK_OVERFLOW,0);
/*
if(_nrk_startup_ok()==0) nrk_kernel_error_add(NRK_BAD_STARTUP,0);
#ifdef NRK_STARTUP_VOLTAGE_CHECK
if(nrk_voltage_status()==0) nrk_kernel_error_add(NRK_LOW_VOLTAGE,0);
#endif
#ifdef NRK_REBOOT_ON_ERROR
#ifndef NRK_WATCHDOG
while(1)
{
nrk_kprintf( PSTR("KERNEL CONFIG CONFLICT: NRK_REBOOT_ON_ERROR needs watchdog!\r\n") );
for (i = 0; i < 100; i++)
nrk_spin_wait_us (1000);
}
#endif
#endif
#ifdef NRK_WATCHDOG
if(nrk_watchdog_check()==NRK_ERROR)
{
nrk_watchdog_disable();
nrk_kernel_error_add(NRK_WATCHDOG_ERROR,0);
}
nrk_watchdog_enable();
#endif
// nrk_stack_pointer_init();
*/
nrk_cur_task_prio = 0;
nrk_cur_task_TCB = NULL;
nrk_high_ready_TCB = NULL;
nrk_high_ready_prio = 0;
/*
#ifdef NRK_MAX_RESERVES
// Setup the reserve structures
_nrk_reserve_init();
#endif
*/
_nrk_resource_cnt=0; //NRK_MAX_RESOURCE_CNT;
//PAJA: CHECK THIS
for(i=0;i<NRK_MAX_RESOURCE_CNT;i++)
{
nrk_sem_list[i].count=-1;
nrk_sem_list[i].value=-1;
nrk_sem_list[i].resource_ceiling=-1;
//nrk_resource_count[i]=-1;
//nrk_resource_value[i]=-1;
//nrk_resource_ceiling[i]=-1;
}
////// //PAJA: CHECK THIS
////// for (i= 0; i<NRK_MAX_TASKS_TCB; i++)
////// {
////// nrk_task_TCB[i].task_prio = TCB_EMPTY_PRIO;
////// nrk_task_TCB[i].task_ID = -1;
////// nrk_task_TCB[i].Next = NULL; //PAJA:check this
////// nrk_task_TCB[i].Prev = NULL;
////// }
//////
////// _headTCB = &nrk_task_TCB[0];
////// _tailTCB = _headTCB;
tasksNumber = 1; //idle tasks
nrk_task_init_cnt = 1;
nrk_task_TCB.task_prio = TCB_EMPTY_PRIO;
nrk_task_TCB.task_ID = -1;
nrk_task_TCB.Next = NULL; //PAJA:check this
nrk_task_TCB.Prev = NULL;
_headTCB = &nrk_task_TCB;
_tailTCB = _headTCB;
// Setup a double linked list of Ready Tasks
for (i=0;i<NRK_MAX_TASKS;i++)
{
_nrk_readyQ[i].Next = &_nrk_readyQ[i+1];
_nrk_readyQ[i+1].Prev = &_nrk_readyQ[i];
}
_nrk_readyQ[0].Prev = NULL;
_nrk_readyQ[NRK_MAX_TASKS].Next = NULL;
_head_node = NULL;
_free_node = &_nrk_readyQ[0];
nrk_task_set_entry_function( &IdleTask, (uint32_t)nrk_idle_task);
nrk_task_set_stk( &IdleTask, nrk_idle_task_stk, NRK_TASK_IDLE_STK_SIZE);
nrk_idle_task_stk[0]=STK_CANARY_VAL;
//IdleTask.task_ID = NRK_IDLE_TASK_ID;
IdleTask.prio = 0;
IdleTask.offset.secs = 0;
IdleTask.offset.nano_secs = 0;
IdleTask.FirstActivation = TRUE;
IdleTask.Type = IDLE_TASK;
IdleTask.SchType = PREEMPTIVE;
nrk_activate_task(&IdleTask);
}
int8_t bmac_init (uint8_t chan)
{
bmac_running = 0;
tx_reserve = -1;
cca_active = true;
rx_failure_cnt = 0;
#ifdef NRK_SW_WDT
#ifdef BMAC_SW_WDT_ID
_bmac_check_period.secs = 30;
_bmac_check_period.nano_secs = 0;
nrk_sw_wdt_init (BMAC_SW_WDT_ID, &_bmac_check_period, NULL);
nrk_sw_wdt_start (BMAC_SW_WDT_ID);
#endif
#endif
_bmac_check_period.secs = 0;
_bmac_check_period.nano_secs = BMAC_DEFAULT_CHECK_RATE_MS * NANOS_PER_MS;
bmac_rx_pkt_signal = nrk_signal_create ();
if (bmac_rx_pkt_signal == NRK_ERROR) {
nrk_kprintf (PSTR ("BMAC ERROR: creating rx signal failed\r\n"));
nrk_kernel_error_add (NRK_SIGNAL_CREATE_ERROR, nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
bmac_tx_pkt_done_signal = nrk_signal_create ();
if (bmac_tx_pkt_done_signal == NRK_ERROR) {
nrk_kprintf (PSTR ("BMAC ERROR: creating tx signal failed\r\n"));
nrk_kernel_error_add (NRK_SIGNAL_CREATE_ERROR, nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
bmac_enable_signal = nrk_signal_create ();
if (bmac_enable_signal == NRK_ERROR) {
nrk_kprintf (PSTR ("BMAC ERROR: creating enable signal failed\r\n"));
nrk_kernel_error_add (NRK_SIGNAL_CREATE_ERROR, nrk_cur_task_TCB->task_ID);
return NRK_ERROR;
}
tx_data_ready = 0;
// Set the one main rx buffer
rx_buf_empty = 0;
bmac_rfRxInfo.pPayload = NULL;
bmac_rfRxInfo.max_length = 0;
// Setup the cc2420 chip
rf_power_up ();
rf_init (&bmac_rfRxInfo, chan, 0xffff, 0);
g_chan = chan;
// FASTSPI_SETREG(CC2420_RSSI, 0xE580); // CCA THR=-25
// FASTSPI_SETREG(CC2420_TXCTRL, 0x80FF); // TX TURNAROUND = 128 us
// FASTSPI_SETREG(CC2420_RXCTRL1, 0x0A56);
// default cca thresh of -45
//rf_set_cca_thresh(-45);
rf_set_cca_thresh (0x0);
bmac_running = 1;
is_enabled = 1;
return NRK_OK;
}
void event_detector_task()
{
update_energy_sig=nrk_signal_create();
if(update_energy_sig==NRK_ERROR)
nrk_kprintf(PSTR("Error creating update_energy_sig signal!\r\n"));
nrk_signal_register(update_energy_sig);
if(v==NRK_ERROR) nrk_kprintf( PSTR( "nrk_signal_register failed\r\n" ));
//ev_timeout.secs=10;
//ev_timeout.nano_secs=0;
while(1)
{
// Wait on signal
//nrk_set_next_wakeup(ev_timeout);
my_sigs=nrk_event_wait( SIG(update_energy_sig) /*| SIG(nrk_wakeup_signal)*/ );
if(my_sigs!=0 && ticks_last>900)
{
tmp_d=current_total_last / ticks_last;
if(tmp_d<0) tmp_d=0;
tmp_d=sqrt(tmp_d);
rms_current=(uint16_t)tmp_d;
tmp_d=current_total2_last / ticks_last;
if(tmp_d<0) tmp_d=0;
tmp_d=sqrt(tmp_d);
rms_current2=(uint16_t)tmp_d;
tmp_d=voltage_total_last / ticks_last;
if(tmp_d<0) tmp_d=0;
tmp_d=sqrt(tmp_d);
rms_voltage=(uint16_t)tmp_d;
if(energy_total_last<0) energy_total_last=0;
true_power=energy_total_last / ticks_last;
if(true_power>TRUE_POWER_ON_THRESH) cummulative_energy.total+=true_power;
if(energy_total2_last<0) energy_total2_last=0;
true_power2=energy_total2_last / ticks_last;
if(true_power2>TRUE_POWER_ON_THRESH) cummulative_energy2.total+=true_power2;
total_secs++;
// Divide by seconds per hour to give Watts per hour
// If this is too slow, make a power of 2 shit instead...
tmp_energy.total=cummulative_energy.total/3600;
tmp_energy2.total=cummulative_energy2.total/3600;
// Only care about lower 6 bytes of 8 byte long long
// At max power this will last 239 years
// Divide by P-scaler to get Watt*hrs
if(total_secs%400==0 )
{
nrk_int_disable();
nrk_eeprom_write_byte(EEPROM_ENERGY1_0_ADDR, cummulative_energy.byte[0]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_1_ADDR, cummulative_energy.byte[1]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_2_ADDR, cummulative_energy.byte[2]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_3_ADDR, cummulative_energy.byte[3]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_4_ADDR, cummulative_energy.byte[4]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_5_ADDR, cummulative_energy.byte[5]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_6_ADDR, cummulative_energy.byte[6]);
nrk_eeprom_write_byte(EEPROM_ENERGY1_7_ADDR, cummulative_energy.byte[7]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_0_ADDR, cummulative_energy2.byte[0]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_1_ADDR, cummulative_energy2.byte[1]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_2_ADDR, cummulative_energy2.byte[2]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_3_ADDR, cummulative_energy2.byte[3]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_4_ADDR, cummulative_energy2.byte[4]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_5_ADDR, cummulative_energy2.byte[5]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_6_ADDR, cummulative_energy2.byte[6]);
nrk_eeprom_write_byte(EEPROM_ENERGY2_7_ADDR, cummulative_energy2.byte[7]);
nrk_int_enable();
}
/*
// EVENT DETECTOR
tran_pkt.msgs_payload=async_buf;
tran_pkt.num_msgs=0;
//if(rms_current>current_last) delta=rms_current-current_last;
//else delta=current_last-rms_current;
if(true_power>true_power_last) delta=true_power-true_power_last;
else delta=true_power_last-true_power;
if(true_power2>true_power_last2) delta2=true_power2-true_power_last2;
else delta=true_power_last2-true_power2;
//if(rms_current2>current_last2) delta2=rms_current2-current_last2;
//else delta2=current_last2-rms_current2;
if((socket_0_push_enabled && (delta>socket_0_push_threshold*100)) || (socket_1_push_enabled && (delta2>socket_1_push_threshold*100)))
{
pd_pkt.type=DEBUG_PKT;
pd_pkt.rms_voltage=rms_voltage;
pd_pkt.rms_current=rms_current;
pd_pkt.rms_current2=rms_current2;
pd_pkt.true_power=true_power;
pd_pkt.true_power2=true_power2;
pd_pkt.freq=freq;
pd_pkt.socket0_state= socket_0_active;
pd_pkt.socket1_state= socket_1_active;
for(len=0; len<6; len++ )
{
pd_pkt.energy[len]=tmp_energy.byte[len];
pd_pkt.energy2[len]=tmp_energy2.byte[len];
}
pd_pkt.current_p2p_high=l_c_p2p_high;
pd_pkt.current_p2p_low=l_c_p2p_low;
pd_pkt.current_p2p_high2=l_c_p2p_high2;
pd_pkt.current_p2p_low2=l_c_p2p_low2;
pd_pkt.voltage_p2p_high=l_v_p2p_high;
pd_pkt.voltage_p2p_low=l_v_p2p_low;
pd_pkt.total_secs=total_secs;
tran_pkt.num_msgs=0;
tran_pkt.checksum=0;
tran_pkt.msgs_payload=&(async_buf[TRANSDUCER_PKT_HEADER_SIZE]);
tran_msg.payload=&(async_buf[TRANSDUCER_PKT_HEADER_SIZE+TRANSDUCER_MSG_HEADER_SIZE]);
tran_msg.type=TRAN_POWER_PKT;
tran_msg.len=ff_power_debug_pack(tran_msg.payload, &pd_pkt);
tran_msg.mac_addr=my_mac;
len=transducer_msg_add( &tran_pkt, &tran_msg);
len = transducer_pkt_pack(&tran_pkt, async_buf);
val=push_p2p_pkt( async_buf,len,TRANSDUCER_PKT, 0x0 );
}
*/
true_power_last=true_power;
true_power_last2=true_power2;
}
// toggle RED led if freq not above 50Hz
//if(freq==0) nrk_led_toggle(RED_LED);
}
}