/*
* For monitor unlock, we don't have to use ldrex/strex. Once
* we've determined that the lock is thin and that we own it with
* a zero recursion count, it's safe to punch it back to the
* initial, unlock thin state with a store word.
*/
static void genMonitorExit(CompilationUnit *cUnit, MIR *mir)
{
RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
ArmLIR *target;
ArmLIR *branch;
ArmLIR *hopTarget;
ArmLIR *hopBranch;
assert(LW_SHAPE_THIN == 0);
loadValueDirectFixed(cUnit, rlSrc, r1); // Get obj
dvmCompilerLockAllTemps(cUnit); // Prepare for explicit register usage
dvmCompilerFreeTemp(cUnit, r4PC); // Free up r4 for general use
loadWordDisp(cUnit, rGLUE, offsetof(InterpState, self), r0); // Get self
genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
loadWordDisp(cUnit, r1, offsetof(Object, lock), r2); // Get object->lock
loadWordDisp(cUnit, r0, offsetof(Thread, threadId), r3); // Get threadId
// Is lock unheld on lock or held by us (==threadId) on unlock?
opRegRegImm(cUnit, kOpAnd, r7, r2,
(LW_HASH_STATE_MASK << LW_HASH_STATE_SHIFT));
opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
newLIR3(cUnit, kThumb2Bfc, r2, LW_HASH_STATE_SHIFT,
LW_LOCK_OWNER_SHIFT - 1);
opRegReg(cUnit, kOpSub, r2, r3);
hopBranch = opCondBranch(cUnit, kArmCondNe);
storeWordDisp(cUnit, r1, offsetof(Object, lock), r7);
branch = opNone(cUnit, kOpUncondBr);
hopTarget = newLIR0(cUnit, kArmPseudoTargetLabel);
hopTarget->defMask = ENCODE_ALL;
hopBranch->generic.target = (LIR *)hopTarget;
// Export PC (part 1)
loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset));
LOAD_FUNC_ADDR(cUnit, r7, (int)dvmUnlockObject);
// Export PC (part 2)
newLIR3(cUnit, kThumb2StrRRI8Predec, r3, rFP,
sizeof(StackSaveArea) -
offsetof(StackSaveArea, xtra.currentPc));
opReg(cUnit, kOpBlx, r7);
opRegImm(cUnit, kOpCmp, r0, 0); /* Did we throw? */
ArmLIR *branchOver = opCondBranch(cUnit, kArmCondNe);
loadConstant(cUnit, r0,
(int) (cUnit->method->insns + mir->offset +
dexGetInstrWidthAbs(gDvm.instrWidth, OP_MONITOR_EXIT)));
genDispatchToHandler(cUnit, TEMPLATE_THROW_EXCEPTION_COMMON);
// Resume here
target = newLIR0(cUnit, kArmPseudoTargetLabel);
target->defMask = ENCODE_ALL;
branch->generic.target = (LIR *)target;
branchOver->generic.target = (LIR *) target;
}
/*
* Rebuild the interpreter frame then punt to the interpreter to execute
* instruction at specified PC.
*
* Currently parameters are passed to the current frame, so we just need to
* grow the stack save area above it, fill certain fields in StackSaveArea and
* Thread that are skipped during whole-method invocation (specified below),
* then return to the interpreter.
*
* StackSaveArea:
* - prevSave
* - prevFrame
* - savedPc
* - returnAddr
* - method
*
* Thread:
* - method
* - methodClassDex
* - curFrame
*/
static void genMethodInflateAndPunt(CompilationUnit *cUnit, MIR *mir,
BasicBlock *bb)
{
int oldStackSave = r0;
int newStackSave = r1;
int oldFP = r2;
int savedPC = r3;
int currentPC = r4PC;
int returnAddr = r7;
int method = r8;
int pDvmDex = r9;
/*
* TODO: check whether to raise the stack overflow exception when growing
* the stack save area.
*/
/* Send everything to home location */
dvmCompilerFlushAllRegs(cUnit);
/* oldStackSave = r5FP + sizeof(current frame) */
opRegRegImm(cUnit, kOpAdd, oldStackSave, r5FP,
cUnit->method->registersSize * 4);
/* oldFP = oldStackSave + sizeof(stackSaveArea) */
opRegRegImm(cUnit, kOpAdd, oldFP, oldStackSave, sizeof(StackSaveArea));
/* newStackSave = r5FP - sizeof(StackSaveArea) */
opRegRegImm(cUnit, kOpSub, newStackSave, r5FP, sizeof(StackSaveArea));
loadWordDisp(cUnit, r13sp, 0, savedPC);
loadConstant(cUnit, currentPC, (int) (cUnit->method->insns + mir->offset));
loadConstant(cUnit, method, (int) cUnit->method);
loadConstant(cUnit, pDvmDex, (int) cUnit->method->clazz->pDvmDex);
#ifdef EASY_GDB
/* newStackSave->prevSave = oldStackSave */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, prevSave),
oldStackSave);
#endif
/* newStackSave->prevSave = oldStackSave */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, prevFrame),
oldFP);
/* newStackSave->savedPc = savedPC */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, savedPc),
savedPC);
/* return address */
loadConstant(cUnit, returnAddr, 0);
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, returnAddr),
returnAddr);
/* newStackSave->method = method */
storeWordDisp(cUnit, newStackSave, offsetof(StackSaveArea, method), method);
/* thread->method = method */
storeWordDisp(cUnit, r6SELF, offsetof(InterpSaveState, method), method);
/* thread->interpSave.curFrame = current FP */
storeWordDisp(cUnit, r6SELF, offsetof(Thread, interpSave.curFrame), r5FP);
/* thread->methodClassDex = pDvmDex */
storeWordDisp(cUnit, r6SELF, offsetof(InterpSaveState, methodClassDex),
pDvmDex);
/* Restore the stack pointer */
opRegImm(cUnit, kOpAdd, r13sp, 16);
genPuntToInterp(cUnit, mir->offset);
}
/*
* Handle simple case (thin lock) inline. If it's complicated, bail
* out to the heavyweight lock/unlock routines. We'll use dedicated
* registers here in order to be in the right position in case we
* to bail to dvm[Lock/Unlock]Object(self, object)
*
* r0 -> self pointer [arg0 for dvm[Lock/Unlock]Object
* r1 -> object [arg1 for dvm[Lock/Unlock]Object
* r2 -> intial contents of object->lock, later result of strex
* r3 -> self->threadId
* r7 -> temp to hold new lock value [unlock only]
* r4 -> allow to be used by utilities as general temp
*
* The result of the strex is 0 if we acquire the lock.
*
* See comments in Sync.c for the layout of the lock word.
* Of particular interest to this code is the test for the
* simple case - which we handle inline. For monitor enter, the
* simple case is thin lock, held by no-one. For monitor exit,
* the simple case is thin lock, held by the unlocking thread with
* a recurse count of 0.
*
* A minor complication is that there is a field in the lock word
* unrelated to locking: the hash state. This field must be ignored, but
* preserved.
*
*/
static void genMonitorEnter(CompilationUnit *cUnit, MIR *mir)
{
RegLocation rlSrc = dvmCompilerGetSrc(cUnit, mir, 0);
bool enter = (mir->dalvikInsn.opCode == OP_MONITOR_ENTER);
ArmLIR *target;
ArmLIR *hopTarget;
ArmLIR *branch;
ArmLIR *hopBranch;
assert(LW_SHAPE_THIN == 0);
loadValueDirectFixed(cUnit, rlSrc, r1); // Get obj
dvmCompilerLockAllTemps(cUnit); // Prepare for explicit register usage
dvmCompilerFreeTemp(cUnit, r4PC); // Free up r4 for general use
loadWordDisp(cUnit, rGLUE, offsetof(InterpState, self), r0); // Get self
genNullCheck(cUnit, rlSrc.sRegLow, r1, mir->offset, NULL);
loadWordDisp(cUnit, r0, offsetof(Thread, threadId), r3); // Get threadId
newLIR3(cUnit, kThumb2Ldrex, r2, r1,
offsetof(Object, lock) >> 2); // Get object->lock
opRegImm(cUnit, kOpLsl, r3, LW_LOCK_OWNER_SHIFT); // Align owner
// Is lock unheld on lock or held by us (==threadId) on unlock?
newLIR4(cUnit, kThumb2Bfi, r3, r2, 0, LW_LOCK_OWNER_SHIFT - 1);
newLIR3(cUnit, kThumb2Bfc, r2, LW_HASH_STATE_SHIFT,
LW_LOCK_OWNER_SHIFT - 1);
hopBranch = newLIR2(cUnit, kThumb2Cbnz, r2, 0);
newLIR4(cUnit, kThumb2Strex, r2, r3, r1, offsetof(Object, lock) >> 2);
branch = newLIR2(cUnit, kThumb2Cbz, r2, 0);
hopTarget = newLIR0(cUnit, kArmPseudoTargetLabel);
hopTarget->defMask = ENCODE_ALL;
hopBranch->generic.target = (LIR *)hopTarget;
// Clear the lock
ArmLIR *inst = newLIR0(cUnit, kThumb2Clrex);
// ...and make it a scheduling barrier
inst->defMask = ENCODE_ALL;
// Export PC (part 1)
loadConstant(cUnit, r3, (int) (cUnit->method->insns + mir->offset));
/* Get dPC of next insn */
loadConstant(cUnit, r4PC, (int)(cUnit->method->insns + mir->offset +
dexGetInstrWidthAbs(gDvm.instrWidth, OP_MONITOR_ENTER)));
// Export PC (part 2)
newLIR3(cUnit, kThumb2StrRRI8Predec, r3, rFP,
sizeof(StackSaveArea) -
offsetof(StackSaveArea, xtra.currentPc));
/* Call template, and don't return */
genDispatchToHandler(cUnit, TEMPLATE_MONITOR_ENTER);
// Resume here
target = newLIR0(cUnit, kArmPseudoTargetLabel);
target->defMask = ENCODE_ALL;
branch->generic.target = (LIR *)target;
}
/* Handle the content in each basic block */
static bool methodBlockCodeGen(CompilationUnit *cUnit, BasicBlock *bb)
{
MIR *mir;
ArmLIR *labelList = (ArmLIR *) cUnit->blockLabelList;
int blockId = bb->id;
cUnit->curBlock = bb;
labelList[blockId].operands[0] = bb->startOffset;
/* Insert the block label */
labelList[blockId].opcode = kArmPseudoNormalBlockLabel;
dvmCompilerAppendLIR(cUnit, (LIR *) &labelList[blockId]);
dvmCompilerClobberAllRegs(cUnit);
dvmCompilerResetNullCheck(cUnit);
ArmLIR *headLIR = NULL;
if (bb->blockType == kEntryBlock) {
/* r0 = callsitePC */
opImm(cUnit, kOpPush, (1 << r0 | 1 << r1 | 1 << r5FP | 1 << r14lr));
opRegImm(cUnit, kOpSub, r5FP,
sizeof(StackSaveArea) + cUnit->method->registersSize * 4);
} else if (bb->blockType == kExitBlock) {
/* No need to pop r0 and r1 */
opRegImm(cUnit, kOpAdd, r13sp, 8);
opImm(cUnit, kOpPop, (1 << r5FP | 1 << r15pc));
}
for (mir = bb->firstMIRInsn; mir; mir = mir->next) {
dvmCompilerResetRegPool(cUnit);
if (gDvmJit.disableOpt & (1 << kTrackLiveTemps)) {
dvmCompilerClobberAllRegs(cUnit);
}
if (gDvmJit.disableOpt & (1 << kSuppressLoads)) {
dvmCompilerResetDefTracking(cUnit);
}
Opcode dalvikOpcode = mir->dalvikInsn.opcode;
InstructionFormat dalvikFormat =
dexGetFormatFromOpcode(dalvikOpcode);
ArmLIR *boundaryLIR;
/*
* Don't generate the boundary LIR unless we are debugging this
* trace or we need a scheduling barrier.
*/
if (headLIR == NULL || cUnit->printMe == true) {
boundaryLIR =
newLIR2(cUnit, kArmPseudoDalvikByteCodeBoundary,
mir->offset,
(int) dvmCompilerGetDalvikDisassembly(
&mir->dalvikInsn, ""));
/* Remember the first LIR for this block */
if (headLIR == NULL) {
headLIR = boundaryLIR;
/* Set the first boundaryLIR as a scheduling barrier */
headLIR->defMask = ENCODE_ALL;
}
}
/* Don't generate the SSA annotation unless verbose mode is on */
if (cUnit->printMe && mir->ssaRep) {
char *ssaString = dvmCompilerGetSSAString(cUnit, mir->ssaRep);
newLIR1(cUnit, kArmPseudoSSARep, (int) ssaString);
}
bool notHandled;
switch (dalvikFormat) {
case kFmt10t:
case kFmt20t:
case kFmt30t:
notHandled = handleMethodFmt10t_Fmt20t_Fmt30t(cUnit, mir, bb,
labelList);
break;
case kFmt10x:
notHandled = handleMethodFmt10x(cUnit, mir);
break;
case kFmt11n:
case kFmt31i:
notHandled = handleMethodFmt11n_Fmt31i(cUnit, mir);
break;
case kFmt11x:
notHandled = handleMethodFmt11x(cUnit, mir, bb, labelList);
break;
case kFmt12x:
notHandled = handleMethodFmt12x(cUnit, mir);
break;
case kFmt20bc:
notHandled = handleMethodFmt20bc(cUnit, mir);
break;
case kFmt21c:
case kFmt31c:
notHandled = handleMethodFmt21c_Fmt31c(cUnit, mir);
break;
case kFmt21h:
notHandled = handleMethodFmt21h(cUnit, mir);
break;
case kFmt21s:
notHandled = handleMethodFmt21s(cUnit, mir);
break;
case kFmt21t:
notHandled = handleMethodFmt21t(cUnit, mir, bb, labelList);
break;
case kFmt22b:
case kFmt22s:
notHandled = handleMethodFmt22b_Fmt22s(cUnit, mir);
break;
case kFmt22c:
notHandled = handleMethodFmt22c(cUnit, mir);
break;
case kFmt22cs:
notHandled = handleMethodFmt22cs(cUnit, mir);
break;
case kFmt22t:
notHandled = handleMethodFmt22t(cUnit, mir, bb, labelList);
break;
case kFmt22x:
case kFmt32x:
notHandled = handleMethodFmt22x_Fmt32x(cUnit, mir);
break;
case kFmt23x:
notHandled = handleMethodFmt23x(cUnit, mir);
break;
case kFmt31t:
notHandled = handleMethodFmt31t(cUnit, mir);
break;
case kFmt3rc:
case kFmt35c:
notHandled = handleMethodFmt35c_3rc(cUnit, mir, bb, labelList);
break;
case kFmt3rms:
case kFmt35ms:
notHandled = handleMethodFmt35ms_3rms(cUnit, mir, bb,
labelList);
break;
case kFmt35mi:
case kFmt3rmi:
notHandled = handleMethodExecuteInline(cUnit, mir);
break;
case kFmt51l:
notHandled = handleMethodFmt51l(cUnit, mir);
break;
default:
notHandled = true;
break;
}
/* FIXME - to be implemented */
if (notHandled == true && dalvikOpcode >= kNumPackedOpcodes) {
notHandled = false;
}
if (notHandled) {
ALOGE("%#06x: Opcode %#x (%s) / Fmt %d not handled",
mir->offset,
dalvikOpcode, dexGetOpcodeName(dalvikOpcode),
dalvikFormat);
dvmCompilerAbort(cUnit);
break;
}
}
if (headLIR) {
/*
* Eliminate redundant loads/stores and delay stores into later
* slots
*/
dvmCompilerApplyLocalOptimizations(cUnit, (LIR *) headLIR,
cUnit->lastLIRInsn);
/*
* Generate an unconditional branch to the fallthrough block.
*/
if (bb->fallThrough) {
genUnconditionalBranch(cUnit,
&labelList[bb->fallThrough->id]);
}
}
return false;
}
/*
* Generate array store
*
*/
static void genArrayPut(CompilationUnit *cUnit, MIR *mir, OpSize size,
RegLocation rlArray, RegLocation rlIndex,
RegLocation rlSrc, int scale)
{
RegisterClass regClass = dvmCompilerRegClassBySize(size);
int lenOffset = OFFSETOF_MEMBER(ArrayObject, length);
int dataOffset = OFFSETOF_MEMBER(ArrayObject, contents);
int regPtr;
rlArray = loadValue(cUnit, rlArray, kCoreReg);
rlIndex = loadValue(cUnit, rlIndex, kCoreReg);
if (dvmCompilerIsTemp(cUnit, rlArray.lowReg)) {
dvmCompilerClobber(cUnit, rlArray.lowReg);
regPtr = rlArray.lowReg;
} else {
regPtr = dvmCompilerAllocTemp(cUnit);
genRegCopy(cUnit, regPtr, rlArray.lowReg);
}
/* null object? */
ArmLIR * pcrLabel = NULL;
if (!(mir->OptimizationFlags & MIR_IGNORE_NULL_CHECK)) {
pcrLabel = genNullCheck(cUnit, rlArray.sRegLow, rlArray.lowReg,
mir->offset, NULL);
}
if (!(mir->OptimizationFlags & MIR_IGNORE_RANGE_CHECK)) {
int regLen = dvmCompilerAllocTemp(cUnit);
//NOTE: max live temps(4) here.
/* Get len */
loadWordDisp(cUnit, rlArray.lowReg, lenOffset, regLen);
/* regPtr -> array data */
opRegImm(cUnit, kOpAdd, regPtr, dataOffset);
genBoundsCheck(cUnit, rlIndex.lowReg, regLen, mir->offset,
pcrLabel);
dvmCompilerFreeTemp(cUnit, regLen);
} else {
/* regPtr -> array data */
opRegImm(cUnit, kOpAdd, regPtr, dataOffset);
}
/* at this point, regPtr points to array, 2 live temps */
if ((size == kLong) || (size == kDouble)) {
//TODO: need specific wide routine that can handle fp regs
if (scale) {
int rNewIndex = dvmCompilerAllocTemp(cUnit);
opRegRegImm(cUnit, kOpLsl, rNewIndex, rlIndex.lowReg, scale);
opRegReg(cUnit, kOpAdd, regPtr, rNewIndex);
} else {
opRegReg(cUnit, kOpAdd, regPtr, rlIndex.lowReg);
}
rlSrc = loadValueWide(cUnit, rlSrc, regClass);
HEAP_ACCESS_SHADOW(true);
storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg);
HEAP_ACCESS_SHADOW(false);
dvmCompilerFreeTemp(cUnit, regPtr);
} else {
rlSrc = loadValue(cUnit, rlSrc, regClass);
HEAP_ACCESS_SHADOW(true);
storeBaseIndexed(cUnit, regPtr, rlIndex.lowReg, rlSrc.lowReg,
scale, size);
HEAP_ACCESS_SHADOW(false);
}
}
