Example #1
0
PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32			ui32DeviceIndex,
									 PVRSRV_DEV_POWER_STATE	eNewPowerState,
									 PVRSRV_DEV_POWER_STATE	eCurrentPowerState)
{
	if ((eNewPowerState != eCurrentPowerState) &&
	    (eCurrentPowerState == PVRSRV_DEV_POWER_STATE_OFF))
	{
		if (ui32DeviceIndex == gui32SGXDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Restore SGX power"));
#if defined(SUPPORT_DRI_DRM_EXT)
			ospm_power_using_hw_begin(OSPM_GRAPHICS_ISLAND, true);
#endif

		}
		else if (ui32DeviceIndex == gui32MRSTMSVDXDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Restore MSVDX power"));
			if (ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
				ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
			} else {
				ospm_power_island_up(OSPM_DISPLAY_ISLAND);
				ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
				ospm_power_island_down(OSPM_DISPLAY_ISLAND);
			}
		}
		else if (ui32DeviceIndex == gui32MRSTTOPAZDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Restore TOPAZ power"));
			if (ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
				ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
			} else {
				ospm_power_island_up(OSPM_DISPLAY_ISLAND);
				ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
				ospm_power_island_down(OSPM_DISPLAY_ISLAND);
			}
		}
	}

	return PVRSRV_OK;
}
static ssize_t psb_vsp_pmstate_show(struct device *dev,
				      struct device_attribute *attr, char *buf)
{
	struct drm_device *drm_dev = dev_get_drvdata(dev);
	int ret = -EINVAL;

	if (drm_dev == NULL)
		return 0;

	ret = snprintf(buf, 64, "VSP Power state 0x%s\n",
			ospm_power_is_hw_on(OSPM_VIDEO_VPP_ISLAND)
			? "ON" : "OFF");

	return ret;
}
Example #3
0
static int enter_dsr_locked(struct mdfld_dsi_config *dsi_config, int level)
{
	u32 val = 0;
	struct mdfld_dsi_hw_registers *regs;
	struct mdfld_dsi_hw_context *ctx;
	struct drm_psb_private *dev_priv;
	struct drm_device *dev;
	struct mdfld_dsi_pkg_sender *sender;
	int err;
	pm_message_t state;
	int pipe0_enabled;
	int pipe2_enabled;

	PSB_DEBUG_ENTRY("mdfld_dsi_dsr: enter dsr\n");

	if (!dsi_config)
		return -EINVAL;

	regs = &dsi_config->regs;
	ctx = &dsi_config->dsi_hw_context;
	dev = dsi_config->dev;
	dev_priv = dev->dev_private;

	sender = mdfld_dsi_get_pkg_sender(dsi_config);
	if (!sender) {
		DRM_ERROR("Failed to get dsi sender\n");
		return -EINVAL;
	}

	if (level < DSR_EXITED) {
		DRM_ERROR("Why to do this?");
		return -EINVAL;
	}

	if (level > DSR_ENTERED_LEVEL0) {
		/**
		 * TODO: require OSPM interfaces to tell OSPM module that
		 * display controller is ready to be power gated.
		 * OSPM module needs to response this request ASAP.
		 * NOTE: it makes no sense to have display controller islands
		 * & pci power gated here directly. OSPM module is the only one
		 * who can power gate/ungate power islands.
		 * FIXME: since there's no ospm interfaces for acquiring
		 * suspending DSI related power islands, we have to call OSPM
		 * interfaces to power gate display islands and pci right now,
		 * which should NOT happen in this way!!!
		 */
		if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
			OSPM_UHB_FORCE_POWER_ON)) {
			DRM_ERROR("Failed power on display island\n");
			return -EINVAL;
		}

		PSB_DEBUG_ENTRY("mdfld_dsi_dsr: entering DSR level 1\n");

		/*Disable TE, don't need it anymore*/
		mdfld_disable_te(dev, dsi_config->pipe);
		err = mdfld_dsi_wait_for_fifos_empty(sender);
		if (err) {
			DRM_ERROR("mdfld_dsi_dsr: FIFO not empty\n");
			mdfld_enable_te(dev, dsi_config->pipe);
			ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
			return err;
		}
		ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);

		/*suspend whole PCI host and related islands
		** if failed at this try, revive te for another chance
		*/
		state.event = 0;
		if (ospm_power_suspend(gpDrmDevice->pdev, state)) {
			/* Only display island is powered off then
			 ** need revive the whole TE
			 */
			if (!ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND))
				exit_dsr_locked(dsi_config);
			else
				mdfld_enable_te(dev, dsi_config->pipe);
			return -EINVAL;
		}
		/*
		 *suspend pci
		 *FIXME: should I do it here?
		 *how about decoder/encoder is working??
		 *OSPM should check the refcout of each islands before
		 *actually power off PCI!!!
		 *need invoke this in the same context, we need deal with
		 *DSR lock later for suspend PCI may go to sleep!!!
		 */
		/*ospm_suspend_pci(dev->pdev);*/

		PSB_DEBUG_ENTRY("mdfld_dsi_dsr: entered\n");
		return 0;
	}

	/*
	 * if DSR_EXITED < level < DSR_ENTERED_LEVEL1, we only have the display
	 * controller components turned off instead of power gate them.
	 * this is useful for HDMI & WIDI.
	 */
	if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND,
		OSPM_UHB_FORCE_POWER_ON)) {
		DRM_ERROR("Failed power on display island\n");
		return -EINVAL;
	}

	PSB_DEBUG_ENTRY("mdfld_dsi_dsr: entering DSR level 0\n");

	/*Disable TE, don't need it anymore*/
	mdfld_disable_te(dev, dsi_config->pipe);
	err = mdfld_dsi_wait_for_fifos_empty(sender);
	if (err) {
		DRM_ERROR("mdfld_dsi_dsr: FIFO not empty\n");
		mdfld_enable_te(dev, dsi_config->pipe);
		ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
		return err;
	}

	/*turn off dbi interface put in ulps*/
	__dbi_power_off(dsi_config);

	ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);

	PSB_DEBUG_ENTRY("entered\n");
	return 0;
}
Example #4
0
PVRSRV_ERROR SysDevicePostPowerState(IMG_UINT32			ui32DeviceIndex,
									 PVRSRV_DEV_POWER_STATE	eNewPowerState,
									 PVRSRV_DEV_POWER_STATE	eCurrentPowerState)
{
	if ((eNewPowerState != eCurrentPowerState) &&
	    (eCurrentPowerState == PVRSRV_DEV_POWER_STATE_OFF))
	{
		if (ui32DeviceIndex == gui32SGXDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Restore SGX power"));
#if defined(SUPPORT_DRI_DRM_EXT)
			if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, true))
			{
				return PVRSRV_ERROR_DEVICE_POWER_CHANGE_FAILURE;
			}

			if (!ospm_power_using_hw_begin(OSPM_GRAPHICS_ISLAND, true))
			{
				ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);

				return PVRSRV_ERROR_DEVICE_POWER_CHANGE_FAILURE;
			}

#if (defined CONFIG_GPU_BURST) || (defined CONFIG_GPU_BURST_MODULE)
			gburst_interface_power_state_set(1);
#endif /* if (defined CONFIG_GPU_BURST) || (defined CONFIG_GPU_BURST_MODULE) */

#endif
		}
#if defined(PVR_MDFLD_SYS_MSVDX_AND_TOPAZ)
		else if (ui32DeviceIndex == gui32MRSTMSVDXDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Restore MSVDX power"));
			if (ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
				ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
			} else {
				ospm_power_island_up(OSPM_DISPLAY_ISLAND);
				ospm_power_island_up(OSPM_VIDEO_DEC_ISLAND);
				ospm_power_island_down(OSPM_DISPLAY_ISLAND);
			}
#if 0
#if defined(SUPPORT_DRI_DRM_EXT)
			if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, true))
			{
				return PVRSRV_ERROR_GENERIC;
			}

			if (!ospm_power_using_hw_begin(OSPM_VIDEO_DEC_ISLAND, true))
			{
				ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);

				return PVRSRV_ERROR_GENERIC;
			}
#endif
#endif
		}
		else if (ui32DeviceIndex == gui32MRSTTOPAZDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Restore TOPAZ power"));
			if (ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
				ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
			} else {
				ospm_power_island_up(OSPM_DISPLAY_ISLAND);
				ospm_power_island_up(OSPM_VIDEO_ENC_ISLAND);
				ospm_power_island_down(OSPM_DISPLAY_ISLAND);
			}
#if 0
#if defined(SUPPORT_DRI_DRM_EXT)
			if (!ospm_power_using_hw_begin(OSPM_DISPLAY_ISLAND, true))
			{
				return PVRSRV_ERROR_GENERIC;
			}

			if (!ospm_power_using_hw_begin(OSPM_VIDEO_ENC_ISLAND, true))
			{
				ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);

				return PVRSRV_ERROR_GENERIC;
			}
#endif
#endif
		}
#endif
	}

	return PVRSRV_OK;
}
Example #5
0
PVRSRV_ERROR SysDevicePrePowerState(IMG_UINT32			ui32DeviceIndex,
									PVRSRV_DEV_POWER_STATE	eNewPowerState,
									PVRSRV_DEV_POWER_STATE	eCurrentPowerState)
{
	if ((eNewPowerState != eCurrentPowerState) &&
	    (eNewPowerState == PVRSRV_DEV_POWER_STATE_OFF))
	{
		if (ui32DeviceIndex == gui32SGXDeviceID)
		{
			PVR_DPF((PVR_DBG_MESSAGE,"SysDevicePrePowerState: Remove SGX power"));
#if defined(SUPPORT_DRI_DRM_EXT)

#if (defined CONFIG_GPU_BURST) || (defined CONFIG_GPU_BURST_MODULE)
			gburst_interface_power_state_set(0);
#endif /* if (defined CONFIG_GPU_BURST) || (defined CONFIG_GPU_BURST_MODULE) */

			ospm_power_using_hw_end(OSPM_GRAPHICS_ISLAND);

			/*! missed in IMG's DDK1.6,
				may cause system hang after early resume
			*/
			psb_irq_uninstall_islands(
				gpDrmDevice, OSPM_GRAPHICS_ISLAND);
			ospm_power_island_down(OSPM_GRAPHICS_ISLAND);
#endif
#ifdef CONFIG_MDFD_GL3
			/* Power off GL3 */
			ospm_power_island_down(OSPM_GL3_CACHE_ISLAND);
#endif

#if defined(SUPPORT_DRI_DRM_EXT)
			ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
#endif

		}
#if defined(PVR_MDFLD_SYS_MSVDX_AND_TOPAZ)
		else if (ui32DeviceIndex == gui32MRSTMSVDXDeviceID)
		{
			psb_irq_uninstall_islands(gpDrmDevice, OSPM_VIDEO_DEC_ISLAND);
			if (ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
				ospm_power_island_down(OSPM_VIDEO_DEC_ISLAND);
			} else {
				ospm_power_island_up(OSPM_DISPLAY_ISLAND);
				ospm_power_island_down(OSPM_VIDEO_DEC_ISLAND);
				ospm_power_island_down(OSPM_DISPLAY_ISLAND);
			}
#if 0
#if defined(SUPPORT_DRI_DRM_EXT)
			ospm_power_using_hw_end(OSPM_VIDEO_DEC_ISLAND);
			ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
#endif
#endif
		}
		else if (ui32DeviceIndex == gui32MRSTTOPAZDeviceID)
		{
		if (ospm_power_is_hw_on(OSPM_DISPLAY_ISLAND)) {
				ospm_power_island_down(OSPM_VIDEO_ENC_ISLAND);
			} else {
				ospm_power_island_up(OSPM_DISPLAY_ISLAND);
				ospm_power_island_down(OSPM_VIDEO_ENC_ISLAND);
				ospm_power_island_down(OSPM_DISPLAY_ISLAND);
			}
		}
#if 0
#if defined(SUPPORT_DRI_DRM_EXT)
			ospm_power_using_hw_end(OSPM_VIDEO_ENC_ISLAND);
			ospm_power_using_hw_end(OSPM_DISPLAY_ISLAND);
#endif
#endif
#endif
	}
	return PVRSRV_OK;
}