/**
* @brief Initializes the TAL
*
* This function is called to initialize the TAL. The transceiver is
* initialized, the TAL PIBs are set to their default values, and the TAL state
* machine is set to TAL_IDLE state.
*
* @return MAC_SUCCESS if the transceiver state is changed to TRX_OFF and the
* current device part number and version number are correct;
* FAILURE otherwise
*/
retval_t tal_init(void)
{
/* Init the PAL and by this means also the transceiver interface */
if (pal_init() != MAC_SUCCESS)
{
return FAILURE;
}
if (trx_init() != MAC_SUCCESS)
{
return FAILURE;
}
#if (EXTERN_EEPROM_AVAILABLE == 1)
pal_ps_get(EXTERN_EEPROM, EE_IEEE_ADDR, 8, &tal_pib.IeeeAddress);
#else
pal_ps_get(INTERN_EEPROM, EE_IEEE_ADDR, 8, &tal_pib.IeeeAddress);
#endif
/*
* Do the reset stuff.
* Set the default PIBs.
* Generate random seed.
*/
if (internal_tal_reset(true) != MAC_SUCCESS)
{
return FAILURE;
}
#ifndef DISABLE_IEEE_ADDR_CHECK
/* Check if a valid IEEE address is available. */
/*
* This while loop is on purpose, since just in the
* rare case that such an address is randomly
* generated again, we must repeat this.
*/
while ((tal_pib.IeeeAddress == 0x0000000000000000) ||
(tal_pib.IeeeAddress == 0xFFFFFFFFFFFFFFFF)
)
{
/*
* In case no valid IEEE address is available, a random
* IEEE address will be generated to be able to run the
* applications for demonstration purposes.
* In production code this can be omitted.
*/
/*
* The proper seed for function rand() has already been generated
* in function tal_generate_rand_seed().
*/
uint8_t *ptr_pib = (uint8_t *)&tal_pib.IeeeAddress;
for (uint8_t i = 0; i < 8; i++)
{
*ptr_pib++ = (uint8_t)rand();
/*
* Note:
* Even if casting the 16 bit rand value back to 8 bit,
* and running the loop 8 timers (instead of only 4 times)
* may look cumbersome, it turns out that the code gets
* smaller using 8-bit here.
* And timing is not an issue at this place...
*/
}
}
#endif /* #ifndef DISABLE_IEEE_ADDR_CHECK */
/*
* Configure interrupt handling.
* Install handlers for the transceiver interrupts.
*/
pal_trx_irq_init_rx_end((FUNC_PTR)trx_rx_end_handler_cb);
pal_trx_irq_init_tx_end((FUNC_PTR)trx_tx_end_handler_cb);
pal_trx_irq_init_awake((FUNC_PTR)trx_awake_handler_cb);
#if (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP)
/* Configure time stamp interrupt. */
pal_trx_irq_init_tstamp((FUNC_PTR)trx_irq_timestamp_handler_cb);
#endif /* (defined BEACON_SUPPORT) || (defined ENABLE_TSTAMP) */
/* Initialize the buffer management module and get a buffer to store reveived frames. */
bmm_buffer_init();
tal_rx_buffer = bmm_buffer_alloc(LARGE_BUFFER_SIZE);
/* Init incoming frame queue */
#ifdef ENABLE_QUEUE_CAPACITY
qmm_queue_init(&tal_incoming_frame_queue, TAL_INCOMING_FRAME_QUEUE_CAPACITY);
#else
qmm_queue_init(&tal_incoming_frame_queue);
#endif /* ENABLE_QUEUE_CAPACITY */
#ifdef ENABLE_TFA
tfa_init();
#endif
return MAC_SUCCESS;
} /* tal_init() */
/*
* \brief Sets transceiver state
*
* \param trx_cmd needs to be one of the trx commands
*
* \return current trx state
*/
tal_trx_status_t set_trx_state(trx_cmd_t trx_cmd)
{
if (tal_trx_status == TRX_SLEEP) {
/*
* Since the wake-up procedure relies on the Awake IRQ and
* the global interrupts may be disabled at this point of time,
* we need to make sure that the global interrupts are enabled
* during wake-up procedure.
* Once the TRX is awake, the original state of the global
*interrupts
* will be restored.
*/
/* Reset wake-up interrupt flag. */
if (CMD_SLEEP == trx_cmd) {
return TRX_SLEEP;
}
tal_awake_end_flag = false;
/* Set callback function for the awake interrupt. */
pal_trx_irq_init_awake((FUNC_PTR)trx_awake_handler_cb);
/* Save current state of global interrupts. */
ENTER_CRITICAL_REGION();
/* Force enabling of global interrupts. */
ENABLE_GLOBAL_IRQ();
/* Leave trx sleep mode. */
TRX_SLP_TR_LOW();
/* Poll wake-up interrupt flag until set within ISR. */
while (!tal_awake_end_flag) {
}
/* Restore original state of global interrupts. */
LEAVE_CRITICAL_REGION();
/* Clear existing interrupts */
trx_reg_write(RG_IRQ_STATUS, 0xFF);
/* Re-enable TRX_END interrupt */
trx_reg_write(RG_IRQ_MASK, TRX_IRQ_DEFAULT);
#if (ANTENNA_DIVERSITY == 1)
/* Enable antenna diversity. */
trx_bit_write(SR_ANT_EXT_SW_EN, ANT_EXT_SW_ENABLE);
#endif
if ((trx_cmd == CMD_TRX_OFF) ||
(trx_cmd == CMD_FORCE_TRX_OFF)) {
tal_trx_status = TRX_OFF;
return TRX_OFF;
}
}
switch (trx_cmd) { /* requested state */
case CMD_SLEEP:
trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
#if (ANTENNA_DIVERSITY == 1)
/* Disable antenna diversity: sets pulls */
trx_bit_write(SR_ANT_EXT_SW_EN, ANT_EXT_SW_DISABLE);
#endif
{
uint16_t rand_value;
/*
* Init the SEED value of the CSMA backoff algorithm.
*/
rand_value = (uint16_t)rand();
trx_reg_write(RG_CSMA_SEED_0, (uint8_t)rand_value);
trx_bit_write(SR_CSMA_SEED_1,
(uint8_t)(rand_value >> 8));
}
/*
* Clear existing interrupts to have clear interrupt flags
* during wake-up.
*/
trx_reg_write(RG_IRQ_STATUS, 0xFF);
/*
* Enable Awake_end interrupt.
* This is used for save wake-up from sleep later.
*/
trx_reg_write(RG_IRQ_MASK, TRX_IRQ_AWAKE_ONLY);
PAL_WAIT_1_US();
TRX_SLP_TR_HIGH();
pal_timer_delay(TRX_OFF_TO_SLEEP_TIME_CLKM_CYCLES);
tal_trx_status = TRX_SLEEP;
return TRX_SLEEP; /* transceiver register cannot be read during
*TRX_SLEEP */
case CMD_TRX_OFF:
switch (tal_trx_status) {
case TRX_OFF:
break;
default:
trx_reg_write(RG_TRX_STATE, CMD_TRX_OFF);
PAL_WAIT_1_US();
break;
}
break;
case CMD_FORCE_TRX_OFF:
switch (tal_trx_status) {
case TRX_OFF:
break;
default:
trx_reg_write(RG_TRX_STATE, CMD_FORCE_TRX_OFF);
PAL_WAIT_1_US();
break;
}
break;
case CMD_PLL_ON:
switch (tal_trx_status) {
case PLL_ON:
break;
case TRX_OFF:
switch_pll_on();
break;
case RX_ON:
case RX_AACK_ON:
case TX_ARET_ON:
trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
PAL_WAIT_1_US();
break;
case BUSY_RX:
case BUSY_TX:
case BUSY_RX_AACK:
case BUSY_TX_ARET:
/* do nothing if trx is busy */
break;
default:
Assert("state transition not handled" == 0);
break;
}
break;
case CMD_FORCE_PLL_ON:
switch (tal_trx_status) {
case TRX_OFF:
switch_pll_on();
break;
case PLL_ON:
break;
default:
trx_reg_write(RG_TRX_STATE, CMD_FORCE_PLL_ON);
break;
}
break;
case CMD_RX_ON:
switch (tal_trx_status) {
case RX_ON:
break;
case PLL_ON:
case RX_AACK_ON:
case TX_ARET_ON:
trx_reg_write(RG_TRX_STATE, CMD_RX_ON);
PAL_WAIT_1_US();
break;
case TRX_OFF:
switch_pll_on();
trx_reg_write(RG_TRX_STATE, CMD_RX_ON);
PAL_WAIT_1_US();
break;
case BUSY_RX:
case BUSY_TX:
case BUSY_RX_AACK:
case BUSY_TX_ARET:
/* do nothing if trx is busy */
break;
default:
Assert("state transition not handled" == 0);
break;
}
break;
case CMD_RX_AACK_ON:
switch (tal_trx_status) {
case RX_AACK_ON:
break;
case TX_ARET_ON:
case PLL_ON:
trx_reg_write(RG_TRX_STATE, CMD_RX_AACK_ON);
PAL_WAIT_1_US();
break;
case TRX_OFF:
switch_pll_on(); /* state change from TRX_OFF to
* RX_AACK_ON can be done directly, too */
trx_reg_write(RG_TRX_STATE, CMD_RX_AACK_ON);
PAL_WAIT_1_US();
break;
case RX_ON:
trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
PAL_WAIT_1_US();
/* check if state change could be applied */
tal_trx_status = (tal_trx_status_t)trx_bit_read(
SR_TRX_STATUS);
if (tal_trx_status != PLL_ON) {
return tal_trx_status;
}
trx_reg_write(RG_TRX_STATE, CMD_RX_AACK_ON);
PAL_WAIT_1_US();
break;
case BUSY_RX:
case BUSY_TX:
case BUSY_RX_AACK:
case BUSY_TX_ARET:
/* do nothing if trx is busy */
break;
default:
Assert("state transition not handled" == 0);
break;
}
break;
case CMD_TX_ARET_ON:
switch (tal_trx_status) {
case TX_ARET_ON:
break;
case PLL_ON:
trx_reg_write(RG_TRX_STATE, CMD_TX_ARET_ON);
PAL_WAIT_1_US();
break;
case RX_ON:
case RX_AACK_ON:
trx_reg_write(RG_TRX_STATE, CMD_PLL_ON);
PAL_WAIT_1_US();
/* check if state change could be applied */
tal_trx_status = (tal_trx_status_t)trx_bit_read(
SR_TRX_STATUS);
if (tal_trx_status != PLL_ON) {
return tal_trx_status;
}
trx_reg_write(RG_TRX_STATE, CMD_TX_ARET_ON);
PAL_WAIT_1_US();
break;
case TRX_OFF:
switch_pll_on(); /* state change from TRX_OFF to
* TX_ARET_ON can be done directly, too */
trx_reg_write(RG_TRX_STATE, CMD_TX_ARET_ON);
PAL_WAIT_1_US();
break;
case BUSY_RX:
case BUSY_TX:
case BUSY_RX_AACK:
case BUSY_TX_ARET:
/* do nothing if trx is busy */
break;
default:
Assert("state transition not handled" == 0);
break;
}
break;
default:
/* CMD_NOP, CMD_TX_START */
Assert("trx command not handled" == 0);
break;
}
do {
tal_trx_status = (tal_trx_status_t)trx_bit_read(SR_TRX_STATUS);
} while (tal_trx_status == STATE_TRANSITION_IN_PROGRESS);
return tal_trx_status;
} /* set_trx_state() */
