static void pc_compat_1_7(MachineState *machine) { pc_compat_2_0(machine); smbios_defaults = false; gigabyte_align = false; option_rom_has_mr = true; x86_cpu_compat_kvm_no_autoenable(FEAT_1_ECX, CPUID_EXT_X2APIC); }
static void pc_compat_1_7(QEMUMachineInitArgs *args) { pc_compat_2_0(args); smbios_defaults = false; gigabyte_align = false; option_rom_has_mr = true; x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC); }
static void pc_compat_1_7(MachineState *machine) { pc_compat_2_0(machine); smbios_defaults = false; gigabyte_align = false; option_rom_has_mr = true; legacy_acpi_table_size = 6414; x86_cpu_change_kvm_default("x2apic", NULL); }
static void pc_compat_1_7(MachineState *machine) { pc_compat_2_0(machine); smbios_defaults = false; gigabyte_align = false; option_rom_has_mr = true; legacy_acpi_table_size = 6414; x86_cpu_compat_disable_kvm_features(FEAT_1_ECX, CPUID_EXT_X2APIC); }
static void pc_compat_1_7(MachineState *machine) { pc_compat_2_0(machine); x86_cpu_change_kvm_default("x2apic", NULL); }
static void pc_q35_init_2_0(MachineState *machine) { pc_compat_2_0(machine); pc_q35_init(machine); }
static void pc_init_pci_2_0(MachineState *machine) { pc_compat_2_0(machine); pc_init_pci(machine); }
static void pc_q35_init_2_0(QEMUMachineInitArgs *args) { pc_compat_2_0(args); pc_q35_init(args); }