int arch_cpu_init(void) { struct pci_controller *hose; int ret; post_code(POST_CPU_INIT); #ifdef CONFIG_SYS_X86_TSC_TIMER timer_set_base(rdtsc()); #endif ret = x86_cpu_init_f(); if (ret) return ret; ret = pci_early_init_hose(&hose); if (ret) return ret; /* * Quark SoC has some non-standard BARs (excluding PCI standard BARs) * which need be initialized with suggested values */ quark_setup_bars(); /* Turn on legacy segments (A/B/E/F) decode to system RAM */ quark_enable_legacy_seg(); unprotect_spi_flash(); return 0; }
int arch_cpu_init(void) { struct pci_controller *hose; int ret; post_code(POST_CPU_INIT); #ifdef CONFIG_SYS_X86_TSC_TIMER timer_set_base(rdtsc()); #endif ret = x86_cpu_init_f(); if (ret) return ret; ret = pci_early_init_hose(&hose); if (ret) return ret; unprotect_spi_flash(); return 0; }