void __init pci_iommu_alloc(void) { /* * The order of these functions is important for * fall-back/fail-over reasons */ #ifdef CONFIG_IOMMU iommu_hole_init(); #endif #ifdef CONFIG_CALGARY_IOMMU detect_calgary(); #endif #ifdef CONFIG_DMAR detect_intel_iommu(); #endif #ifdef CONFIG_AMD_IOMMU amd_iommu_detect(); #endif #ifdef CONFIG_SWIOTLB pci_swiotlb_init(); #endif }
void __init pci_iommu_alloc(void) { /* * The order of these functions is important for * fall-back/fail-over reasons */ detect_intel_iommu(); #ifdef CONFIG_SWIOTLB pci_swiotlb_init(); #endif }
void __init pci_iommu_alloc(void) { dma_ops = &intel_dma_ops; dma_ops->sync_single_for_cpu = machvec_dma_sync_single; dma_ops->sync_sg_for_cpu = machvec_dma_sync_sg; dma_ops->sync_single_for_device = machvec_dma_sync_single; dma_ops->sync_sg_for_device = machvec_dma_sync_sg; dma_ops->dma_supported = iommu_dma_supported; /* * The order of these functions is important for * fall-back/fail-over reasons */ detect_intel_iommu(); #ifdef CONFIG_SWIOTLB pci_swiotlb_init(); #endif }
void __init pci_iommu_alloc(void) { /* free the range so iommu could get some range less than 4G */ dma32_free_bootmem(); /* * The order of these functions is important for * fall-back/fail-over reasons */ #ifdef CONFIG_GART_IOMMU gart_iommu_hole_init(); #endif #ifdef CONFIG_CALGARY_IOMMU detect_calgary(); #endif detect_intel_iommu(); #ifdef CONFIG_SWIOTLB pci_swiotlb_init(); #endif }