static int ofw_pcib_attach(device_t dev) { struct ofw_pcib_gen_softc *sc; sc = device_get_softc(dev); /* Quirk handling */ switch (pci_get_devid(dev)) { /* * The ALi M5249 found in Fire-based machines by definition must me * subtractive as they have a ISA bridge on their secondary side but * don't indicate this in the class code although the ISA I/O range * isn't included in their bridge decode. */ case 0x524910b9: sc->ops_pcib_sc.flags |= PCIB_SUBTRACTIVE; break; } ofw_pcib_gen_setup(dev); pcib_attach_common(dev); device_add_child(dev, "pci", -1); return (bus_generic_attach(dev)); }
static int acpi_pcib_pci_attach(device_t dev) { struct acpi_pcib_softc *sc; ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__); pcib_attach_common(dev); sc = device_get_softc(dev); sc->ap_handle = acpi_get_handle(dev); return (acpi_pcib_attach(dev, &sc->ap_prt, sc->ap_pcibsc.secbus)); }
int pcib_attach(device_t dev) { struct pcib_softc *sc; device_t child; pcib_attach_common(dev); sc = device_get_softc(dev); if (sc->secbus != 0) { child = device_add_child(dev, "pci", sc->secbus); if (child != NULL) return(bus_generic_attach(dev)); } /* no secondary bus; we should have fixed this */ return(0); }
static int ofw_pcib_pci_attach(device_t dev) { struct ofw_pcib_softc *sc; sc = device_get_softc(dev); sc->ops_pcib_sc.dev = dev; sc->ops_node = ofw_bus_get_node(dev); ofw_bus_setup_iinfo(sc->ops_node, &sc->ops_iinfo, sizeof(cell_t)); pcib_attach_common(dev); device_add_child(dev, "pci", -1); return (bus_generic_attach(dev)); }
static int ofw_pcib_attach(device_t dev) { struct ofw_pcib_gen_softc *sc; sc = device_get_softc(dev); switch (pci_get_devid(dev)) { /* * The ALi M5249 found in Fire-based machines by definition must me * subtractive as they have a ISA bridge on their secondary side but * don't indicate this in the class code although the ISA I/O range * isn't included in their bridge decode. */ case PCI_DEVID_ALI_M5249: sc->ops_pcib_sc.flags |= PCIB_SUBTRACTIVE; break; } switch (pci_get_vendor(dev)) { /* * Concurrently write the primary and secondary bus numbers in order * to work around a bug in PLX PEX 8114 causing the internal shadow * copies of these not to be updated when setting them bytewise. */ case PCI_VENDOR_PLX: pci_write_config(dev, PCIR_PRIBUS_1, pci_read_config(dev, PCIR_SECBUS_1, 1) << 8 | pci_read_config(dev, PCIR_PRIBUS_1, 1), 2); break; } ofw_pcib_gen_setup(dev); pcib_attach_common(dev); return (pcib_attach_child(dev)); }