C++ (Cpp) pcie_capability_clear_word Examples

Example #1

File: pci.c Project: rajatsaxena/linux

/* Need to be called after we discover btcoex capabilities */
static void ath_pci_aspm_init(struct ath_common *common)
{
    struct ath_softc *sc = (struct ath_softc *) common->priv;
    struct ath_hw *ah = sc->sc_ah;
    struct pci_dev *pdev = to_pci_dev(sc->dev);
    struct pci_dev *parent;
    u16 aspm;

    if (!ah->is_pciexpress)
        return;

    parent = pdev->bus->self;
    if (!parent)
        return;

    if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
            (AR_SREV_9285(ah))) {
        /* Bluetooth coexistence requires disabling ASPM. */
        pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
                                   PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);

        /*
         * Both upstream and downstream PCIe components should
         * have the same ASPM settings.
         */
        pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
                                   PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);

        ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
        return;
    }

    /*
     * 0x70c - Ack Frequency Register.
     *
     * Bits 27:29 - DEFAULT_L1_ENTRANCE_LATENCY.
     *
     * 000 : 1 us
     * 001 : 2 us
     * 010 : 4 us
     * 011 : 8 us
     * 100 : 16 us
     * 101 : 32 us
     * 110/111 : 64 us
     */
    if (AR_SREV_9462(ah))
        pci_read_config_dword(pdev, 0x70c, &ah->config.aspm_l1_fix);

    pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
    if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
        ah->aspm_enabled = true;
        /* Initialize PCIe PM and SERDES registers. */
        ath9k_hw_configpcipowersave(ah, false);
        ath_info(common, "ASPM enabled: 0x%x\n", aspm);
    }
}

Example #2

File: aerdrv_core.c Project: AshishNamdev/linux

int pci_disable_pcie_error_reporting(struct pci_dev *dev)
{
	if (pcie_aer_get_firmware_first(dev))
		return -EIO;

	return pcie_capability_clear_word(dev, PCI_EXP_DEVCTL,
					  PCI_EXP_AER_FLAGS);
}

Example #3

/* Need to be called after we discover btcoex capabilities */
static void ath_pci_aspm_init(struct ath_common *common)
{
	struct ath_softc *sc = (struct ath_softc *) common->priv;
	struct ath_hw *ah = sc->sc_ah;
	struct pci_dev *pdev = to_pci_dev(sc->dev);
	struct pci_dev *parent;
	u16 aspm;

	if (!ah->is_pciexpress)
		return;

	parent = pdev->bus->self;
	if (!parent)
		return;

	if ((ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) &&
	    (AR_SREV_9285(ah))) {
		/* Bluetooth coexistence requires disabling ASPM. */
		pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
			PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);

		/*
		 * Both upstream and downstream PCIe components should
		 * have the same ASPM settings.
		 */
		pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
			PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1);

		ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
		return;
	}

	pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
	if (aspm & (PCI_EXP_LNKCTL_ASPM_L0S | PCI_EXP_LNKCTL_ASPM_L1)) {
		ah->aspm_enabled = true;
		/* Initialize PCIe PM and SERDES registers. */
		ath9k_hw_configpcipowersave(ah, false);
		ath_info(common, "ASPM enabled: 0x%x\n", aspm);
	}
}