void soc_setup_dmi_pcr_io_dec(uint32_t *gen_io_dec) { /* Mirror these same settings in DMI PCR */ pcr_write32(PID_DMI, PCR_DMI_LPCLGIR1, gen_io_dec[0]); pcr_write32(PID_DMI, PCR_DMI_LPCLGIR2, gen_io_dec[1]); pcr_write32(PID_DMI, PCR_DMI_LPCLGIR3, gen_io_dec[2]); pcr_write32(PID_DMI, PCR_DMI_LPCLGIR4, gen_io_dec[3]); }
/* Enable TCO BAR using SMBUS TCO base to access TCO related register */ static void tco_enable_bar(void) { uint32_t reg32; uint16_t tcobase; #if defined(__SIMPLE_DEVICE__) int devfn = PCH_DEVFN_SMBUS; pci_devfn_t dev = PCI_DEV(0, PCI_SLOT(devfn), PCI_FUNC(devfn)); #else struct device *dev; dev = PCH_DEV_SMBUS; #endif /* Disable TCO in SMBUS Device first before changing Base Address */ reg32 = pci_read_config32(dev, TCOCTL); reg32 &= ~TCO_BASE_EN; pci_write_config32(dev, TCOCTL, reg32); /* Program TCO Base */ tcobase = tco_get_bar(); pci_write_config32(dev, TCOBASE, tcobase); /* Enable TCO in SMBUS */ pci_write_config32(dev, TCOCTL, reg32 | TCO_BASE_EN); /* * Program "TCO Base Address" PCR[DMI] + 2778h[15:5, 1] */ pcr_write32(PID_DMI, PCR_DMI_TCOBASE, tcobase | TCOEN); }
void pcr_or32(uint8_t pid, uint16_t offset, uint32_t ordata) { uint32_t data32; data32 = pcr_read32(pid, offset); data32 |= ordata; pcr_write32(pid, offset, data32); }