int cvm_oct_sgmii_open(struct net_device *dev)
{
union cvmx_gmxx_prtx_cfg gmx_cfg;
struct octeon_ethernet *priv = netdev_priv(dev);
cvmx_helper_link_info_t link_info;
int rv;
rv = cvm_oct_phy_setup_device(dev);
if (rv)
return rv;
gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(priv->interface_port, priv->interface));
gmx_cfg.s.en = 1;
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(priv->interface_port, priv->interface), gmx_cfg.u64);
if (octeon_is_simulation())
return 0;
if (priv->phydev) {
int r = phy_read_status(priv->phydev);
if (r == 0 && priv->phydev->link == 0)
netif_carrier_off(dev);
cvm_oct_adjust_link(dev);
} else {
link_info = cvmx_helper_link_get(priv->ipd_port);
if (!link_info.s.link_up)
netif_carrier_off(dev);
priv->poll = cvm_oct_sgmii_poll;
cvm_oct_sgmii_poll(dev);
}
return 0;
}
static int s6gmac_open(struct net_device *dev)
{
struct s6gmac *pd = netdev_priv(dev);
unsigned long flags;
phy_read_status(pd->phydev);
spin_lock_irqsave(&pd->lock, flags);
pd->link.mbit = 0;
s6gmac_linkisup(dev, pd->phydev->link);
s6gmac_init_device(dev);
s6gmac_init_stats(dev);
s6gmac_init_dmac(dev);
s6gmac_rx_fillfifo(pd);
s6dmac_enable_chan(pd->rx_dma, pd->rx_chan,
2, 1, 0, 1, 0, 0, 0, 7, -1, 2, 0, 1);
s6dmac_enable_chan(pd->tx_dma, pd->tx_chan,
2, 0, 1, 0, 0, 0, 0, 7, -1, 2, 0, 1);
writel(0 << S6_GMAC_HOST_INT_TXBURSTOVER |
0 << S6_GMAC_HOST_INT_TXPREWOVER |
0 << S6_GMAC_HOST_INT_RXBURSTUNDER |
0 << S6_GMAC_HOST_INT_RXPOSTRFULL |
0 << S6_GMAC_HOST_INT_RXPOSTRUNDER,
pd->reg + S6_GMAC_HOST_INTMASK);
spin_unlock_irqrestore(&pd->lock, flags);
phy_start(pd->phydev);
netif_start_queue(dev);
return 0;
}
/* ethtool operations *******************************************************/
static int
dsa_slave_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
{
struct dsa_slave_priv *p = netdev_priv(dev);
int err;
err = -EOPNOTSUPP;
if (p->phy != NULL) {
err = phy_read_status(p->phy);
if (err == 0)
err = phy_ethtool_gset(p->phy, cmd);
}
return err;
}
static int fe_get_settings(struct net_device *dev,
struct ethtool_cmd *cmd)
{
struct fe_priv *priv = netdev_priv(dev);
int err;
if (!priv->phy_dev)
goto out_gset;
if (priv->phy_flags == FE_PHY_FLAG_ATTACH) {
err = phy_read_status(priv->phy_dev);
if (err)
goto out_gset;
}
return phy_ethtool_gset(priv->phy_dev, cmd);
out_gset:
return -ENODEV;
}
int cvm_oct_common_open(struct net_device *dev,
void (*link_poll)(struct net_device *))
{
union cvmx_gmxx_prtx_cfg gmx_cfg;
struct octeon_ethernet *priv = netdev_priv(dev);
int interface = INTERFACE(priv->port);
int index = INDEX(priv->port);
cvmx_helper_link_info_t link_info;
int rv;
rv = cvm_oct_phy_setup_device(dev);
if (rv)
return rv;
gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
gmx_cfg.s.en = 1;
if (octeon_has_feature(OCTEON_FEATURE_PKND))
gmx_cfg.s.pknd = priv->port;
cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
if (octeon_is_simulation())
return 0;
if (dev->phydev) {
int r = phy_read_status(dev->phydev);
if (r == 0 && dev->phydev->link == 0)
netif_carrier_off(dev);
cvm_oct_adjust_link(dev);
} else {
link_info = cvmx_helper_link_get(priv->port);
if (!link_info.s.link_up)
netif_carrier_off(dev);
priv->poll = link_poll;
link_poll(dev);
}
return 0;
}
int cvm_oct_sgmii_open(struct net_device *dev)
{
struct octeon_hw_status_reg sr[3];
union cvmx_gmxx_prtx_cfg gmx_cfg;
struct octeon_ethernet *priv = netdev_priv(dev);
cvmx_helper_link_info_t link_info;
cvmx_helper_interface_mode_t imode;
int rv, i;
u64 en_mask;
rv = cvm_oct_phy_setup_device(dev);
if (rv)
return rv;
gmx_cfg.u64 = cvmx_read_csr(priv->gmx_base + GMX_PRT_CFG);
gmx_cfg.s.en = 1;
cvmx_write_csr(priv->gmx_base + GMX_PRT_CFG, gmx_cfg.u64);
if (octeon_is_simulation())
return 0;
if (priv->phydev) {
int r = phy_read_status(priv->phydev);
if (r == 0 && priv->phydev->link == 0)
netif_carrier_off(dev);
cvm_oct_adjust_link(dev);
} else {
link_info = cvmx_helper_link_get(priv->ipd_port);
if (!link_info.s.link_up)
netif_carrier_off(dev);
priv->poll = cvm_oct_sgmii_poll;
cvm_oct_sgmii_poll(dev);
}
imode = cvmx_helper_interface_get_mode(priv->interface);
switch (imode) {
case CVMX_HELPER_INTERFACE_MODE_XAUI:
case CVMX_HELPER_INTERFACE_MODE_RXAUI:
/* Handle GMXX_RXX_INT_REG[LOC_FAULT,REM_FAULT]*/
priv->hw_status_notifier.priority = 10;
priv->hw_status_notifier.notifier_call = cvm_oct_sgmii_hw_status;
octeon_hw_status_notifier_register(&priv->hw_status_notifier);
memset(sr, 0, sizeof(sr));
i = 0;
en_mask = 0;
if (OCTEON_IS_OCTEONPLUS()) {
sr[i].reg = 46; /* RML */
sr[i].reg_is_hwint = 1;
sr[i].has_child = 1;
i++;
sr[i].reg = CVMX_NPEI_RSL_INT_BLOCKS;
/* GMX[priv->interface]*/
sr[i].bit = priv->interface + 1;
sr[i].has_child = 1;
i++;
} else if (octeon_has_feature(OCTEON_FEATURE_CIU2)) {
/* PKT[AGX[priv->interface]]*/
sr[i].reg = (6 << 6) | priv->interface;
sr[i].reg_is_hwint = 1;
sr[i].has_child = 1;
i++;
} else {
/* INT_SUM1[AGX[priv->interface]]*/
sr[i].reg = (1 << 6) | (priv->interface + 36);
sr[i].reg_is_hwint = 1;
sr[i].has_child = 1;
i++;
}
sr[i].reg = CVMX_GMXX_RXX_INT_REG(priv->interface_port,
priv->interface);
sr[i].mask_reg = CVMX_GMXX_RXX_INT_EN(priv->interface_port,
priv->interface);
sr[i].ack_w1c = 1;
sr[i].bit = INT_BIT_LOC_FAULT;
en_mask |= 1ull << sr[i].bit;
octeon_hw_status_add_source(sr);
sr[i].bit = INT_BIT_REM_FAULT;
en_mask |= 1ull << sr[i].bit;
octeon_hw_status_add_source(sr);
octeon_hw_status_enable(sr[i].reg, en_mask);
break;
default:
break;
}
return 0;
}
