static int zynq_phy_init(struct udevice *dev) { int ret; struct zynq_gem_priv *priv = dev_get_priv(dev); struct zynq_gem_regs *regs = priv->iobase; const u32 supported = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; /* Enable only MDIO bus */ writel(ZYNQ_GEM_NWCTRL_MDEN_MASK, ®s->nwctrl); if ((priv->interface != PHY_INTERFACE_MODE_SGMII) && (priv->interface != PHY_INTERFACE_MODE_GMII)) { ret = phy_detection(dev); if (ret) { printf("GEM PHY init failed\n"); return ret; } } priv->phydev = phy_connect(priv->bus, priv->phyaddr, dev, priv->interface); if (!priv->phydev) return -ENODEV; priv->phydev->supported &= supported | ADVERTISED_Pause | ADVERTISED_Asym_Pause; if (priv->max_speed) { ret = phy_set_supported(priv->phydev, priv->max_speed); if (ret) return ret; } priv->phydev->advertising = priv->phydev->supported; if (priv->phy_of_handle > 0) dev_set_of_offset(priv->phydev->dev, priv->phy_of_handle); return phy_config(priv->phydev); }
static int ftgmac100_phy_init(struct udevice *dev) { struct ftgmac100_data *priv = dev_get_priv(dev); struct phy_device *phydev; int ret; phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode); if (!phydev) return -ENODEV; phydev->supported &= PHY_GBIT_FEATURES; if (priv->max_speed) { ret = phy_set_supported(phydev, priv->max_speed); if (ret) return ret; } phydev->advertising = phydev->supported; priv->phydev = phydev; phy_config(phydev); return 0; }