static int __init omap2_init_devices(void) { /* Enable dummy states for those platforms without pinctrl support */ if (!of_have_populated_dt()) pinctrl_provide_dummies(); /* * please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ omap_init_audio(); omap_init_camera(); omap_init_hdmi_audio(); omap_init_mbox(); /* If dtb is there, the devices will be created dynamically */ if (!of_have_populated_dt()) { omap_init_dmic(); omap_init_mcpdm(); omap_init_mcspi(); omap_init_sham(); omap_init_aes(); } omap_init_sti(); omap_init_rng(); omap_init_vout(); omap_init_ocp2scp(); if (soc_is_am33xx()) { am33xx_register_ehrpwm(); } return 0; }
static int __init omap2_init_devices(void) { /* Enable dummy states for those platforms without pinctrl support */ if (!of_have_populated_dt()) pinctrl_provide_dummies(); /* * please keep these calls, and their implementations above, * in alphabetical order so they're easier to sort through. */ omap_init_audio(); omap_init_camera(); omap_init_hdmi_audio(); omap_init_mbox(); /* If dtb is there, the devices will be created dynamically */ if (!of_have_populated_dt()) { omap_init_dmic(); omap_init_mcpdm(); omap_init_mcspi(); omap_init_sham(); omap_init_aes(); } else { /* These can be removed when bindings are done */ omap_init_wl12xx_of(); } omap_init_sti(); omap_init_rng(); omap_init_vout(); return 0; }
static int sh_pfc_probe(struct platform_device *pdev) { const struct sh_pfc_soc_info *info; struct sh_pfc *pfc; int ret; info = pdev->id_entry->driver_data ? (void *)pdev->id_entry->driver_data : pdev->dev.platform_data; if (info == NULL) return -ENODEV; pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL); if (pfc == NULL) return -ENOMEM; pfc->info = info; pfc->dev = &pdev->dev; ret = sh_pfc_ioremap(pfc, pdev); if (unlikely(ret < 0)) return ret; spin_lock_init(&pfc->lock); pinctrl_provide_dummies(); /* * Initialize pinctrl bindings first */ ret = sh_pfc_register_pinctrl(pfc); if (unlikely(ret != 0)) return ret; #ifdef CONFIG_GPIO_SH_PFC /* * Then the GPIO chip */ ret = sh_pfc_register_gpiochip(pfc); if (unlikely(ret != 0)) { /* * If the GPIO chip fails to come up we still leave the * PFC state as it is, given that there are already * extant users of it that have succeeded by this point. */ dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n"); } #endif platform_set_drvdata(pdev, pfc); dev_info(pfc->dev, "%s support registered\n", info->name); return 0; }
void __init imx1_soc_init(void) { mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTA, 0); mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTB, 0); mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTC, 0); mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTD, 0); pinctrl_provide_dummies(); }
void __init imx25_soc_init(void) { /* i.mx25 has the i.mx35 type gpio */ mxc_register_gpio("imx35-gpio", 0, MX25_GPIO1_BASE_ADDR, SZ_16K, MX25_INT_GPIO1, 0); mxc_register_gpio("imx35-gpio", 1, MX25_GPIO2_BASE_ADDR, SZ_16K, MX25_INT_GPIO2, 0); mxc_register_gpio("imx35-gpio", 2, MX25_GPIO3_BASE_ADDR, SZ_16K, MX25_INT_GPIO3, 0); mxc_register_gpio("imx35-gpio", 3, MX25_GPIO4_BASE_ADDR, SZ_16K, MX25_INT_GPIO4, 0); pinctrl_provide_dummies(); /* i.mx25 has the i.mx35 type sdma */ imx_add_imx_sdma("imx35-sdma", MX25_SDMA_BASE_ADDR, MX25_INT_SDMA, &imx25_sdma_pdata); /* i.mx25 has the i.mx31 type audmux */ platform_device_register_simple("imx31-audmux", 0, imx25_audmux_res, ARRAY_SIZE(imx25_audmux_res)); }
static void __init imx6q_init_machine(void) { /* * This should be removed when all imx6q boards have pinctrl * states for devices defined in device tree. */ pinctrl_provide_dummies(); if (of_machine_is_compatible("fsl,imx6q-sabrelite")) imx6q_sabrelite_init(); of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); imx6q_pm_init(); imx6q_usb_init(); }
void __init imx1_soc_init(void) { imx1_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR)); mxc_device_init(); mxc_register_gpio("imx1-gpio", 0, MX1_GPIO1_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTA, 0); mxc_register_gpio("imx1-gpio", 1, MX1_GPIO2_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTB, 0); mxc_register_gpio("imx1-gpio", 2, MX1_GPIO3_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTC, 0); mxc_register_gpio("imx1-gpio", 3, MX1_GPIO4_BASE_ADDR, SZ_256, MX1_GPIO_INT_PORTD, 0); imx_add_imx_dma("imx1-dma", MX1_DMA_BASE_ADDR, MX1_DMA_INT, MX1_DMA_ERR); pinctrl_provide_dummies(); }
void __init imx51_soc_init(void) { /* i.mx51 has the i.mx31 type gpio */ mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR, SZ_16K, MX51_INT_GPIO1_LOW, MX51_INT_GPIO1_HIGH); mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR, SZ_16K, MX51_INT_GPIO2_LOW, MX51_INT_GPIO2_HIGH); mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR, SZ_16K, MX51_INT_GPIO3_LOW, MX51_INT_GPIO3_HIGH); mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR, SZ_16K, MX51_INT_GPIO4_LOW, MX51_INT_GPIO4_HIGH); pinctrl_provide_dummies(); /* i.mx51 has the i.mx35 type sdma */ imx_add_imx_sdma("imx35-sdma", MX51_SDMA_BASE_ADDR, MX51_INT_SDMA, &imx51_sdma_pdata); /* Setup AIPS registers */ imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR)); imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR)); /* i.mx51 has the i.mx31 type audmux */ platform_device_register_simple("imx31-audmux", 0, imx51_audmux_res, ARRAY_SIZE(imx51_audmux_res)); }
static void __init imx53_dt_init(void) { struct device_node *node; const struct of_device_id *of_id; void (*func)(void); of_irq_init(imx53_irq_match); pinctrl_provide_dummies(); node = of_find_matching_node(NULL, imx53_iomuxc_of_match); if (node) { of_id = of_match_node(imx53_iomuxc_of_match, node); func = of_id->data; func(); of_node_put(node); } of_platform_populate(NULL, of_default_bus_match_table, imx53_auxdata_lookup, NULL); }
void __init imx27_soc_init(void) { mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR)); mxc_device_init(); /* i.mx27 has the i.mx21 type gpio */ mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0); pinctrl_provide_dummies(); imx_add_imx_dma("imx27-dma", MX27_DMA_BASE_ADDR, MX27_INT_DMACH0, 0); /* No ERR irq */ /* imx27 has the imx21 type audmux */ platform_device_register_simple("imx21-audmux", 0, imx27_audmux_res, ARRAY_SIZE(imx27_audmux_res)); imx27_pm_init(); }
static int sh_pfc_probe(struct platform_device *pdev) { const struct platform_device_id *platid = platform_get_device_id(pdev); #ifdef CONFIG_OF struct device_node *np = pdev->dev.of_node; #endif const struct sh_pfc_soc_info *info; struct sh_pfc *pfc; int ret; #ifdef CONFIG_OF if (np) info = of_device_get_match_data(&pdev->dev); else #endif info = platid ? (const void *)platid->driver_data : NULL; if (info == NULL) return -ENODEV; pfc = devm_kzalloc(&pdev->dev, sizeof(*pfc), GFP_KERNEL); if (pfc == NULL) return -ENOMEM; pfc->info = info; pfc->dev = &pdev->dev; ret = sh_pfc_map_resources(pfc, pdev); if (unlikely(ret < 0)) return ret; spin_lock_init(&pfc->lock); if (info->ops && info->ops->init) { ret = info->ops->init(pfc); if (ret < 0) return ret; } /* Enable dummy states for those platforms without pinctrl support */ if (!of_have_populated_dt()) pinctrl_provide_dummies(); ret = sh_pfc_init_ranges(pfc); if (ret < 0) return ret; /* * Initialize pinctrl bindings first */ ret = sh_pfc_register_pinctrl(pfc); if (unlikely(ret != 0)) return ret; #ifdef CONFIG_PINCTRL_SH_PFC_GPIO /* * Then the GPIO chip */ ret = sh_pfc_register_gpiochip(pfc); if (unlikely(ret != 0)) { /* * If the GPIO chip fails to come up we still leave the * PFC state as it is, given that there are already * extant users of it that have succeeded by this point. */ dev_notice(pfc->dev, "failed to init GPIO chip, ignoring...\n"); } #endif platform_set_drvdata(pdev, pfc); dev_info(pfc->dev, "%s support registered\n", info->name); return 0; }
void __init mx28_soc_init(void) { pinctrl_provide_dummies(); }
int amlogic_pmx_probe(struct platform_device *pdev, struct amlogic_pinctrl_soc_data *soc_data) { struct amlogic_pmx *apmx; int ret, val; pr_info("Init pinux probe!\n"); apmx = devm_kzalloc(&pdev->dev, sizeof(*apmx), GFP_KERNEL); if (!apmx) { dev_err(&pdev->dev, "Can't alloc amlogic_pmx\n"); return -ENOMEM; } apmx->dev = &pdev->dev; apmx->soc = soc_data; platform_set_drvdata(pdev, apmx); ret = meson_pinctrl_parse_dt(apmx, pdev->dev.of_node); if (ret) return ret; ret = of_property_read_u32(pdev->dev.of_node, "#pinmux-cells", &val); if (ret) { dev_err(&pdev->dev, "dt probe #pinmux-cells failed: %d\n", ret); goto err; } apmx->pinmux_cell = val; ret = amlogic_pinctrl_probe_dt(pdev, apmx); if (ret) { dev_err(&pdev->dev, "dt probe failed: %d\n", ret); goto err; } #ifdef AML_PIN_DEBUG_GUP amlogic_dump_pinctrl_data(pdev); #endif amlogic_gpio_ranges.npins = apmx->soc->npins; amlogic_pmx_desc.name = dev_name(&pdev->dev); amlogic_pmx_desc.pins = apmx->soc->pins; amlogic_pmx_desc.npins = apmx->soc->npins; apmx->pctl = pinctrl_register(&amlogic_pmx_desc, &pdev->dev, apmx); if (!apmx->pctl) { dev_err(&pdev->dev, "Couldn't register pinctrl driver\n"); goto err; } ret = meson_gpiolib_register(apmx); if (ret) { pinctrl_unregister(apmx->pctl); return ret; } /* pinctrl_add_gpio_range(apmx->pctl, &amlogic_gpio_ranges); */ pctdev_name = dev_name(&pdev->dev); pinctrl_provide_dummies(); dev_info(&pdev->dev, "Probed amlogic pinctrl driver\n"); pctl = apmx->pctl; int_reg = meson_map(&pdev->dev, pdev->dev.of_node, "Int"); gl_pmx = apmx; return 0; err: devm_kfree(&pdev->dev, apmx); return ret; }