/**
* \brief Process Buttons Events.
*
* \param uc_button The button number.
*/
static void process_button_event(uint8_t uc_button)
{
/* Switch between temperature, light and SD mode. */
if (uc_button == 1) {
app_mode_switch = 1;
pio_disable_interrupt(OLED1_PIN_PUSHBUTTON_1_PIO,
OLED1_PIN_PUSHBUTTON_1_MASK);
} else if ((uc_button == 2) && (app_mode == 2) &&
(sd_fs_found == 1) && (sd_update == 0)) {
/* Page UP button in SD mode. */
if (sd_listing_pos > 0) {
sd_listing_pos -= 1;
sd_update = 1;
pio_disable_interrupt(OLED1_PIN_PUSHBUTTON_2_PIO,
OLED1_PIN_PUSHBUTTON_2_MASK);
}
} else if ((uc_button == 3) && (app_mode == 2) &&
(sd_fs_found == 1) && (sd_update == 0)) {
/* Page DOWN button in SD mode. */
/* Lock DOWN button when showing the last file. */
if (sd_listing_pos < sd_num_files) {
sd_listing_pos += 1;
sd_update = 1;
pio_disable_interrupt(OLED1_PIN_PUSHBUTTON_3_PIO,
OLED1_PIN_PUSHBUTTON_3_MASK);
}
}
}
/**
* \brief Start capture process.
*
*/
static void ov7740_test_capture_process_run(const struct test_case* const test)
{
if (g_ul_init_error_flag == true) {
/* Return error if previous test about initialization failed */
test_assert_true(test, 0, "OV7740 capture test failed!");
} else {
/* Enable vsync interrupt */
pio_enable_interrupt(OV7740_VSYNC_PIO, OV7740_VSYNC_MASK);
/* Capture acquisition will start on rising edge of Vsync
* signal.
* So wait vsync_flag = 1 before starting the process
*/
while (!g_ul_vsync_flag) {
}
/* Enable vsync interrupt */
pio_disable_interrupt(OV7740_VSYNC_PIO, OV7740_VSYNC_MASK);
/* Reset vsync flag */
g_ul_vsync_flag = false;
/* Configure the PDC Buffer and next Buffer for image capture */
pio_capture_to_buffer(OV7740_VSYNC_PIO, g_auc_capture_buffer,
sizeof(g_auc_capture_buffer));
/* Enable PIO capture */
pio_capture_enable(OV7740_DATA_BUS_PIO);
/* Wait for the end of capture of the g_auc_capture_buffer */
while (!((OV7740_DATA_BUS_PIO->PIO_PCISR & PIO_PCIMR_ENDRX) ==
PIO_PCIMR_ENDRX)) {
}
}
}
/**
* \brief Configure one or more pin(s) of a PIO controller as outputs, with
* the given default value. Optionally, the multi-drive feature can be enabled
* on the pin(s).
*
* \param p_pio Pointer to a PIO instance.
* \param ul_mask Bitmask indicating which pin(s) to configure.
* \param ul_default_level Default level on the pin(s).
* \param ul_multidrive_enable Indicates if the pin(s) shall be configured as
* open-drain.
* \param ul_pull_up_enable Indicates if the pin shall have its pull-up
* activated.
*/
void pio_set_output(Pio *p_pio, const uint32_t ul_mask,
const uint32_t ul_default_level,
const uint32_t ul_multidrive_enable,
const uint32_t ul_pull_up_enable)
{
pio_disable_interrupt(p_pio, ul_mask);
pio_pull_up(p_pio, ul_mask, ul_pull_up_enable);
/* Enable multi-drive if necessary */
if (ul_multidrive_enable) {
p_pio->PIO_MDER = ul_mask;
} else {
p_pio->PIO_MDDR = ul_mask;
}
/* Set default value */
if (ul_default_level) {
p_pio->PIO_SODR = ul_mask;
} else {
p_pio->PIO_CODR = ul_mask;
}
/* Configure pin(s) as output(s) */
p_pio->PIO_OER = ul_mask;
p_pio->PIO_PER = ul_mask;
}
OSStatus gpio_irq_disable( gpio_port_t gpio_port, gpio_pin_number_t gpio_pin_number )
{
Pio *p_pio = arch_ioport_port_to_base(gpio_port);
ioport_port_mask_t ul_mask = ioport_pin_to_mask(CREATE_IOPORT_PIN(gpio_port, gpio_pin_number));
pio_disable_interrupt(p_pio, ul_mask);
return kGeneralErr;
}
/*
* @fn nm_bsp_interrupt_ctrl
* @brief Enable/Disable interrupts
* @param[IN] u8Enable
* '0' disable interrupts. '1' enable interrupts
*/
void nm_bsp_interrupt_ctrl(uint8 u8Enable)
{
if (u8Enable) {
pio_enable_interrupt(CONF_WINC_SPI_INT_PIO, CONF_WINC_SPI_INT_MASK);
}
else {
pio_disable_interrupt(CONF_WINC_SPI_INT_PIO, CONF_WINC_SPI_INT_MASK);
}
}
/**
* \brief Initialize PIO interrupt management logic.
*
* \note The desired priority of PIO must be provided.
* Calling this function multiple times result in the reset of currently
* configured interrupt on the provided PIO.
*
* \param p_pio PIO controller base address.
* \param ul_irqn NVIC line number.
* \param ul_priority PIO controller interrupts priority.
*/
void pio_handler_set_priority(Pio *p_pio, IRQn_Type ul_irqn, uint32_t ul_priority)
{
/* Configure PIO interrupt sources */
pio_get_interrupt_status(p_pio);
pio_disable_interrupt(p_pio, 0xFFFFFFFF);
NVIC_DisableIRQ(ul_irqn);
NVIC_ClearPendingIRQ(ul_irqn);
NVIC_SetPriority(ul_irqn, ul_priority);
NVIC_EnableIRQ(ul_irqn);
}
/**
* ISR that handles the target chip asserting a data ready signal.
*/
void AJ_WSL_SPI_CHIP_SPI_ISR(uint32_t id, uint32_t mask)
{
if (ID_PIOC != id || AJ_WSL_SPI_CHIP_SPI_INT_BIT != mask) {
return;
}
pio_disable_interrupt(PIOC, AJ_WSL_SPI_CHIP_SPI_INT_BIT);
if (mask & AJ_WSL_SPI_CHIP_SPI_INT_BIT) {
g_b_spi_interrupt_data_ready = TRUE;
AJ_ResumeTask(AJ_WSL_MBoxListenHandle, TRUE);
}
pio_enable_interrupt(PIOC, AJ_WSL_SPI_CHIP_SPI_INT_BIT);
}
/**
* \brief Initialize PIO interrupt management logic.
*
* \param p_pio PIO controller base address.
* \param ul_irqn NVIC line number.
* \param ul_priority PIO controller interrupts priority.
*/
void pio_handler_set_priority(Pio *p_pio, IRQn_Type ul_irqn, uint32_t ul_priority)
{
uint32_t bitmask = 0;
bitmask = pio_get_interrupt_mask(p_pio);
pio_disable_interrupt(p_pio, 0xFFFFFFFF);
pio_get_interrupt_status(p_pio);
NVIC_DisableIRQ(ul_irqn);
NVIC_ClearPendingIRQ(ul_irqn);
NVIC_SetPriority(ul_irqn, ul_priority);
NVIC_EnableIRQ(ul_irqn);
pio_enable_interrupt(p_pio, bitmask);
}
void MPU60X0HeadInterrupt(uint32_t a, uint32_t b)
{
static uint8_t gyroReadingOffset = 0;
static uint8_t accelReadingOffset = 0;
static uint8_t tempReadingOffset = 0;
MPU60X0IntteruptController(MPU60X0_ADDRESS_HEAD, 1, &gyroReadingOffset, &accelReadingOffset, &tempReadingOffset);
// Mark interrupt as handled.
pio_disable_interrupt(PIOA, MPU60X0_HEAD_INT_PIN);
// Average the stored readings.
storeAveragedReadings();
}
int initMPU60X0(void)
{
twi_options_t twi_options;
twi_options.master_clk = BOARD_MCK;
twi_options.speed = MPU60X0_SPEED;
twi_options.chip = MPU60X0_BASE_ADDRESS;
// Enable External Interrupt Controller Line.
// Enable interrupts with priority higher than USB.
pio_set_input(PIOA, MPU60X0_BODY_INT_PIN, MPU60X0_BODY_INT_FUNCTION);
pio_configure_interrupt(PIOA, MPU60X0_BODY_INT_PIN, MPU60X0_BODY_INT_FUNCTION);
pio_handler_set(PIOA, ID_PIOA, MPU60X0_BODY_INT_PIN, PIO_IT_RISE_EDGE, MPU60X0BodyInterrupt);
pio_set_input(PIOA, MPU60X0_HEAD_INT_PIN, MPU60X0_HEAD_INT_FUNCTION);
pio_configure_interrupt(PIOA, MPU60X0_HEAD_INT_PIN, MPU60X0_HEAD_INT_FUNCTION);
pio_handler_set(PIOA, ID_PIOA, MPU60X0_HEAD_INT_PIN, PIO_IT_RISE_EDGE, MPU60X0HeadInterrupt);
NVIC_EnableIRQ(PIOA_IRQn);
pio_enable_interrupt(PIOA, MPU60X0_BODY_INT_PIN);
pio_enable_interrupt(PIOA, MPU60X0_HEAD_INT_PIN);
// Initialize TWI driver with options.
if (TWI_SUCCESS != twi_master_init(TWI0, &twi_options))
{
// Disable the interrupts.
pio_disable_interrupt(PIOA, MPU60X0_BODY_INT_PIN);
pio_disable_interrupt(PIOA, MPU60X0_HEAD_INT_PIN);
return(-1);
}
// Enable both RX and TX
TWI0->TWI_IER = TWI_IER_TXRDY | TWI_IER_RXRDY;
return(0);
}
int disableMPU60X0(void)
{
uint8_t data;
// Put MPUs into sleep mode.
data = MPU60X0_MPU60X0_SLEEP_MODE;
if (sendMPUPacket(MPU60X0_ADDRESS_BODY, MPU60X0_PWR_MGMT_1, &data, 1) != 0)
{
return(-1);
}
if (sendMPUPacket(MPU60X0_ADDRESS_HEAD, MPU60X0_PWR_MGMT_1, &data, 1) != 0)
{
return(-1);
}
// Close TWI/I2C port.
TWI0->TWI_IDR = 0xFFFFFFFF;
// Disable the interrupts.
pio_disable_interrupt(PIOA, MPU60X0_BODY_INT_PIN);
pio_disable_interrupt(PIOA, MPU60X0_HEAD_INT_PIN);
}
/**
* \brief Configure one or more pin(s) or a PIO controller as inputs.
* Optionally, the corresponding internal pull-up(s) and glitch filter(s) can
* be enabled.
*
* \param p_pio Pointer to a PIO instance.
* \param ul_mask Bitmask indicating which pin(s) to configure as input(s).
* \param ul_attribute PIO attribute(s).
*/
void pio_set_input(Pio *p_pio, const uint32_t ul_mask,
const uint32_t ul_attribute)
{
pio_disable_interrupt(p_pio, ul_mask);
pio_pull_up(p_pio, ul_mask, ul_attribute & PIO_PULLUP);
/* Enable Input Filter if necessary */
if (ul_attribute & (PIO_DEGLITCH | PIO_DEBOUNCE)) {
p_pio->PIO_IFER = ul_mask;
} else {
p_pio->PIO_IFDR = ul_mask;
}
#if (SAM3S || SAM3N || SAM4S)
/* Enable de-glitch or de-bounce if necessary */
if (ul_attribute & PIO_DEGLITCH) {
p_pio->PIO_IFSCDR = ul_mask;
} else {
if (ul_attribute & PIO_DEBOUNCE) {
p_pio->PIO_IFSCER = ul_mask;
}
}
#elif (SAM3XA|| SAM3U)
/* Enable de-glitch or de-bounce if necessary */
if (ul_attribute & PIO_DEGLITCH) {
p_pio->PIO_SCIFSR = ul_mask;
} else {
if (ul_attribute & PIO_DEBOUNCE) {
p_pio->PIO_SCIFSR = ul_mask;
}
}
#else
#error "Unsupported device"
#endif
/* Configure pin as input */
p_pio->PIO_ODR = ul_mask;
p_pio->PIO_PER = ul_mask;
}
/**
* \brief Handler for INT1, rising edge interrupt. In INT1, it will trigger
* INT2.
*/
static void Int1Handler(uint32_t ul_id, uint32_t ul_mask)
{
if (PIN_PUSHBUTTON_1_ID != ul_id || PIN_PUSHBUTTON_1_MASK != ul_mask)
return;
pio_disable_interrupt(PIN_PUSHBUTTON_1_PIO, PIN_PUSHBUTTON_1_MASK);
/* Trigger INT1 & Delay for a while. */
puts("===================================================\r");
puts("Enter _Int1Handler.\r");
gpio_set_pin_low(LED0_GPIO);
delay_ticks(2000);
gpio_set_pin_high(LED0_GPIO);
puts("Exit _Int1Handler.\r");
puts("===================================================\r");
pio_enable_interrupt(PIN_PUSHBUTTON_1_PIO, PIN_PUSHBUTTON_1_MASK);
}
/**
* \brief Handler for INT2, rising edge interrupt.
*/
static void Int2Handler(uint32_t ul_id, uint32_t ul_mask)
{
if (PIN_PUSHBUTTON_2_ID != ul_id || PIN_PUSHBUTTON_2_MASK != ul_mask)
return;
pio_disable_interrupt(PIN_PUSHBUTTON_2_PIO, PIN_PUSHBUTTON_2_MASK);
puts("***************************************************\r");
puts("Enter _Int2Handler.\r");
/* Enter INT2. */
gpio_set_pin_low(LED1_GPIO);
/* Delay for a while. */
delay_ticks(2000);
/* Exit INT2. */
gpio_set_pin_high(LED1_GPIO);
puts("Exit _Int2Handler.\r");
puts("***************************************************\r");
pio_enable_interrupt(PIN_PUSHBUTTON_2_PIO, PIN_PUSHBUTTON_2_MASK);
}
void cs_listener_run(void) {
uint8_t ts[8];
uint32 chirp_ts;
int64_t rcv_tag_ts = 0;
uint32 sync_rate = cph_config->sender_period;
uint8 functionCode = 0;
double diff_val = 0;
double diff_val_prev = 0;
double diff_val_var = 0;
double diff_ts =0;
double adjusted_ts = 0;
double relative_tag_ts = 0;
int64_t rcv_curr_ts = 0;
int64_t rcv_prev_ts = 0;
int64_t rcv_diff_ts = 0;
double rcv_diff = 0;
int64_t blink_curr_ts = 0;
int64_t blink_prev_ts = 0;
int64_t blink_diff_ts = 0;
double blink_diff = 0;
double rcv_blink_diff = 0;
uint32 rcv_interval;
uint32 elapsed;
uint8 count = 1;
irq_init();
pio_disable_interrupt(DW_IRQ_PIO, DW_IRQ_MASK);
cph_deca_init_device();
cph_deca_init_network(cph_config->panid, cph_config->shortid);
printf("Device ID: %08X\r\n", dwt_readdevid());
// Enable external sync
uint32_t ec_ctrl;
dwt_readfromdevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 4, (uint8_t*) &ec_ctrl);
ec_ctrl &= EC_CTRL_WAIT_MASK; // clear WAIT field
ec_ctrl |= EC_CTRL_OSTRM | (33 << 3); // turn on OSTRM and put 33 in WAIT field
dwt_writetodevice(EXT_SYNC_ID, EC_CTRL_OFFSET, 4, (uint8_t*) &ec_ctrl);
dwt_setcallbacks(0, rxcallback);
chirp_ts = cph_get_millis();
dwt_setinterrupt( DWT_INT_TFRS | DWT_INT_RFCG | (DWT_INT_ARFE | DWT_INT_RFSL | DWT_INT_SFDT | DWT_INT_RPHE | DWT_INT_RFCE | DWT_INT_RFTO /*| DWT_INT_RXPTO*/), 1);
pio_enable_interrupt(DW_IRQ_PIO, DW_IRQ_MASK);
dwt_rxenable(0);
while(1)
{
if(AWAKE_CHIRP) {
elapsed = cph_get_millis() - chirp_ts;
if(elapsed > CHIRP_PERIOD) {
TRACE("Awake %d\r\n", count);
count++;
chirp_ts = cph_get_millis();
}
}
if(irq_status == STATUS_RCV){
functionCode = ((cph_deca_msg_header_t*)rx_buffer)->functionCode;
switch(functionCode){
case FUNC_CS_SYNC:
dwt_readrxtimestamp(ts);
TRACE("end sys: ");
for (int i = 4; i >= 0; i--) {
TRACE("%02X", ts[i]);
}
TRACE("\r\n");
// // Difference in RX timestamps
// rcv_curr_ts = get_rx_timestamp();
// rcv_diff_ts = rcv_curr_ts - rcv_prev_ts;
// rcv_prev_ts = rcv_curr_ts;
// rcv_diff = (int64_t)rcv_diff_ts * DWT_TIME_UNITS * 1000;
//
// // Difference in TX timestamps
// blink_curr_ts = ((int64_t)((cph_deca_msg_blink_t*)rx_buffer)->blinkTxTs) << 8;
// blink_diff_ts = blink_curr_ts - blink_prev_ts;
// blink_prev_ts = blink_curr_ts;
// blink_diff = blink_diff_ts * DWT_TIME_UNITS * 1000;
//
// rcv_blink_diff = rcv_diff - blink_diff;
//
//// TRACE("TS0: %08X \t TS1: %08X \t V: %08X \t %+.08f ms\r\n", blink_ts_prev, blink_ts, blink_ts_var, blink_diff);
// TRACE("Bdiff: %+.08f ms \t Rdiff: %+.08f ms \t RBdiff: %+.08f ms\r\n", blink_diff, rcv_diff, rcv_blink_diff);
break;
case FUNC_CS_TAG:
rcv_tag_ts = get_rx_timestamp();
rcv_tag_ts = rcv_tag_ts - rcv_curr_ts;
relative_tag_ts = DWU_to_MS(rcv_tag_ts);
// TRACE("%02X : Raw Tag TS: %.08f ", ((cph_deca_msg_header_t*)rx_buffer)->seq, relative_tag_ts);
if(relative_tag_ts < 100) {
// relative_tag_ts = ((relative_tag_ts - diff_ts) - (int)(relative_tag_ts - diff_ts)) * 1000000; //Truncates leading value, and converts to ns
relative_tag_ts = ((relative_tag_ts - diff_ts) - (int)(relative_tag_ts - diff_ts)) * 1000; //Truncates leading value, and converts to μs
// relative_tag_ts = (relative_tag_ts - diff_ts); //Account for offset from source clock in ms
TRACE("%02X:%.08f\r\n", ((cph_deca_msg_header_t*)rx_buffer)->seq, relative_tag_ts);
}
break;
case FUNC_CS_COORD:
break;
default:
break;
}
irq_status = STATUS_EMPTY;
dwt_rxenable(0);
} else if (irq_status == STATUS_ERR) {
// TRACE("INVALID LENGTH: %d\r\n", frame_len);
irq_status = STATUS_EMPTY;
dwt_rxenable(0);
}
}
}
void cph_deca_isr_disable(void) {
pio_disable_interrupt(DW_IRQ_PIO, DW_IRQ_MASK);
}
void listener_run(void) {
uint32_t announce_coord_ts = 0;
uint32_t elapsed = 0;
uint32_t last_ts = 0;
uint32_t count = 0;
irq_init();
pio_disable_interrupt(DW_IRQ_PIO, DW_IRQ_MASK);
// Setup DW1000
dwt_txconfig_t txconfig;
// Setup DECAWAVE
reset_DW1000();
spi_set_rate_low();
dwt_initialise(DWT_LOADUCODE);
spi_set_rate_high();
dwt_configure(&cph_config->dwt_config);
dwt_setpanid(0x4350);
dwt_setaddress16(0x1234);
// Clear CLKPLL_LL
dwt_write32bitreg(SYS_STATUS_ID, 0x02000000);
uint32_t id = dwt_readdevid();
printf("Device ID: %08X\r\n", id);
#if 1
dwt_setcallbacks(0, rxcallback);
dwt_setinterrupt(
DWT_INT_TFRS | DWT_INT_RFCG
| (DWT_INT_ARFE | DWT_INT_RFSL | DWT_INT_SFDT | DWT_INT_RPHE | DWT_INT_RFCE | DWT_INT_RFTO /*| DWT_INT_RXPTO*/),
1);
pio_enable_interrupt(DW_IRQ_PIO, DW_IRQ_MASK);
dwt_rxenable(0);
while (1) {
elapsed = cph_get_millis() - last_ts;
if (elapsed > 5000) {
printf("alive %d\r\n", count++);
last_ts = cph_get_millis();
}
if (trx_signal == SIGNAL_RCV) {
printf("[RCV] %d - ", frame_len);
for (int i = 0; i < frame_len; i++) {
printf("%02X ", rx_buffer[i]);
}
printf("\r\n");
trx_signal = SIGNAL_EMPTY;
dwt_rxenable(0);
}
else if(trx_signal == SIGNAL_ERR) {
printf("ERROR: %08X\r\n", error_status_reg);
trx_signal = SIGNAL_EMPTY;
dwt_rxenable(0);
}
else if(trx_signal == SIGNAL_ERR_LEN) {
printf("ERROR LENGTH: %08X\r\n", error_status_reg);
trx_signal = SIGNAL_EMPTY;
dwt_rxenable(0);
}
}
#else
while (1) {
/* Activate reception immediately. */
dwt_rxenable(0);
while (!((status_reg = dwt_read32bitreg(SYS_STATUS_ID)) & (SYS_STATUS_RXFCG | SYS_STATUS_ALL_RX_ERR))) {
};
if (status_reg & SYS_STATUS_RXFCG) {
uint32 frame_len;
dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_RXFCG);
frame_len = dwt_read32bitreg(RX_FINFO_ID) & RX_FINFO_RXFL_MASK_1023;
if (frame_len <= MAXRXSIXZE) {
dwt_readrxdata(rx_buffer, frame_len, 0);
} else {
frame_len = 0;
}
if (frame_len > 0) {
printf("[RCV] ");
for (int i = 0; i < frame_len; i++) {
printf("%02X ", rx_buffer[i]);
}
printf("\r\n");
} else {
printf("ERROR: frame_len == %d\r\n", frame_len);
}
} else {
printf("ERROR: dwt_rxenable has status of %08X\r\n", status_reg);
/* Clear RX error events in the DW1000 status register. */
dwt_write32bitreg(SYS_STATUS_ID, SYS_STATUS_ALL_RX_ERR | SYS_STATUS_CLKPLL_LL);
}
}
#endif
}
int main(void)
{
uint32_t i;
uint32_t ul_error;
volatile uint32_t *p_test_page_data;
uint32_t p_buffer[BUFFER_SIZE];
/* Initialize the system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Initialize flash: 6 wait states for flash writing. */
flash_init(FLASH_ACCESS_MODE_128, FLASH_WAIT_STATE_NBR);
/* Configure Push Button. */
configure_button();
/* Output example information. */
puts(STRING_HEADER);
puts("-I- Unlocking the whole flash.\r\n");
/* Unlock the whole flash. */
ul_error = flash_unlock(IFLASH_ADDR, (IFLASH_ADDR + IFLASH_SIZE - 1), 0, 0);
if (FLASH_RC_OK != ul_error) {
puts("Unlock internal flash failed.\r\n");
return 0;
}
/* Perform tests on the test page. */
p_test_page_data = (volatile uint32_t *)TEST_PAGE_ADDRESS;
/* Write page with walking bit pattern (0x00000001, 0x00000002, ...). */
puts("-I- Writing test page with walking bit pattern.\r\n");
for (i = 0; i < BUFFER_SIZE; i++) {
p_buffer[i] = 1 << (i % MAX_SHIFTING_NUMBER);
}
#if (SAM4E || SAM4C || SAMV71)
/**
* The EWP command can only be used in 8 KBytes sector for SAM4E,
* so an erase command is requried before write operation.
*/
ul_error = flash_erase_sector(TEST_PAGE_ADDRESS);
if (ul_error != FLASH_RC_OK) {
printf("-F- Flash erase error %u\n\r", ul_error);
return 0;
}
ul_error = flash_write(TEST_PAGE_ADDRESS, p_buffer,
IFLASH_PAGE_SIZE, 0);
#else
ul_error = flash_write(TEST_PAGE_ADDRESS, p_buffer,
IFLASH_PAGE_SIZE, 1);
#endif
if (FLASH_RC_OK != ul_error) {
puts("Write the test page of internal flash failed.\r\n");
return 0;
}
/* Check page contents. */
puts("-I- Checking page contents.\r\n");
for (i = 0; i < BUFFER_SIZE; i++) {
printf(".");
if (p_test_page_data[i] != (1u << (i % MAX_SHIFTING_NUMBER))) {
puts("The content in the test page isn't written correctly");
return 0;
}
}
puts(" OK! \r\n");
/* Configure Erase pin NOT in Erase mode. */
puts("-I- Configure Erase pin in PIO mode.\r\n");
matrix_set_system_io(PIN_PIO_MODE_MSK);
/**
* Ask the user to close the erase jumper and then open it(200ms minimum).
*/
printf("-I- Please close the erase jumper and then open it ");
printf("at least 200ms later.\r\n");
printf("Then press button %s to go on!\r\n", BUTTON_STRING);
/* Wait until Push Button is pressed. */
while (!g_button_event) {
}
/**
* Disable the PIO line interrupts to eliminate the wrong check of
* key press.
*/
pio_disable_interrupt(PUSH_BUTTON_PIO, PUSH_BUTTON_PIN_MSK);
g_button_event = 0;
/* Read the page again, it should be unchanged. */
puts("-I- Reading the page\r\n");
for (i = 0; i < BUFFER_SIZE; i++) {
printf(".");
if (p_test_page_data[i] != (1u << (i % MAX_SHIFTING_NUMBER))) {
puts("-F- Reading Error! \r\n");
return 0;
}
}
puts("\r\n");
puts("Read OK! Erase is out of function!\r\n");
/* Configure Erase pin as Erase function. */
puts("-I- Configure Erase pin as Erase function\r\n");
matrix_set_system_io(PIN_ERASE_MODE_MSK);
/**
* Ask the user to close the erase jumper and then open it(200ms minimum).
*/
printf("-I- Please close the erase jumper and then open it ");
printf("at least 200ms later.\r\n");
/**
* Remind the users that after closing the erase jumper and then opening
* it, codes are gone.
*/
printf("-I- As the internal flash has been erased and the code can't ");
printf("be executed any more, users can press the reset button on EK ");
printf("and will see there will be no output message any more.\r\n");
while (1) {
}
}
/**
* \brief pio_capture Application entry point.
*
* \return Unused (ANSI-C compatibility).
*
*/
int main(void)
{
uint8_t uc_i;
uint32_t ul_length;
uint32_t ul_mode;
uint8_t uc_key;
static uint8_t uc_rx_even_only;
static uint8_t uc_tx_without_en;
/* Initialize the SAM system. */
sysclk_init();
board_init();
/* Configure UART for debug message output. */
configure_console();
/* Configure PIOA clock. */
pmc_enable_periph_clk(ID_PIOA);
pmc_enable_periph_clk(ID_PIOC);
/* Configure PIO Capture handler */
pio_capture_handler_set(capture_handler);
/* Output example information. */
puts(STRING_HEADER);
printf("Frequency: %d MHz.\r\n",
(uint8_t) (sysclk_get_cpu_hz() / 1000000));
printf("Press r to Receive data on PIO Parallel Capture.\r\n");
printf("Press s to Send data on PIO Parallel Capture.\r\n");
uc_key = 0;
while ((uc_key != 'r') && (uc_key != 's')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'r') {
printf("** RECEIVE mode **\r\n");
/* Initialize PIO capture mode value. */
ul_mode = 0;
/* Set up the parallel capture mode data size as 8 bits. */
ul_mode |= 0 << PIO_PCMR_DSIZE_Pos;
printf("Press y to sample the data when both data enable pins are enabled.\r\n");
printf("Press n to sample the data, don't care the status of the data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample the data when both data enable pins are enabled. */
ul_mode &= ~PIO_PCMR_ALWYS;
printf("Receive data when both data enable pins are enabled.\r\n");
} else {
/* Sample the data, don't care the status of the data enable pins. */
ul_mode |= PIO_PCMR_ALWYS;
printf("Receive data, don't care the status of the data enable pins.\r\n");
}
printf("Press y to sample all the data\r\n");
printf("Press n to sample the data only one out of two.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
/* Sample all the data. */
ul_mode &= ~PIO_PCMR_HALFS;
printf("All data are sampled.\r\n");
} else {
/* Sample the data only one out of two. */
ul_mode |= PIO_PCMR_HALFS;
/* Only if half-Sampling is set, data with an even index are sampled. */
ul_mode &= ~PIO_PCMR_FRSTS;
printf("Only one out of two data is sampled, with an even index.\r\n");
}
/* Initialize PIO Parallel Capture function. */
pio_capture_set_mode(PIOA, ul_mode);
pio_capture_enable(PIOA);
/* Disable all PIOA I/O line interrupt. */
pio_disable_interrupt(PIOA, 0xFFFFFFFF);
/* Configure and enable interrupt of PIO. */
NVIC_DisableIRQ(PIOA_IRQn);
NVIC_ClearPendingIRQ(PIOA_IRQn);
NVIC_SetPriority(PIOA_IRQn, PIO_IRQ_PRI);
NVIC_EnableIRQ(PIOA_IRQn);
while (1) {
g_uc_cbk_received = 0;
/* Clear Receive buffer. */
for (uc_i = 0; uc_i < SIZE_BUFF_RECEPT; uc_i++) {
pio_rx_buffer[uc_i] = 0;
}
/* Set up PDC receive buffer, waiting for 64 bytes. */
packet_t.ul_addr = (uint32_t) pio_rx_buffer;
packet_t.ul_size = SIZE_BUFF_RECEPT;
p_pdc = pio_capture_get_pdc_base(PIOA);
pdc_rx_init(p_pdc, &packet_t, NULL);
/* Enable PDC transfer. */
pdc_enable_transfer(p_pdc, PERIPH_PTCR_RXTEN);
/* Configure the PIO capture interrupt mask. */
pio_capture_enable_interrupt(PIOA,
(PIO_PCIER_ENDRX | PIO_PCIER_RXBUFF));
printf("Waiting...\r\n");
while (g_uc_cbk_received == 0) {
}
}
} else if (uc_key == 's') {
printf("** SEND mode **\r\n");
printf("This is for debug purpose only !\r\n");
printf("Frequency of PIO controller clock must be strictly superior");
printf("to 2 times the frequency of the clock of the device which");
printf(" generates the parallel data.\r\n");
printf("\r\nPlease connect the second board, ");
printf("and put it in receive mode.\r\n");
/* Configure PIO pins which simulate as a sensor. */
pio_configure_pin_group(PIOA, PIO_CAPTURE_CONTROL_PIN_MSK,
PIO_CAPTURE_OUTPUT_PIN_FLAGS);
pio_configure_pin_group(PIOC, PIO_CAPTURE_DATA_PINS_MASK,
PIO_CAPTURE_OUTPUT_PIN_FLAGS);
pio_set_pin_low(PIO_CAPTURE_EN1_IDX);
pio_set_pin_low(PIO_CAPTURE_EN2_IDX);
pio_set_pin_low(PIO_CAPTURE_CCLK_IDX);
/* Enable sync. output data. */
pio_enable_output_write(PIOC, PIO_CAPTURE_DATA_PINS_MASK);
/* Initialize the capture data line. */
pio_sync_output_write(PIOC, 0);
printf("Press y to send data with data enable pins.\r\n");
printf("Press n to send data without data enable pins.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
uc_tx_without_en = 0;
printf("Send data with both data enable pins enabled.\r\n");
} else {
uc_tx_without_en = 1;
printf("Send data without enabling the data enable pins.\r\n");
}
printf("Press y to indicate that receiver samples all data.\r\n");
printf("Press n to indicate that receiver samples data with an even index.\r\n");
uc_key = 0;
while ((uc_key != 'y') && (uc_key != 'n')) {
uart_read(CONSOLE_UART, &uc_key);
}
if (uc_key == 'y') {
uc_rx_even_only = 0;
printf("Receiver samples all data.\r\n");
} else {
uc_rx_even_only = 1;
printf("Receiver samples data with an even index.\r\n");
}
ul_length = SIZE_BUFF_RECEPT * (1 + uc_rx_even_only);
while (1) {
if (uc_tx_without_en) {
printf("\r\nSend data without enabling the data enable pins.\r\n");
} else {
printf("\r\nSend data with both data enable pins enabled.\r\n");
}
if (!uc_tx_without_en) {
/* Set enable pins. */
pio_set_pin_high(PIO_CAPTURE_EN1_IDX);
pio_set_pin_high(PIO_CAPTURE_EN2_IDX);
}
for (uc_i = 0; uc_i < ul_length;) {
/* Send data. */
pio_sync_output_write(PIOC,
(uc_i << PIO_CAPTURE_DATA_POS));
/* Set clock. */
pio_set_pin_high(PIO_CAPTURE_CCLK_IDX);
delay_us(20);
/* Clear clock. */
pio_set_pin_low(PIO_CAPTURE_CCLK_IDX);
delay_us(20);
uc_i++;
}
if (!uc_tx_without_en) {
/* Clear enable pins. */
pio_set_pin_low(PIO_CAPTURE_EN1_IDX);
pio_set_pin_low(PIO_CAPTURE_EN2_IDX);
}
printf("Press a key.\r\n");
while (uart_read(CONSOLE_UART, &uc_key)) {
}
}
}
return 0;
}
/**
* \brief
*
* \param
*
* \return void
*/
void Mifi_DisableInt(void)
{
/* Enable PIO line interrupts. */
pio_disable_interrupt(CC1101_GPIO0_PIO, CC1101_GPIO0);
}
