C++ (Cpp) plat_cci_disable Examples

Example #1

File: plat_pm.c Project: ajs-sun/arm-trusted-firmware

/*******************************************************************************
 * RockChip handler called when a power domain is about to be suspended. The
 * target_state encodes the power state that each level should transition to.
 ******************************************************************************/
void rockchip_pwr_domain_suspend(const psci_power_state_t *target_state)
{
	uint32_t lvl;
	plat_local_state_t lvl_state;
	int ret;

	if (RK_CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE)
		return;

	if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
		rockchip_soc_sys_pwr_dm_suspend();
	else
		rockchip_soc_cores_pwr_dm_suspend();

	/* Prevent interrupts from spuriously waking up this cpu */
	plat_rockchip_gic_cpuif_disable();

	/* Perform the common cluster specific operations */
	if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
		plat_cci_disable();

	if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
		return;

	for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
		lvl_state = target_state->pwr_domain_state[lvl];
		ret = rockchip_soc_hlvl_pwr_dm_suspend(lvl, lvl_state);
		if (ret == PSCI_E_NOT_SUPPORTED)
			break;
	}
}

Example #2

File: plat_pm.c Project: apritzel/arm-trusted-firmware

/*******************************************************************************
 * RockChip handler called when a power domain is about to be suspended. The
 * target_state encodes the power state that each level should transition to.
 ******************************************************************************/
void rockchip_pwr_domain_suspend(const psci_power_state_t *target_state)
{
    uint32_t lvl;
    plat_local_state_t lvl_state;

    if (RK_CORE_PWR_STATE(target_state) != PLAT_MAX_OFF_STATE)
        return;

    if (rockchip_ops) {
        if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE &&
                rockchip_ops->sys_pwr_dm_suspend) {
            rockchip_ops->sys_pwr_dm_suspend();
        } else if (rockchip_ops->cores_pwr_dm_suspend) {
            rockchip_ops->cores_pwr_dm_suspend();
        }
    }

    /* Prevent interrupts from spuriously waking up this cpu */
    plat_rockchip_gic_cpuif_disable();

    /* Perform the common cluster specific operations */
    if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
        plat_cci_disable();

    if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
        return;

    if (!rockchip_ops || !rockchip_ops->hlvl_pwr_dm_suspend)
        return;

    for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
        lvl_state = target_state->pwr_domain_state[lvl];
        rockchip_ops->hlvl_pwr_dm_suspend(lvl, lvl_state);
    }
}

Example #3

File: plat_pm.c Project: apritzel/arm-trusted-firmware

/*******************************************************************************
 * RockChip handler called when a power domain is about to be turned off. The
 * target_state encodes the power state that each level should transition to.
 ******************************************************************************/
void rockchip_pwr_domain_off(const psci_power_state_t *target_state)
{
    uint32_t lvl;
    plat_local_state_t lvl_state;

    assert(RK_CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE);

    plat_rockchip_gic_cpuif_disable();

    if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
        plat_cci_disable();

    if (!rockchip_ops || !rockchip_ops->cores_pwr_dm_off)
        return;

    rockchip_ops->cores_pwr_dm_off();

    if (!rockchip_ops->hlvl_pwr_dm_off)
        return;

    for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
        lvl_state = target_state->pwr_domain_state[lvl];
        rockchip_ops->hlvl_pwr_dm_off(lvl, lvl_state);
    }
}

Example #4

File: plat_pm.c Project: ajs-sun/arm-trusted-firmware

/*******************************************************************************
 * RockChip handler called when a power domain is about to be turned off. The
 * target_state encodes the power state that each level should transition to.
 ******************************************************************************/
void rockchip_pwr_domain_off(const psci_power_state_t *target_state)
{
	uint32_t lvl;
	plat_local_state_t lvl_state;
	int ret;

	assert(RK_CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE);

	plat_rockchip_gic_cpuif_disable();

	if (RK_CLUSTER_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE)
		plat_cci_disable();

	rockchip_soc_cores_pwr_dm_off();

	for (lvl = MPIDR_AFFLVL1; lvl <= PLAT_MAX_PWR_LVL; lvl++) {
		lvl_state = target_state->pwr_domain_state[lvl];
		ret = rockchip_soc_hlvl_pwr_dm_off(lvl, lvl_state);
		if (ret == PSCI_E_NOT_SUPPORTED)
			break;
	}
}