C++ (Cpp) platform_powersave_enable_wakeup_pin Examples

Example #1

File: wwd_SDIO.c Project: 119/bcm-wiced-sdk

wwd_result_t host_enable_oob_interrupt( void )
{
    /* Enable OOB interrupt */
    platform_gpio_irq_enable( &wifi_sdio_pins[WWD_PIN_SDIO_OOB_IRQ], IOPORT_SENSE_RISING, sdio_oob_irq_handler, NULL);

    if( wifi_sdio_pins[WWD_PIN_SDIO_OOB_IRQ].wakeup_pin_config != NULL )
    {
        platform_powersave_enable_wakeup_pin( wifi_sdio_pins[WWD_PIN_SDIO_OOB_IRQ].wakeup_pin_config );
    }


    return WICED_SUCCESS;
}

Example #2

File: platform_gpio.c Project: HargicStudio/SmartCup_MiCOKit_v2.4.0.0

OSStatus platform_gpio_irq_enable( const platform_gpio_t* gpio, platform_gpio_irq_trigger_t trigger, platform_gpio_irq_callback_t handler, void* arg )
{
  ioport_port_mask_t  mask                = ioport_pin_to_mask( gpio->pin );
  ioport_port_t       port                = ioport_pin_to_port_id( gpio->pin );
  volatile Pio*       port_register       = arch_ioport_port_to_base( port );
  uint8_t             pin_number          = (gpio->pin) & 0x1F;
  uint32_t            temp;
  uint8_t             samg5x_irq_trigger;
  OSStatus            err                 = kNoErr;
    
  platform_mcu_powersave_disable();
  require_action_quiet( gpio != NULL, exit, err = kParamErr);

  NVIC_DisableIRQ( irq_vectors[port] );
  NVIC_ClearPendingIRQ( irq_vectors[port] );

  gpio_irq_data[port][pin_number].wakeup_pin = gpio->is_wakeup_pin;
  gpio_irq_data[port][pin_number].arg        = arg;
  gpio_irq_data[port][pin_number].callback   = handler;

  switch ( trigger )
  {
    case IRQ_TRIGGER_RISING_EDGE:  samg5x_irq_trigger = IOPORT_SENSE_RISING;    break;
    case IRQ_TRIGGER_FALLING_EDGE: samg5x_irq_trigger = IOPORT_SENSE_FALLING;   break;
    case IRQ_TRIGGER_BOTH_EDGES:   samg5x_irq_trigger = IOPORT_SENSE_BOTHEDGES; break;
    default:
      err = kParamErr;
      goto exit;
  }

  if( gpio->is_wakeup_pin == true )
  {
    platform_powersave_enable_wakeup_pin( gpio );
  }

  if ( samg5x_irq_trigger == IOPORT_SENSE_RISING || samg5x_irq_trigger == IOPORT_SENSE_BOTHEDGES )
  {
   port_register->PIO_AIMER  |= mask;
   port_register->PIO_ESR    |= mask;
   port_register->PIO_REHLSR |= mask;
  }

  if ( samg5x_irq_trigger == IOPORT_SENSE_FALLING || samg5x_irq_trigger == IOPORT_SENSE_BOTHEDGES )
  {
    port_register->PIO_AIMER  |= mask;
    port_register->PIO_ESR    |= mask;
    port_register->PIO_FELLSR |= mask;
  }

  /* Read ISR to clear residual interrupt status */
  temp = port_register->PIO_ISR;
  UNUSED_PARAMETER( temp );

  /* Enable interrupt source */
  port_register->PIO_IER |= mask;

  NVIC_EnableIRQ( irq_vectors[port] );
  
exit:
  platform_mcu_powersave_enable();
  return err;
}