static void
consinit_com(const char *consdev)
{
static const bus_addr_t comcnaddrs[] = {
IYONIX_UART1, /* com0 */
};
/*
* Console devices are mapped VA==PA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(iyonix_devmap);
/* When we support more than the first serial port as console,
* we should check consdev for a number.
*/
#if NCOM > 0
if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
{
panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
}
#else
panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
#endif
#if KGDB
#if NCOM > 0
if (strcmp(kgdb_devname, "com") == 0) {
com_kgdb_attach(&obio_bs_tag, kgdb_devaddr, kgdb_devrate,
COM_FREQ, COM_TYPE_NORMAL, kgdb_devmode);
}
#endif /* NCOM > 0 */
#endif /* KGDB */
}
void
consinit(void)
{
static const bus_addr_t comcnaddrs[] = {
BRH_UART1_BASE, /* com0 */
BRH_UART2_BASE, /* com1 */
};
static int consinit_called;
if (consinit_called != 0)
return;
consinit_called = 1;
/*
* brh_start() has mapped the console devices for us per
* the devmap, so register it now so drivers can map the
* console device.
*/
pmap_devmap_register(brh_devmap);
#if NCOM > 0
if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
BECC_PERIPH_CLOCK, COM_TYPE_NORMAL, comcnmode))
panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
#else
panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
#endif
}
void
consinit(void)
{
static const bus_addr_t comcnaddrs[] = {
HDLG_UART1, /* com0 */
};
static int consinit_called;
if (consinit_called)
return;
consinit_called = 1;
/*
* Console devices are mapped VA==PA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(hdlg_devmap);
#if NCOM > 0
if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
#else
panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
#endif
#if KGDB
#if NCOM > 0
if (strcmp(kgdb_devname, "com") == 0) {
com_kgdb_attach(&obio_bs_tag, kgdb_devaddr, kgdb_devrate,
COM_FREQ, COM_TYPE_NORMAL, kgdb_devmode);
}
#endif /* NCOM > 0 */
#endif /* KGDB */
}
void
consinit(void)
{
static const bus_addr_t comcnaddrs[] = {
IQ80310_UART2, /* com0 (J9) */
IQ80310_UART1, /* com1 (J10) */
};
static int consinit_called;
if (consinit_called != 0)
return;
consinit_called = 1;
/*
* Console devices are mapped VA==PA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(iq80310_devmap);
#if NCOM > 0
if (comcnattach(&obio_bs_tag, comcnaddrs[comcnunit], comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
panic("can't init serial console @%lx", comcnaddrs[comcnunit]);
#else
panic("serial console @%lx not configured", comcnaddrs[comcnunit]);
#endif
}
void
consinit(void)
{
static const bus_addr_t comcnaddrs[] = {
IQ80321_UART1 /* com0 */
};
static int consinit_called;
if (consinit_called != 0)
return;
consinit_called = 1;
/*
* Console devices are mapped VA==PA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(iq80321_devmap);
#if NCOM > 0
if (comcnattach(&obio_bs_tag, comcnaddrs[0], comcnspeed,
COM_FREQ, comcnmode))
panic("can't init serial console @%lx", comcnaddrs[0]);
comdefaultrate = comcnspeed;
#else
panic("serial console @%lx not configured", comcnaddrs[0]);
#endif
}
void
consinit(void)
{
static int consinit_called;
bus_space_handle_t ioh;
if (consinit_called != 0)
return;
consinit_called = 1;
/*
* Console devices are already mapped in VA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(tsarm_devmap);
#if 0
isa_tsarm_init(TS7XXX_IO16_VBASE + TS7XXX_ISAIO,
TS7XXX_IO16_VBASE + TS7XXX_ISAMEM);
if (comcnattach(&isa_io_bs_tag, 0x3e8, comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
{
panic("can't init serial console");
}
#endif
#if NEPCOM > 0
bus_space_map(&ep93xx_bs_tag, EP93XX_APB_HWBASE + EP93XX_APB_UART1,
EP93XX_APB_UART_SIZE, 0, &ioh);
if (epcomcnattach(&ep93xx_bs_tag, EP93XX_APB_HWBASE + EP93XX_APB_UART1,
ioh, comcnspeed, comcnmode))
{
panic("can't init serial console");
}
#else
panic("serial console not configured");
#endif
#if KGDB
#if NEPCOM > 0
if (strcmp(kgdb_devname, "epcom") == 0) {
com_kgdb_attach(&ep93xx_bs_tag, kgdb_devaddr, kgdb_devrate,
kgdb_devmode);
}
#endif /* NEPCOM > 0 */
#endif /* KGDB */
}
u_int
initarm(void *arg)
{
#ifdef MEMSIZE
psize_t memsize = (unsigned) MEMSIZE * 1024 * 1024;
#else
/* If MEMSIZE is not defined, use QEMU's default value (128 MB) */
psize_t memsize = (unsigned) 128 * 1024 * 1024;
#endif
pmap_devmap_register(vexpress_devmap);
set_cpufuncs();
consinit();
/* Talk to the user */
#define BDSTR(s) _BDSTR(s)
#define _BDSTR(s) #s
printf("\nNetBSD/evbarm (" BDSTR(EVBARM_BOARDTYPE) ") booting ...\n");
#ifdef VERBOSE_INIT_ARM
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = KERN_VTOPHYS(KERNEL_BASE);
bootconfig.dram[0].pages = memsize / PAGE_SIZE;
arm32_bootmem_init(bootconfig.dram[0].address, memsize,
(uintptr_t) KERNEL_BASE_phys);
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, vexpress_devmap,
true);
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
cortex_pmc_ccnt_init();
/* We've a specific device_register routine */
evbarm_device_register = vexpress_device_register;
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
}
void
consinit(void)
{
static int consinit_called = 0;
if (consinit_called != 0)
return;
consinit_called = 1;
pmap_devmap_register(ixm1200_devmap);
if (ixpcomcnattach(&ixp12x0_bs_tag,
IXPCOM_UART_HWBASE, IXPCOM_UART_VBASE,
CONSPEED, CONMODE))
panic("can't init serial console @%lx", IXPCOM_UART_HWBASE);
}
/*
* consinit
*/
void
consinit(void)
{
static int consinit_called;
static const bus_addr_t addrs[2] = {
IXP425_UART0_HWBASE, IXP425_UART1_HWBASE
};
if (consinit_called != 0)
return;
consinit_called = 1;
pmap_devmap_register(ixp425_devmap);
if (comcnattach(&ixp425_a4x_bs_tag, addrs[comcnunit],
comcnspeed, IXP425_UART_FREQ, COM_TYPE_PXA2x0, comcnmode))
panic("can't init serial console (UART%d)", comcnunit);
}
void
consinit(void)
{
static int consinit_called;
#if NEPCOM > 0
bus_space_handle_t ioh;
#endif
if (consinit_called != 0)
return;
consinit_called = 1;
/*
* Console devices are already mapped in VA. Our devmap reflects
* this, so register it now so drivers can map the console
* device.
*/
pmap_devmap_register(armadillo9_devmap);
#if NEPCOM > 0
bus_space_map(&ep93xx_bs_tag, EP93XX_APB_HWBASE + comaddr[CONUNIT],
EP93XX_APB_UART_SIZE, 0, &ioh);
if (epcomcnattach(&ep93xx_bs_tag, EP93XX_APB_HWBASE + comaddr[CONUNIT],
ioh, comcnspeed, comcnmode))
{
panic("can't init serial console");
}
#else
panic("serial console not configured");
#endif
#if KGDB
#if NEPCOM > 0
if (strcmp(kgdb_devname, "epcom") == 0) {
com_kgdb_attach(&ep93xx_bs_tag, kgdb_devaddr, kgdb_devrate,
kgdb_devmode);
}
#endif /* NEPCOM > 0 */
#endif /* KGDB */
}
void
consinit(void)
{
static int consinit_done = 0;
bus_space_tag_t iot = &s3c2xx0_bs_tag;
int pclk;
if (consinit_done != 0)
return;
consinit_done = 1;
pmap_devmap_register(smdk2800_devmap);
s3c2800_clock_freq2(ioreg_vaddr(S3C2800_CLKMAN_BASE), NULL, NULL, &pclk);
#if NSSCOM > 0
#ifdef SSCOM0CONSOLE
if (0 == s3c2800_sscom_cnattach(iot, 0, comcnspeed,
pclk, comcnmode))
return;
#endif
#ifdef SSCOM1CONSOLE
if (0 == s3c2800_sscom_cnattach(iot, 1, comcnspeed,
pclk, comcnmode))
return;
#endif
#endif /* NSSCOM */
#if NCOM>0 && defined(CONCOMADDR)
if (comcnattach(&isa_io_bs_tag, CONCOMADDR, comcnspeed,
COM_FREQ, COM_TYPE_NORMAL, comcnmode))
panic("can't init serial console @%x", CONCOMADDR);
return;
#endif
consinit_done = 0;
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
pmap_devmap_register(devmap);
awin_bootstrap(AWIN_CORE_VBASE, CONADDR_VA);
/* Heads up ... Setup the CPU / MMU / TLB functions. */
if (set_cpufuncs())
panic("cpu not recognized!");
/* The console is going to try to map things. Give pmap a devmap. */
consinit();
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#x, %#x, %#x, %#x\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
#endif
#ifdef KGDB
kgdb_port_init();
#endif
cpu_reset_address = awin_wdog_reset;
#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
printf("\nNetBSD/evbarm (cubie) booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) || defined(CPU_CORTEXA15)
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
#endif
/*
* Set up the variables that define the availability of physical
* memory.
*/
psize_t ram_size = awin_memprobe();
/*
* If MEMSIZE specified less than what we really have, limit ourselves
* to that.
*/
#ifdef MEMSIZE
if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
ram_size = (unsigned)MEMSIZE * 1024 * 1024;
#else
KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
#endif
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = AWIN_SDRAM_PBASE;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
KASSERT(ram_size <= KERNEL_VM_BASE - KERNEL_BASE);
#else
const bool mapallmem_p = false;
#endif
KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
KERNEL_BASE_PHYS);
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
mapallmem_p);
if (mapallmem_p) {
/*
* "bootargs" env variable is passed as 4th argument
* to kernel but it's using the physical address and
* we to convert that to a virtual address.
*/
if (uboot_args[3] - AWIN_SDRAM_PBASE < ram_size) {
const char * const args = (const char *)
(uboot_args[3] + KERNEL_PHYS_VOFFSET);
strlcpy(bootargs, args, sizeof(bootargs));
}
}
boot_args = bootargs;
parse_mi_bootargs(boot_args);
/* we've a specific device_register routine */
evbarm_device_register = cubie_device_register;
#if NAWIN_FB > 0
char *ptr;
if (get_bootconf_option(boot_args, "console",
BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
use_fb_console = true;
}
#endif
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
/*
* Heads up ... Setup the CPU / MMU / TLB functions
*/
if (set_cpufuncs())
panic("cpu not recognized!");
/* map some peripheral registers */
pmap_devmap_bootstrap((vaddr_t)armreg_ttbr_read() & -L1_TABLE_SIZE,
netwalker_devmap);
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
/* Register devmap for devices we mapped in start */
pmap_devmap_register(netwalker_devmap);
setup_ioports();
consinit();
#ifdef NO_POWERSAVE
cpu_do_powersave=0;
#endif
init_clocks();
#ifdef KGDB
kgdb_port_init();
#endif
/* Talk to the user */
printf("\nNetBSD/evbarm (" ___STRING(EVBARM_BOARDTYPE) ") booting ...\n");
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
bootargs[0] = '\0';
#if defined(VERBOSE_INIT_ARM) || 1
printf("initarm: Configuring system");
printf(", CLIDR=%010o CTR=%#x",
armreg_clidr_read(), armreg_ctr_read());
printf("\n");
#endif
/*
* Ok we have the following memory map
*
* Physical Address Range Description
* ----------------------- ----------------------------------
*
* 0x90000000 - 0xAFFFFFFF DDR SDRAM (512MByte)
*
* The initarm() has the responsibility for creating the kernel
* page tables.
* It must also set up various memory pointers that are used
* by pmap etc.
*/
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
/* Fake bootconfig structure for the benefit of pmap.c */
/* XXX must make the memory description h/w independent */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = MEMSTART;
bootconfig.dram[0].pages = (MEMSIZE * 1024 * 1024) / PAGE_SIZE;
psize_t ram_size = bootconfig.dram[0].pages * PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
printf("%s: dropping RAM size from %luMB to %uMB\n",
__func__, (unsigned long) (ram_size >> 20),
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
}
u_int
initarm(void *arg)
{
const struct pmap_devmap const *devmap;
bus_addr_t rambase;
const psize_t ram_reserve = 0x200000;
psize_t ram_size;
/* allocate/map our basic memory mapping */
switch (EXYNOS_PRODUCT_FAMILY(exynos_soc_id)) {
#if defined(EXYNOS4)
case EXYNOS4_PRODUCT_FAMILY:
devmap = e4_devmap;
rambase = EXYNOS4_SDRAM_PBASE;
break;
#endif
#if defined(EXYNOS5)
case EXYNOS5_PRODUCT_FAMILY:
devmap = e5_devmap;
rambase = EXYNOS5_SDRAM_PBASE;
break;
#endif
default:
/* Won't work, but... */
panic("Unknown product family %llx",
EXYNOS_PRODUCT_FAMILY(exynos_soc_id));
}
pmap_devmap_register(devmap);
/* bootstrap soc. uart_address is determined in odroid_start */
paddr_t uart_address = armreg_tpidruro_read();
exynos_bootstrap(EXYNOS_CORE_VBASE, EXYNOS_IOPHYSTOVIRT(uart_address));
/* set up CPU / MMU / TLB functions */
if (set_cpufuncs())
panic("cpu not recognized!");
/* get normal console working */
consinit();
#ifdef KGDB
kgdb_port_init();
#endif
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
printf("Exynos SoC ID %08x\n", exynos_soc_id);
printf("initarm: cbar=%#x\n", armreg_cbar_read());
#endif
/* determine cpu0 clock rate */
exynos_clocks_bootstrap();
#ifdef VERBOSE_INIT_ARM
printf("CPU0 now running on %"PRIu64" Mhz\n", exynos_get_cpufreq()/(1000*1000));
#endif
#if NARML2CC > 0
if (CPU_ID_CORTEX_A9_P(curcpu()->ci_arm_cpuid)) {
/* probe and enable the PL310 L2CC */
const bus_space_handle_t pl310_bh =
EXYNOS_IOPHYSTOVIRT(armreg_cbar_read());
#ifdef ARM_TRUSTZONE_FIRMWARE
exynos4_l2cc_init();
#endif
arml2cc_init(&exynos_bs_tag, pl310_bh, 0x2000);
}
#endif
cpu_reset_address = exynos_wdt_reset;
#ifdef VERBOSE_INIT_ARM
printf("\nNetBSD/evbarm (odroid) booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
boot_args = bootargs;
parse_mi_bootargs(boot_args);
exynos_extract_mac_adress();
/*
* Determine physical memory by looking at the PoP package. This PoP
* package ID seems to be only available on Exynos4
*
* First assume the default 2Gb of memory, dictated by mapping too
*/
ram_size = (psize_t) 0xC0000000 - 0x40000000;
#if defined(EXYNOS4)
switch (exynos_pop_id) {
case EXYNOS_PACKAGE_ID_2_GIG:
KASSERT(ram_size <= 2UL*1024*1024*1024);
break;
default:
printf("Unknown PoP package id 0x%08x, assuming 1Gb\n",
exynos_pop_id);
ram_size = (psize_t) 0x10000000;
}
#endif
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = rambase;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
#ifndef PMAP_NEED_ALLOC_POOLPAGE
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
printf("%s: dropping RAM size from %luMB to %uMB\n",
__func__, (unsigned long) (ram_size >> 20),
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
extern vaddr_t xscale_cache_clean_addr;
int loop;
int loop1;
u_int l1pagetable;
#ifdef DIAGNOSTIC
extern vsize_t xscale_minidata_clean_size; /* used in KASSERT */
#endif
/* Register devmap for devices we mapped in start */
pmap_devmap_register(viper_devmap);
/* start 32.768 kHz OSC */
ioreg_write(VIPER_CLKMAN_VBASE + 0x08, 2);
/* Get ready for splfoo() */
pxa2x0_intr_bootstrap(VIPER_INTCTL_VBASE);
/*
* Heads up ... Setup the CPU / MMU / TLB functions
*/
if (set_cpufuncs())
panic("cpu not recognized!");
#if 0
/* Calibrate the delay loop. */
#endif
/* setup GPIO for BTUART, in case bootloader doesn't take care of it */
pxa2x0_gpio_bootstrap(VIPER_GPIO_VBASE);
pxa2x0_gpio_config(viper_gpioconf);
/* turn on clock to UART block.
XXX: this should not be done here. */
ioreg_write(VIPER_CLKMAN_VBASE+CLKMAN_CKEN, CKEN_FFUART|CKEN_BTUART |
ioreg_read(VIPER_CLKMAN_VBASE+CLKMAN_CKEN));
consinit();
#ifdef KGDB
kgdb_port_init();
#endif
/* Talk to the user */
printf("\nNetBSD/evbarm (viper) booting ...\n");
#if 0
/*
* Examine the boot args string for options we need to know about
* now.
*/
process_kernel_args((char *)nwbootinfo.bt_args);
#endif
printf("initarm: Configuring system ...\n");
/* Fake bootconfig structure for the benefit of pmap.c */
/* XXX must make the memory description h/w independent */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = MEMSTART;
bootconfig.dram[0].pages = MEMSIZE / PAGE_SIZE;
/*
* Set up the variables that define the availablilty of
* physical memory. For now, we're going to set
* physical_freestart to 0xa0200000 (where the kernel
* was loaded), and allocate the memory we need downwards.
* If we get too close to the page tables that RedBoot
* set up, we will panic. We will update physical_freestart
* and physical_freeend later to reflect what pmap_bootstrap()
* wants to see.
*
* XXX pmap_bootstrap() needs an enema.
* (now that would be truly hardcore XXX)
*/
physical_start = bootconfig.dram[0].address;
physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
physical_freestart = 0xa0009000UL;
physical_freeend = 0xa0200000UL;
physmem = (physical_end - physical_start) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
/* Tell the user about the memory */
printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
physical_start, physical_end - 1);
#endif
/*
* Okay, the kernel starts 2MB in from the bottom of physical
* memory. We are going to allocate our bootstrap pages downwards
* from there.
*
* We need to allocate some fixed page tables to get the kernel
* going. We allocate one page directory and a number of page
* tables and store the physical addresses in the kernel_pt_table
* array.
*
* The kernel page directory must be on a 16K boundary. The page
* tables must be on 4K boundaries. What we do is allocate the
* page directory on the first 16K boundary that we encounter, and
* the page tables on 4K boundaries otherwise. Since we allocate
* at least 3 L2 page tables, we are guaranteed to encounter at
* least one 16K aligned region.
*/
#ifdef VERBOSE_INIT_ARM
printf("Allocating page tables\n");
#endif
free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
physical_freestart, free_pages, free_pages);
#endif
/* Define a macro to simplify memory allocation */
#define valloc_pages(var, np) \
alloc_pages((var).pv_pa, (np)); \
(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
#define alloc_pages(var, np) \
physical_freeend -= ((np) * PAGE_SIZE); \
if (physical_freeend < physical_freestart) \
panic("initarm: out of memory"); \
(var) = physical_freeend; \
free_pages -= (np); \
memset((char *)(var), 0, ((np) * PAGE_SIZE));
loop1 = 0;
for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
/* Are we 16KB aligned for an L1 ? */
if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
&& kernel_l1pt.pv_pa == 0) {
valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
} else {
valloc_pages(kernel_pt_table[loop1],
L2_TABLE_SIZE / PAGE_SIZE);
++loop1;
}
}
/* This should never be able to happen but better confirm that. */
if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
panic("initarm: Failed to align the kernel page directory");
/*
* Allocate a page for the system page mapped to V0x00000000
* This page will just contain the system vectors and can be
* shared by all processes.
*/
alloc_pages(systempage.pv_pa, 1);
/* Allocate stacks for all modes */
valloc_pages(irqstack, IRQ_STACK_SIZE);
valloc_pages(abtstack, ABT_STACK_SIZE);
valloc_pages(undstack, UND_STACK_SIZE);
valloc_pages(kernelstack, UPAGES);
/* Allocate enough pages for cleaning the Mini-Data cache. */
KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
valloc_pages(minidataclean, 1);
#ifdef VERBOSE_INIT_ARM
printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
irqstack.pv_va);
printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
abtstack.pv_va);
printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
undstack.pv_va);
printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
kernelstack.pv_va);
#endif
/*
* XXX Defer this to later so that we can reclaim the memory
* XXX used by the RedBoot page tables.
*/
alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
/*
* Ok we have allocated physical pages for the primary kernel
* page tables
*/
#ifdef VERBOSE_INIT_ARM
printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
#endif
/*
* Now we start construction of the L1 page table
* We start by mapping the L2 page tables into the L1.
* This means that we can replace L1 mappings later on if necessary
*/
l1pagetable = kernel_l1pt.pv_pa;
/* Map the L2 pages tables in the L1 page table */
pmap_link_l2pt(l1pagetable, 0x00000000,
&kernel_pt_table[KERNEL_PT_SYS]);
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_KERNEL + loop]);
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
/* update the top of the kernel VM */
pmap_curmaxkvaddr =
KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
#ifdef VERBOSE_INIT_ARM
printf("Mapping kernel\n");
#endif
/* Now we fill in the L2 pagetable for the kernel static code/data */
{
extern char etext[], _end[];
size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
u_int logical;
textsize = (textsize + PGOFSET) & ~PGOFSET;
totalsize = (totalsize + PGOFSET) & ~PGOFSET;
logical = 0x00200000; /* offset of kernel in RAM */
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
physical_start + logical, totalsize - textsize,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
}
#ifdef VERBOSE_INIT_ARM
printf("Constructing L2 page tables\n");
#endif
/* Map the stack pages */
pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
UPAGES * PAGE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_CACHE);
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
L1_TABLE_SIZE, VM_PROT_READ | VM_PROT_WRITE, PTE_PAGETABLE);
for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
}
/* Map the Mini-Data cache clean area. */
xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
minidataclean.pv_pa);
/* Map the vector page. */
#if 1
/* MULTI-ICE requires that page 0 is NC/NB so that it can download the
* cache-clean code there. */
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
#else
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
#endif
/*
* map integrated peripherals at same address in l1pagetable
* so that we can continue to use console.
*/
pmap_devmap_bootstrap(l1pagetable, viper_devmap);
/*
* Give the XScale global cache clean code an appropriately
* sized chunk of unmapped VA space starting at 0xff000000
* (our device mappings end before this address).
*/
xscale_cache_clean_addr = 0xff000000U;
/*
* Now we have the real page tables in place so we can switch to them.
* Once this is done we will be running with the REAL kernel page
* tables.
*/
/*
* Update the physical_freestart/physical_freeend/free_pages
* variables.
*/
{
extern char _end[];
physical_freestart = physical_start +
(((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
KERNEL_BASE);
physical_freeend = physical_end;
free_pages =
(physical_freeend - physical_freestart) / PAGE_SIZE;
}
/* Switch tables */
#ifdef VERBOSE_INIT_ARM
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
physical_freestart, free_pages, free_pages);
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
#endif
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
setttb(kernel_l1pt.pv_pa);
cpu_tlb_flushID();
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
/*
* Moved from cpu_startup() as data_abort_handler() references
* this during uvm init
*/
proc0paddr = (struct user *)kernelstack.pv_va;
lwp0.l_addr = proc0paddr;
#ifdef VERBOSE_INIT_ARM
printf("bootstrap done.\n");
#endif
arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
/*
* Pages were allocated during the secondary bootstrap for the
* stacks for different CPU modes.
* We must now set the r13 registers in the different CPU modes to
* point to these stacks.
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
* of the stack memory.
*/
printf("init subsystems: stacks ");
set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
/*
* Well we should set a data abort handler.
* Once things get going this will change as we will need a proper
* handler.
* Until then we will use a handler that just panics but tells us
* why.
* Initialisation of the vectors will just panic on a data abort.
* This just fills in a slightly better one.
*/
printf("vectors ");
data_abort_handler_address = (u_int)data_abort_handler;
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
undefined_handler_address = (u_int)undefinedinstruction_bounce;
/* Initialise the undefined instruction handlers */
printf("undefined ");
undefined_init();
/* Load memory into UVM. */
printf("page ");
uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
atop(physical_freestart), atop(physical_freeend),
VM_FREELIST_DEFAULT);
/* Boot strap pmap telling it where the kernel page table is */
printf("pmap ");
pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
#ifdef __HAVE_MEMORY_DISK__
md_root_setconf(memory_disk, sizeof memory_disk);
#endif
#ifdef KGDB
if (boothowto & RB_KDB) {
kgdb_debug_init = 1;
kgdb_connect(1);
}
#endif
#ifdef DDB
db_machine_init();
/* Firmware doesn't load symbols. */
ddb_init(0, NULL, NULL);
if (boothowto & RB_KDB)
Debugger();
#endif
/* We return the new stack pointer address */
return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
/*
* When we enter here, we are using a temporary first level
* translation table with section entries in it to cover the TIPB
* peripherals and SDRAM. The temporary first level translation table
* is at the end of SDRAM.
*/
/* Heads up ... Setup the CPU / MMU / TLB functions. */
if (set_cpufuncs())
panic("cpu not recognized!");
init_clocks();
/* The console is going to try to map things. Give pmap a devmap. */
pmap_devmap_register(devmap);
consinit();
#ifdef KGDB
kgdb_port_init();
#endif
#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
printf("\nNetBSD/evbarm (OSK5912) booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#endif
/*
* Set up the variables that define the availability of physical
* memory.
*/
physical_start = KERNEL_BASE_PHYS;
physical_end = physical_start + MEMSIZE_BYTES;
physmem = MEMSIZE_BYTES / PAGE_SIZE;
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = physical_start;
bootconfig.dram[0].pages = physmem;
/*
* Our kernel is at the beginning of memory, so set our free space to
* all the memory after the kernel.
*/
physical_freestart = KERN_VTOPHYS(round_page((vaddr_t) _end));
physical_freeend = physical_end;
free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
/*
* This is going to do all the hard work of setting up the first and
* and second level page tables. Pages of memory will be allocated
* and mapped for other structures that are required for system
* operation. When it returns, physical_freestart and free_pages will
* have been updated to reflect the allocations that were made. In
* addition, kernel_l1pt, kernel_pt_table[], systempage, irqstack,
* abtstack, undstack, kernelstack, msgbufphys will be set to point to
* the memory that was allocated for them.
*/
setup_real_page_tables();
/*
* Moved from cpu_startup() as data_abort_handler() references
* this during uvm init.
*/
proc0paddr = (struct user *)kernelstack.pv_va;
lwp0.l_addr = proc0paddr;
#ifdef VERBOSE_INIT_ARM
printf("bootstrap done.\n");
#endif
arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
/*
* Pages were allocated during the secondary bootstrap for the
* stacks for different CPU modes.
* We must now set the r13 registers in the different CPU modes to
* point to these stacks.
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
* of the stack memory.
*/
#ifdef VERBOSE_INIT_ARM
printf("init subsystems: stacks ");
#endif
set_stackptr(PSR_IRQ32_MODE, irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_ABT32_MODE, abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
set_stackptr(PSR_UND32_MODE, undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
/*
* Well we should set a data abort handler.
* Once things get going this will change as we will need a proper
* handler.
* Until then we will use a handler that just panics but tells us
* why.
* Initialisation of the vectors will just panic on a data abort.
* This just fills in a slightly better one.
*/
#ifdef VERBOSE_INIT_ARM
printf("vectors ");
#endif
data_abort_handler_address = (u_int)data_abort_handler;
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
undefined_handler_address = (u_int)undefinedinstruction_bounce;
/* Initialise the undefined instruction handlers */
#ifdef VERBOSE_INIT_ARM
printf("undefined ");
#endif
undefined_init();
/* Load memory into UVM. */
#ifdef VERBOSE_INIT_ARM
printf("page ");
#endif
uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
atop(physical_freestart), atop(physical_freeend),
VM_FREELIST_DEFAULT);
/* Boot strap pmap telling it where the kernel page table is */
#ifdef VERBOSE_INIT_ARM
printf("pmap ");
#endif
pmap_bootstrap(KERNEL_VM_BASE, KERNEL_VM_BASE + KERNEL_VM_SIZE);
#ifdef VERBOSE_INIT_ARM
printf("done.\n");
#endif
#ifdef KGDB
if (boothowto & RB_KDB) {
kgdb_debug_init = 1;
kgdb_connect(1);
}
#endif
#ifdef DDB
db_machine_init();
/* Firmware doesn't load symbols. */
ddb_init(0, NULL, NULL);
if (boothowto & RB_KDB)
Debugger();
#endif
/* We return the new stack pointer address */
return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
}
/*
* u_int initarm(...)
*
* Initial entry point on startup. This gets called before main() is
* entered.
* It should be responsible for setting up everything that must be
* in place when main is called.
* This includes
* Taking a copy of the boot configuration structure.
* Initialising the physical console so characters can be printed.
* Setting up page tables for the kernel
* Relocating the kernel to the bottom of physical memory
*/
u_int
initarm(void *arg)
{
pmap_devmap_register(devmap);
awin_bootstrap(AWIN_CORE_VBASE, CONADDR_VA);
/* Heads up ... Setup the CPU / MMU / TLB functions. */
if (set_cpufuncs())
panic("cpu not recognized!");
/* The console is going to try to map things. Give pmap a devmap. */
consinit();
#ifdef VERBOSE_INIT_ARM
printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
#endif
#ifdef KGDB
kgdb_port_init();
#endif
cpu_reset_address = awin_wdog_reset;
#ifdef VERBOSE_INIT_ARM
/* Talk to the user */
printf("\nNetBSD/evbarm (" BOARDTYPE ") booting ...\n");
#endif
#ifdef BOOT_ARGS
char mi_bootargs[] = BOOT_ARGS;
parse_mi_bootargs(mi_bootargs);
#endif
#ifdef VERBOSE_INIT_ARM
printf("initarm: Configuring system ...\n");
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) || defined(CPU_CORTEXA15)
if (!CPU_ID_CORTEX_A8_P(curcpu()->ci_arm_cpuid)) {
printf("initarm: cbar=%#x\n", armreg_cbar_read());
}
#endif
#endif
/*
* Set up the variables that define the availability of physical
* memory.
*/
psize_t ram_size = awin_memprobe();
#if AWIN_board == AWIN_cubieboard
/* the cubietruck has 2GB whereas the cubieboards only has 1GB */
cubietruck_p = (ram_size == 0x80000000);
#endif
/*
* If MEMSIZE specified less than what we really have, limit ourselves
* to that.
*/
#ifdef MEMSIZE
if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
ram_size = (unsigned)MEMSIZE * 1024 * 1024;
#else
KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
#endif
/*
* Configure DMA tags
*/
awin_dma_bootstrap(ram_size);
/* Fake bootconfig structure for the benefit of pmap.c. */
bootconfig.dramblocks = 1;
bootconfig.dram[0].address = AWIN_SDRAM_PBASE;
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
const bool mapallmem_p = true;
#ifndef PMAP_NEED_ALLOC_POOLPAGE
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
printf("%s: dropping RAM size from %luMB to %uMB\n",
__func__, (unsigned long) (ram_size >> 20),
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
}
