static int
chrp_attach(platform_t plat)
{
#ifdef __powerpc64__
/* XXX: check for /rtas/ibm,hypertas-functions? */
if (!(mfmsr() & PSL_HV)) {
struct mem_region *phys, *avail;
int nphys, navail;
mem_regions(&phys, &nphys, &avail, &navail);
realmaxaddr = phys[0].mr_size;
pmap_mmu_install("mmu_phyp", BUS_PROBE_SPECIFIC);
cpu_idle_hook = phyp_cpu_idle;
/* Set up important VPA fields */
bzero(splpar_vpa, sizeof(splpar_vpa));
splpar_vpa[4] = (uint8_t)((sizeof(splpar_vpa) >> 8) & 0xff);
splpar_vpa[5] = (uint8_t)(sizeof(splpar_vpa) & 0xff);
splpar_vpa[0xba] = 1; /* Maintain FPRs */
splpar_vpa[0xbb] = 1; /* Maintain PMCs */
splpar_vpa[0xfc] = 0xff; /* Maintain full SLB */
splpar_vpa[0xfd] = 0xff;
splpar_vpa[0xff] = 1; /* Maintain Altivec */
mb();
/* Set up hypervisor CPU stuff */
chrp_smp_ap_init(plat);
}
#endif
/* Some systems (e.g. QEMU) need Open Firmware to stand down */
ofw_quiesce();
return (0);
}
static int
ps3_attach(platform_t plat)
{
uint64_t lpar_id, junk, ppe_id;
/* Get real mode memory region */
avail_regions[0].mr_start = 0;
lv1_get_logical_partition_id(&lpar_id);
lv1_get_logical_ppe_id(&ppe_id);
lv1_get_repository_node_value(lpar_id,
lv1_repository_string("bi") >> 32, lv1_repository_string("pu"),
ppe_id, lv1_repository_string("rm_size"),
&avail_regions[0].mr_size, &junk);
/* Now get extended memory region */
lv1_get_repository_node_value(lpar_id,
lv1_repository_string("bi") >> 32,
lv1_repository_string("rgntotal"), 0, 0,
&avail_regions[1].mr_size, &junk);
/* Convert to maximum amount we can allocate in 16 MB pages */
avail_regions[1].mr_size -= avail_regions[0].mr_size;
avail_regions[1].mr_size -= avail_regions[1].mr_size % (16*1024*1024);
lv1_allocate_memory(avail_regions[1].mr_size, 24 /* 16 MB pages */,
0, 0x04 /* any address */, &avail_regions[1].mr_start, &junk);
pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC);
cpu_idle_hook = ps3_cpu_idle;
/* Set a breakpoint to make NULL an invalid address */
lv1_set_dabr(0x7 /* read and write, MMU on */, 2 /* kernel accesses */);
return (0);
}
void
booke_cpu_init(void)
{
cpu_features |= PPC_FEATURE_BOOKE;
pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC);
}
static int
ps3_attach(platform_t plat)
{
uint64_t junk;
int count;
struct mem_region avail_regions[2];
ps3_mem_regions(plat, NULL, NULL, avail_regions, &count);
lv1_allocate_memory(avail_regions[1].mr_size, 24 /* 16 MB pages */,
0, 0x04 /* any address */, &avail_regions[1].mr_start, &junk);
pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC);
cpu_idle_hook = ps3_cpu_idle;
/* Set a breakpoint to make NULL an invalid address */
lv1_set_dabr(0x7 /* read and write, MMU on */, 2 /* kernel accesses */);
return (0);
}
