C++ (Cpp) pmc_switch_pck_to_sclk Examples

Example #1

File: main.c Project: AlexShiLucky/freertos

// [main_tc_configure]
static void configure_tc(void)
{
	uint32_t ul_div;
	uint32_t ul_tcclks;
	uint32_t ul_sysclk = sysclk_get_cpu_hz();

	/* Configure PMC */
	pmc_enable_periph_clk(ID_TC0);
#if SAMG55
	/* Enable PCK output */
	pmc_disable_pck(PMC_PCK_3);
	pmc_switch_pck_to_sclk(PMC_PCK_3, PMC_PCK_PRES_CLK_1);
	pmc_enable_pck(PMC_PCK_3);
#endif

	/** Configure TC for a 4Hz frequency and trigger on RC compare. */
	tc_find_mck_divisor(4, ul_sysclk, &ul_div, &ul_tcclks, ul_sysclk);
	tc_init(TC0, 0, ul_tcclks | TC_CMR_CPCTRG);
	tc_write_rc(TC0, 0, (ul_sysclk / ul_div) / 4);

	/* Configure and enable interrupt on RC compare */
	NVIC_EnableIRQ((IRQn_Type) ID_TC0);
	tc_enable_interrupt(TC0, 0, TC_IER_CPCS);

#ifdef LED1_GPIO
	/** Start the counter if LED1 is enabled. */
	if (g_b_led1_active) {
		tc_start(TC0, 0);
	}
#else
	tc_start(TC0, 0);
#endif
}

Example #2

File: pmc_clock_switching_example.c Project: AndreyMostovov/asf

/**
 * \brief Configure UART with the given master clock, and Configure PCK with
 *  the given divider source of master clock and prescaler.
 *
 * \param ul_clock_source  The master clock divider source.
 * \param ul_prescaler Master Clock prescaler.
 * \param ul_master_clock Frequency of the master clock (in Hz).
 */
static void config_uart_and_pck(uint32_t ul_clock_source,
		uint32_t ul_prescaler, uint32_t ul_master_clock)
{
	if (ul_master_clock > BOARD_FREQ_SLCK_XTAL) {
		const sam_uart_opt_t uart_console_settings = {
			ul_master_clock, PMC_CLOCK_SWITCHING_EXAMPLE_BAUDRATE,
			UART_MR_PAR_NO
		};

		/* Configure PMC */
		pmc_enable_periph_clk(CONSOLE_UART_ID);

		/* Configure UART */
		uart_init(CONSOLE_UART, &uart_console_settings);
	}

	/* Programmable clock output disabled */
	pmc_disable_pck(GCLK_ID);

	/* Configure PMC Programmable Clock */
	switch (ul_clock_source) {
	case PMC_PCK_CSS_MAIN_CLK:
		pmc_switch_pck_to_mainck(GCLK_ID, ul_prescaler);
		break;

	case PMC_PCK_CSS_SLOW_CLK:
		pmc_switch_pck_to_sclk(GCLK_ID, ul_prescaler);
		break;

	case PMC_PCK_CSS_PLLA_CLK:
		pmc_switch_pck_to_pllack(GCLK_ID, ul_prescaler);
		break;

#if (SAM3S || SAM4S || SAM4C)
	case PMC_PCK_CSS_PLLB_CLK:
		pmc_switch_pck_to_pllbck(GCLK_ID, ul_prescaler);
		break;
#endif

	default:
		pmc_switch_pck_to_mainck(GCLK_ID, ul_prescaler);
	}

	/* Enable the PCK again */
	pmc_enable_pck(GCLK_ID);
}