/*
* Called into from start_kernel, after lock_kernel has been called.
* Initializes bootmem, which is unsed to manage page allocation until
* mem_init is called.
*/
void __init setup_arch(char **cmdline_p)
{
ppc64_boot_msg(0x12, "Setup Arch");
*cmdline_p = cmd_line;
/*
* Set cache line size based on type of cpu as a default.
* Systems with OF can look in the properties on the cpu node(s)
* for a possibly more accurate value.
*/
dcache_bsize = ppc64_caches.dline_size;
icache_bsize = ppc64_caches.iline_size;
/* reboot on panic */
panic_timeout = 180;
if (ppc_md.panic)
setup_panic();
init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = klimit;
irqstack_early_init();
exc_lvl_early_init();
emergency_stack_init();
#ifdef CONFIG_PPC_STD_MMU_64
stabs_alloc();
#endif
/* set up the bootmem stuff with available memory */
do_init_bootmem();
sparse_init();
#ifdef CONFIG_DUMMY_CONSOLE
conswitchp = &dummy_con;
#endif
if (ppc_md.setup_arch)
ppc_md.setup_arch();
paging_init();
/* Initialize the MMU context management stuff */
mmu_context_init();
ppc64_boot_msg(0x15, "Setup Done");
}
void
htab_initialize(void)
{
unsigned long table, htab_size_bytes;
unsigned long pteg_count;
unsigned long mode_rw, mask;
#if 0
/* Can't really do the call below since it calls the normal RTAS
* entry point and we're still relocate off at the moment.
* Temporarily diabling until it can call through the relocate off
* RTAS entry point. -Peter
*/
ppc64_boot_msg(0x05, "htab init");
#endif
/*
* Calculate the required size of the htab. We want the number of
* PTEGs to equal one half the number of real pages.
*/
htab_size_bytes = 1UL << naca->pftSize;
pteg_count = htab_size_bytes >> 7;
/* For debug, make the HTAB 1/8 as big as it normally would be. */
ifppcdebug(PPCDBG_HTABSIZE) {
pteg_count >>= 3;
htab_size_bytes = pteg_count << 7;
}
htab_data.htab_num_ptegs = pteg_count;
htab_data.htab_hash_mask = pteg_count - 1;
if(naca->platform == PLATFORM_PSERIES) {
/* Find storage for the HPT. Must be contiguous in
* the absolute address space.
*/
table = lmb_alloc(htab_size_bytes, htab_size_bytes);
if ( !table ) {
ppc64_terminate_msg(0x20, "hpt space");
loop_forever();
}
htab_data.htab = (HPTE *)__a2v(table);
/* htab absolute addr + encoded htabsize */
_SDR1 = table + __ilog2(pteg_count) - 11;
/* Initialize the HPT with no entries */
memset((void *)table, 0, htab_size_bytes);
} else {
/* Using a hypervisor which owns the htab */
htab_data.htab = NULL;
_SDR1 = 0;
}
mode_rw = _PAGE_ACCESSED | _PAGE_COHERENT | PP_RWXX;
mask = pteg_count-1;
/* XXX we currently map kernel text rw, should fix this */
if ((naca->platform & PLATFORM_PSERIES) &&
cpu_has_largepage() && (naca->physicalMemorySize > 256*MB)) {
create_pte_mapping((unsigned long)KERNELBASE,
KERNELBASE + 256*MB, mode_rw, mask, 0);
create_pte_mapping((unsigned long)KERNELBASE + 256*MB,
KERNELBASE + (naca->physicalMemorySize),
mode_rw, mask, 1);
} else {
create_pte_mapping((unsigned long)KERNELBASE,
KERNELBASE+(naca->physicalMemorySize),
mode_rw, mask, 0);
}
#if 0
/* Can't really do the call below since it calls the normal RTAS
* entry point and we're still relocate off at the moment.
* Temporarily diabling until it can call through the relocate off
* RTAS entry point. -Peter
*/
ppc64_boot_msg(0x06, "htab done");
#endif
}
void
xics_init_IRQ( void )
{
int i;
unsigned long intr_size = 0;
struct device_node *np;
uint *ireg, ilen, indx=0;
ppc64_boot_msg(0x20, "XICS Init");
ibm_get_xive = rtas_token("ibm,get-xive");
ibm_set_xive = rtas_token("ibm,set-xive");
ibm_int_on = rtas_token("ibm,int-on");
ibm_int_off = rtas_token("ibm,int-off");
np = find_type_devices("PowerPC-External-Interrupt-Presentation");
if (!np) {
printk(KERN_WARNING "Can't find Interrupt Presentation\n");
udbg_printf("Can't find Interrupt Presentation\n");
while (1);
}
nextnode:
ireg = (uint *)get_property(np, "ibm,interrupt-server-ranges", 0);
if (ireg) {
/*
* set node starting index for this node
*/
indx = *ireg;
}
ireg = (uint *)get_property(np, "reg", &ilen);
if (!ireg) {
printk(KERN_WARNING "Can't find Interrupt Reg Property\n");
udbg_printf("Can't find Interrupt Reg Property\n");
while (1);
}
while (ilen) {
inodes[indx].addr = (unsigned long long)*ireg++ << 32;
ilen -= sizeof(uint);
inodes[indx].addr |= *ireg++;
ilen -= sizeof(uint);
inodes[indx].size = (unsigned long long)*ireg++ << 32;
ilen -= sizeof(uint);
inodes[indx].size |= *ireg++;
ilen -= sizeof(uint);
indx++;
if (indx >= NR_CPUS) break;
}
np = np->next;
if ((indx < NR_CPUS) && np) goto nextnode;
/* Find the server numbers for the boot cpu. */
for (np = find_type_devices("cpu"); np; np = np->next) {
ireg = (uint *)get_property(np, "reg", &ilen);
if (ireg && ireg[0] == hard_smp_processor_id()) {
ireg = (uint *)get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
i = ilen / sizeof(int);
if (ireg && i > 0) {
default_server = ireg[0];
default_distrib_server = ireg[i-1]; /* take last element */
}
break;
}
}
intr_base = inodes[0].addr;
intr_size = (ulong)inodes[0].size;
np = find_type_devices("interrupt-controller");
if (!np) {
printk(KERN_WARNING "xics: no ISA Interrupt Controller\n");
xics_irq_8259_cascade_real = -1;
xics_irq_8259_cascade = -1;
} else {
ireg = (uint *) get_property(np, "interrupts", 0);
if (!ireg) {
printk(KERN_WARNING "Can't find ISA Interrupts Property\n");
udbg_printf("Can't find ISA Interrupts Property\n");
while (1);
}
xics_irq_8259_cascade_real = *ireg;
xics_irq_8259_cascade = virt_irq_create_mapping(xics_irq_8259_cascade_real);
}
if (systemcfg->platform == PLATFORM_PSERIES) {
#ifdef CONFIG_SMP
for (i = 0; i < systemcfg->processorCount; ++i) {
xics_info.per_cpu[i] =
__ioremap((ulong)inodes[get_hard_smp_processor_id(i)].addr,
(ulong)inodes[get_hard_smp_processor_id(i)].size, _PAGE_NO_CACHE);
}
#else
xics_info.per_cpu[0] = __ioremap((ulong)intr_base, intr_size, _PAGE_NO_CACHE);
#endif /* CONFIG_SMP */
#ifdef CONFIG_PPC_PSERIES
/* actually iSeries does not use any of xics...but it has link dependencies
* for now, except this new one...
*/
} else if (systemcfg->platform == PLATFORM_PSERIES_LPAR) {
ops = &pSeriesLP_ops;
#endif
}
xics_8259_pic.enable = i8259_pic.enable;
xics_8259_pic.disable = i8259_pic.disable;
for (i = 0; i < 16; ++i)
irq_desc[i].handler = &xics_8259_pic;
for (; i < NR_IRQS; ++i)
irq_desc[i].handler = &xics_pic;
ops->cppr_info(0, 0xff);
iosync();
if (xics_irq_8259_cascade != -1) {
if (request_irq(xics_irq_8259_cascade + XICS_IRQ_OFFSET, no_action,
0, "8259 cascade", 0))
printk(KERN_ERR "xics_init_IRQ: couldn't get 8259 cascade\n");
i8259_init();
}
#ifdef CONFIG_SMP
real_irq_to_virt_map[XICS_IPI] = virt_irq_to_real_map[XICS_IPI] = XICS_IPI;
request_irq(XICS_IPI + XICS_IRQ_OFFSET, xics_ipi_action, 0, "IPI", 0);
irq_desc[XICS_IPI+XICS_IRQ_OFFSET].status |= IRQ_PER_CPU;
#endif
ppc64_boot_msg(0x21, "XICS Done");
}
